sdcc/device/non-free/lib/pic14/libdev/pic16f1526.c

   1 /*
   2  * This definitions of the PIC16F1526 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:07 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic16f1526.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF0;
  30
  31 __at(0x0001) __sfr INDF1;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR0;
  39
  40 __at(0x0004) __sfr FSR0L;
  41
  42 __at(0x0005) __sfr FSR0H;
  43
  44 __at(0x0006) __sfr FSR1;
  45
  46 __at(0x0006) __sfr FSR1L;
  47
  48 __at(0x0007) __sfr FSR1H;
  49
  50 __at(0x0008) __sfr BSR;
  51 __at(0x0008) volatile __BSRbits_t BSRbits;
  52
  53 __at(0x0009) __sfr WREG;
  54
  55 __at(0x000A) __sfr PCLATH;
  56
  57 __at(0x000B) __sfr INTCON;
  58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  59
  60 __at(0x000C) __sfr PORTA;
  61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
  62
  63 __at(0x000D) __sfr PORTB;
  64 __at(0x000D) volatile __PORTBbits_t PORTBbits;
  65
  66 __at(0x000E) __sfr PORTC;
  67 __at(0x000E) volatile __PORTCbits_t PORTCbits;
  68
  69 __at(0x000F) __sfr PORTD;
  70 __at(0x000F) volatile __PORTDbits_t PORTDbits;
  71
  72 __at(0x0010) __sfr PORTE;
  73 __at(0x0010) volatile __PORTEbits_t PORTEbits;
  74
  75 __at(0x0011) __sfr PIR1;
  76 __at(0x0011) volatile __PIR1bits_t PIR1bits;
  77
  78 __at(0x0012) __sfr PIR2;
  79 __at(0x0012) volatile __PIR2bits_t PIR2bits;
  80
  81 __at(0x0013) __sfr PIR3;
  82 __at(0x0013) volatile __PIR3bits_t PIR3bits;
  83
  84 __at(0x0014) __sfr PIR4;
  85 __at(0x0014) volatile __PIR4bits_t PIR4bits;
  86
  87 __at(0x0015) __sfr TMR0;
  88
  89 __at(0x0016) __sfr TMR1;
  90
  91 __at(0x0016) __sfr TMR1L;
  92
  93 __at(0x0017) __sfr TMR1H;
  94
  95 __at(0x0018) __sfr T1CON;
  96 __at(0x0018) volatile __T1CONbits_t T1CONbits;
  97
  98 __at(0x0019) __sfr T1GCON;
  99 __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
 100
 101 __at(0x001A) __sfr TMR2;
 102
 103 __at(0x001B) __sfr PR2;
 104
 105 __at(0x001C) __sfr T2CON;
 106 __at(0x001C) volatile __T2CONbits_t T2CONbits;
 107
 108 __at(0x008C) __sfr TRISA;
 109 __at(0x008C) volatile __TRISAbits_t TRISAbits;
 110
 111 __at(0x008D) __sfr TRISB;
 112 __at(0x008D) volatile __TRISBbits_t TRISBbits;
 113
 114 __at(0x008E) __sfr TRISC;
 115 __at(0x008E) volatile __TRISCbits_t TRISCbits;
 116
 117 __at(0x008F) __sfr TRISD;
 118 __at(0x008F) volatile __TRISDbits_t TRISDbits;
 119
 120 __at(0x0090) __sfr TRISE;
 121 __at(0x0090) volatile __TRISEbits_t TRISEbits;
 122
 123 __at(0x0091) __sfr PIE1;
 124 __at(0x0091) volatile __PIE1bits_t PIE1bits;
 125
 126 __at(0x0092) __sfr PIE2;
 127 __at(0x0092) volatile __PIE2bits_t PIE2bits;
 128
 129 __at(0x0093) __sfr PIE3;
 130 __at(0x0093) volatile __PIE3bits_t PIE3bits;
 131
 132 __at(0x0094) __sfr PIE4;
 133 __at(0x0094) volatile __PIE4bits_t PIE4bits;
 134
 135 __at(0x0095) __sfr OPTION_REG;
 136 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
 137
 138 __at(0x0096) __sfr PCON;
 139 __at(0x0096) volatile __PCONbits_t PCONbits;
 140
 141 __at(0x0097) __sfr WDTCON;
 142 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
 143
 144 __at(0x0099) __sfr OSCCON;
 145 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
 146
 147 __at(0x009A) __sfr OSCSTAT;
 148 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
 149
 150 __at(0x009B) __sfr ADRES;
 151
 152 __at(0x009B) __sfr ADRESL;
 153
 154 __at(0x009C) __sfr ADRESH;
 155
 156 __at(0x009D) __sfr ADCON0;
 157 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
 158
 159 __at(0x009E) __sfr ADCON1;
 160 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
 161
 162 __at(0x010C) __sfr LATA;
 163 __at(0x010C) volatile __LATAbits_t LATAbits;
 164
 165 __at(0x010D) __sfr LATB;
 166 __at(0x010D) volatile __LATBbits_t LATBbits;
 167
 168 __at(0x010E) __sfr LATC;
 169 __at(0x010E) volatile __LATCbits_t LATCbits;
 170
 171 __at(0x010F) __sfr LATD;
 172 __at(0x010F) volatile __LATDbits_t LATDbits;
 173
 174 __at(0x0110) __sfr LATE;
 175 __at(0x0110) volatile __LATEbits_t LATEbits;
 176
 177 __at(0x0116) __sfr BORCON;
 178 __at(0x0116) volatile __BORCONbits_t BORCONbits;
 179
 180 __at(0x0117) __sfr FVRCON;
 181 __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
 182
 183 __at(0x011D) __sfr APFCON;
 184 __at(0x011D) volatile __APFCONbits_t APFCONbits;
 185
 186 __at(0x018C) __sfr ANSELA;
 187 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
 188
 189 __at(0x018D) __sfr ANSELB;
 190 __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
 191
 192 __at(0x018F) __sfr ANSELD;
 193 __at(0x018F) volatile __ANSELDbits_t ANSELDbits;
 194
 195 __at(0x0190) __sfr ANSELE;
 196 __at(0x0190) volatile __ANSELEbits_t ANSELEbits;
 197
 198 __at(0x0191) __sfr PMADR;
 199
 200 __at(0x0191) __sfr PMADRL;
 201
 202 __at(0x0192) __sfr PMADRH;
 203
 204 __at(0x0193) __sfr PMDAT;
 205
 206 __at(0x0193) __sfr PMDATL;
 207
 208 __at(0x0194) __sfr PMDATH;
 209
 210 __at(0x0195) __sfr PMCON1;
 211 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
 212
 213 __at(0x0196) __sfr PMCON2;
 214
 215 __at(0x0197) __sfr VREGCON;
 216 __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
 217
 218 __at(0x0199) __sfr RC1REG;
 219
 220 __at(0x0199) __sfr RCREG;
 221
 222 __at(0x0199) __sfr RCREG1;
 223
 224 __at(0x019A) __sfr TX1REG;
 225
 226 __at(0x019A) __sfr TXREG;
 227
 228 __at(0x019A) __sfr TXREG1;
 229
 230 __at(0x019B) __sfr SP1BRG;
 231
 232 __at(0x019B) __sfr SP1BRGL;
 233
 234 __at(0x019B) __sfr SPBRG;
 235
 236 __at(0x019B) __sfr SPBRGL;
 237
 238 __at(0x019B) __sfr SPBRGL1;
 239
 240 __at(0x019C) __sfr SP1BRGH;
 241
 242 __at(0x019C) __sfr SPBRGH;
 243
 244 __at(0x019C) __sfr SPBRGH1;
 245
 246 __at(0x019D) __sfr RC1STA;
 247 __at(0x019D) volatile __RC1STAbits_t RC1STAbits;
 248
 249 __at(0x019D) __sfr RCSTA;
 250 __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
 251
 252 __at(0x019D) __sfr RCSTA1;
 253 __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits;
 254
 255 __at(0x019E) __sfr TX1STA;
 256 __at(0x019E) volatile __TX1STAbits_t TX1STAbits;
 257
 258 __at(0x019E) __sfr TXSTA;
 259 __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
 260
 261 __at(0x019E) __sfr TXSTA1;
 262 __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits;
 263
 264 __at(0x019F) __sfr BAUD1CON;
 265 __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits;
 266
 267 __at(0x019F) __sfr BAUDCON;
 268 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
 269
 270 __at(0x019F) __sfr BAUDCON1;
 271 __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits;
 272
 273 __at(0x020D) __sfr WPUB;
 274 __at(0x020D) volatile __WPUBbits_t WPUBbits;
 275
 276 __at(0x020F) __sfr WPUD;
 277 __at(0x020F) volatile __WPUDbits_t WPUDbits;
 278
 279 __at(0x0210) __sfr WPUE;
 280 __at(0x0210) volatile __WPUEbits_t WPUEbits;
 281
 282 __at(0x0211) __sfr SSP1BUF;
 283
 284 __at(0x0211) __sfr SSPBUF;
 285
 286 __at(0x0212) __sfr SSP1ADD;
 287
 288 __at(0x0212) __sfr SSPADD;
 289
 290 __at(0x0213) __sfr SSP1MSK;
 291
 292 __at(0x0213) __sfr SSPMSK;
 293
 294 __at(0x0214) __sfr SSP1STAT;
 295 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
 296
 297 __at(0x0214) __sfr SSPSTAT;
 298 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
 299
 300 __at(0x0215) __sfr SSP1CON1;
 301 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
 302
 303 __at(0x0215) __sfr SSPCON;
 304 __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
 305
 306 __at(0x0215) __sfr SSPCON1;
 307 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
 308
 309 __at(0x0216) __sfr SSP1CON2;
 310 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
 311
 312 __at(0x0216) __sfr SSPCON2;
 313 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
 314
 315 __at(0x0217) __sfr SSP1CON3;
 316 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
 317
 318 __at(0x0217) __sfr SSPCON3;
 319 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
 320
 321 __at(0x0219) __sfr SSP2BUF;
 322
 323 __at(0x021A) __sfr SSP2ADD;
 324
 325 __at(0x021B) __sfr SSP2MSK;
 326
 327 __at(0x021C) __sfr SSP2STAT;
 328 __at(0x021C) volatile __SSP2STATbits_t SSP2STATbits;
 329
 330 __at(0x021D) __sfr SSP2CON1;
 331 __at(0x021D) volatile __SSP2CON1bits_t SSP2CON1bits;
 332
 333 __at(0x021E) __sfr SSP2CON2;
 334 __at(0x021E) volatile __SSP2CON2bits_t SSP2CON2bits;
 335
 336 __at(0x021F) __sfr SSP2CON3;
 337 __at(0x021F) volatile __SSP2CON3bits_t SSP2CON3bits;
 338
 339 __at(0x028C) __sfr PORTF;
 340 __at(0x028C) volatile __PORTFbits_t PORTFbits;
 341
 342 __at(0x028D) __sfr PORTG;
 343 __at(0x028D) volatile __PORTGbits_t PORTGbits;
 344
 345 __at(0x0291) __sfr CCPR1;
 346
 347 __at(0x0291) __sfr CCPR1L;
 348
 349 __at(0x0292) __sfr CCPR1H;
 350
 351 __at(0x0293) __sfr CCP1CON;
 352 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits;
 353
 354 __at(0x0298) __sfr CCPR2;
 355
 356 __at(0x0298) __sfr CCPR2L;
 357
 358 __at(0x0299) __sfr CCPR2H;
 359
 360 __at(0x029A) __sfr CCP2CON;
 361 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits;
 362
 363 __at(0x029D) __sfr CCPTMRS0;
 364 __at(0x029D) volatile __CCPTMRS0bits_t CCPTMRS0bits;
 365
 366 __at(0x029E) __sfr CCPTMRS1;
 367 __at(0x029E) volatile __CCPTMRS1bits_t CCPTMRS1bits;
 368
 369 __at(0x029F) __sfr CCPTMRS2;
 370 __at(0x029F) volatile __CCPTMRS2bits_t CCPTMRS2bits;
 371
 372 __at(0x030C) __sfr TRISF;
 373 __at(0x030C) volatile __TRISFbits_t TRISFbits;
 374
 375 __at(0x030D) __sfr TRISG;
 376 __at(0x030D) volatile __TRISGbits_t TRISGbits;
 377
 378 __at(0x0311) __sfr CCPR3;
 379
 380 __at(0x0311) __sfr CCPR3L;
 381
 382 __at(0x0312) __sfr CCPR3H;
 383
 384 __at(0x0313) __sfr CCP3CON;
 385 __at(0x0313) volatile __CCP3CONbits_t CCP3CONbits;
 386
 387 __at(0x0318) __sfr CCPR4;
 388
 389 __at(0x0318) __sfr CCPR4L;
 390
 391 __at(0x0319) __sfr CCPR4H;
 392
 393 __at(0x031A) __sfr CCP4CON;
 394 __at(0x031A) volatile __CCP4CONbits_t CCP4CONbits;
 395
 396 __at(0x031C) __sfr CCPR5;
 397
 398 __at(0x031C) __sfr CCPR5L;
 399
 400 __at(0x031D) __sfr CCPR5H;
 401
 402 __at(0x031E) __sfr CCP5CON;
 403 __at(0x031E) volatile __CCP5CONbits_t CCP5CONbits;
 404
 405 __at(0x038C) __sfr LATF;
 406 __at(0x038C) volatile __LATFbits_t LATFbits;
 407
 408 __at(0x038D) __sfr LATG;
 409 __at(0x038D) volatile __LATGbits_t LATGbits;
 410
 411 __at(0x0394) __sfr IOCBP;
 412 __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
 413
 414 __at(0x0395) __sfr IOCBN;
 415 __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
 416
 417 __at(0x0396) __sfr IOCBF;
 418 __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
 419
 420 __at(0x040C) __sfr ANSELF;
 421 __at(0x040C) volatile __ANSELFbits_t ANSELFbits;
 422
 423 __at(0x040D) __sfr ANSELG;
 424 __at(0x040D) volatile __ANSELGbits_t ANSELGbits;
 425
 426 __at(0x0411) __sfr TMR3;
 427
 428 __at(0x0411) __sfr TMR3L;
 429
 430 __at(0x0412) __sfr TMR3H;
 431
 432 __at(0x0413) __sfr T3CON;
 433 __at(0x0413) volatile __T3CONbits_t T3CONbits;
 434
 435 __at(0x0414) __sfr T3GCON;
 436 __at(0x0414) volatile __T3GCONbits_t T3GCONbits;
 437
 438 __at(0x0415) __sfr TMR4;
 439
 440 __at(0x0416) __sfr PR4;
 441
 442 __at(0x0417) __sfr T4CON;
 443 __at(0x0417) volatile __T4CONbits_t T4CONbits;
 444
 445 __at(0x0418) __sfr TMR5;
 446
 447 __at(0x0418) __sfr TMR5L;
 448
 449 __at(0x0419) __sfr TMR5H;
 450
 451 __at(0x041A) __sfr T5CON;
 452 __at(0x041A) volatile __T5CONbits_t T5CONbits;
 453
 454 __at(0x041B) __sfr T5GCON;
 455 __at(0x041B) volatile __T5GCONbits_t T5GCONbits;
 456
 457 __at(0x041C) __sfr TMR6;
 458
 459 __at(0x041D) __sfr PR6;
 460
 461 __at(0x041E) __sfr T6CON;
 462 __at(0x041E) volatile __T6CONbits_t T6CONbits;
 463
 464 __at(0x048D) __sfr WPUG;
 465 __at(0x048D) volatile __WPUGbits_t WPUGbits;
 466
 467 __at(0x0491) __sfr RC2REG;
 468
 469 __at(0x0491) __sfr RCREG2;
 470
 471 __at(0x0492) __sfr TX2REG;
 472
 473 __at(0x0492) __sfr TXREG2;
 474
 475 __at(0x0493) __sfr SP2BRG;
 476
 477 __at(0x0493) __sfr SP2BRGL;
 478
 479 __at(0x0493) __sfr SPBRGL2;
 480
 481 __at(0x0494) __sfr SP2BRGH;
 482
 483 __at(0x0494) __sfr SPBRGH2;
 484
 485 __at(0x0495) __sfr RC2STA;
 486 __at(0x0495) volatile __RC2STAbits_t RC2STAbits;
 487
 488 __at(0x0495) __sfr RCSTA2;
 489 __at(0x0495) volatile __RCSTA2bits_t RCSTA2bits;
 490
 491 __at(0x0496) __sfr TX2STA;
 492 __at(0x0496) volatile __TX2STAbits_t TX2STAbits;
 493
 494 __at(0x0496) __sfr TXSTA2;
 495 __at(0x0496) volatile __TXSTA2bits_t TXSTA2bits;
 496
 497 __at(0x0497) __sfr BAUD2CON;
 498 __at(0x0497) volatile __BAUD2CONbits_t BAUD2CONbits;
 499
 500 __at(0x0497) __sfr BAUDCON2;
 501 __at(0x0497) volatile __BAUDCON2bits_t BAUDCON2bits;
 502
 503 __at(0x0595) __sfr TMR8;
 504
 505 __at(0x0596) __sfr PR8;
 506
 507 __at(0x0597) __sfr T8CON;
 508 __at(0x0597) volatile __T8CONbits_t T8CONbits;
 509
 510 __at(0x059C) __sfr TMR10;
 511
 512 __at(0x059D) __sfr PR10;
 513
 514 __at(0x059E) __sfr T10CON;
 515 __at(0x059E) volatile __T10CONbits_t T10CONbits;
 516
 517 __at(0x0611) __sfr CCPR6;
 518
 519 __at(0x0611) __sfr CCPR6L;
 520
 521 __at(0x0612) __sfr CCPR6H;
 522
 523 __at(0x0613) __sfr CCP6CON;
 524 __at(0x0613) volatile __CCP6CONbits_t CCP6CONbits;
 525
 526 __at(0x0614) __sfr CCPR7;
 527
 528 __at(0x0614) __sfr CCPR7L;
 529
 530 __at(0x0615) __sfr CCPR7H;
 531
 532 __at(0x0616) __sfr CCP7CON;
 533 __at(0x0616) volatile __CCP7CONbits_t CCP7CONbits;
 534
 535 __at(0x0617) __sfr CCPR8;
 536
 537 __at(0x0617) __sfr CCPR8L;
 538
 539 __at(0x0618) __sfr CCPR8H;
 540
 541 __at(0x0619) __sfr CCP8CON;
 542 __at(0x0619) volatile __CCP8CONbits_t CCP8CONbits;
 543
 544 __at(0x061A) __sfr CCPR9;
 545
 546 __at(0x061A) __sfr CCPR9L;
 547
 548 __at(0x061B) __sfr CCPR9H;
 549
 550 __at(0x061C) __sfr CCP9CON;
 551 __at(0x061C) volatile __CCP9CONbits_t CCP9CONbits;
 552
 553 __at(0x061D) __sfr CCPR10;
 554
 555 __at(0x061D) __sfr CCPR10L;
 556
 557 __at(0x061E) __sfr CCPR10H;
 558
 559 __at(0x061F) __sfr CCP10CON;
 560 __at(0x061F) volatile __CCP10CONbits_t CCP10CONbits;
 561
 562 __at(0x0FE4) __sfr STATUS_SHAD;
 563 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
 564
 565 __at(0x0FE5) __sfr WREG_SHAD;
 566
 567 __at(0x0FE6) __sfr BSR_SHAD;
 568
 569 __at(0x0FE7) __sfr PCLATH_SHAD;
 570
 571 __at(0x0FE8) __sfr FSR0L_SHAD;
 572
 573 __at(0x0FE9) __sfr FSR0H_SHAD;
 574
 575 __at(0x0FEA) __sfr FSR1L_SHAD;
 576
 577 __at(0x0FEB) __sfr FSR1H_SHAD;
 578
 579 __at(0x0FED) __sfr STKPTR;
 580
 581 __at(0x0FEE) __sfr TOSL;
 582
 583 __at(0x0FEF) __sfr TOSH;