sdcc/device/non-free/lib/pic14/libdev/pic16f1704.c

   1 /*
   2  * This definitions of the PIC16F1704 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:11 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic16f1704.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF0;
  30
  31 __at(0x0001) __sfr INDF1;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR0;
  39
  40 __at(0x0004) __sfr FSR0L;
  41
  42 __at(0x0005) __sfr FSR0H;
  43
  44 __at(0x0006) __sfr FSR1;
  45
  46 __at(0x0006) __sfr FSR1L;
  47
  48 __at(0x0007) __sfr FSR1H;
  49
  50 __at(0x0008) __sfr BSR;
  51 __at(0x0008) volatile __BSRbits_t BSRbits;
  52
  53 __at(0x0009) __sfr WREG;
  54
  55 __at(0x000A) __sfr PCLATH;
  56
  57 __at(0x000B) __sfr INTCON;
  58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  59
  60 __at(0x000C) __sfr PORTA;
  61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
  62
  63 __at(0x000E) __sfr PORTC;
  64 __at(0x000E) volatile __PORTCbits_t PORTCbits;
  65
  66 __at(0x0011) __sfr PIR1;
  67 __at(0x0011) volatile __PIR1bits_t PIR1bits;
  68
  69 __at(0x0012) __sfr PIR2;
  70 __at(0x0012) volatile __PIR2bits_t PIR2bits;
  71
  72 __at(0x0013) __sfr PIR3;
  73 __at(0x0013) volatile __PIR3bits_t PIR3bits;
  74
  75 __at(0x0015) __sfr TMR0;
  76
  77 __at(0x0016) __sfr TMR1;
  78
  79 __at(0x0016) __sfr TMR1L;
  80
  81 __at(0x0017) __sfr TMR1H;
  82
  83 __at(0x0018) __sfr T1CON;
  84 __at(0x0018) volatile __T1CONbits_t T1CONbits;
  85
  86 __at(0x0019) __sfr T1GCON;
  87 __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
  88
  89 __at(0x001A) __sfr TMR2;
  90
  91 __at(0x001B) __sfr PR2;
  92
  93 __at(0x001C) __sfr T2CON;
  94 __at(0x001C) volatile __T2CONbits_t T2CONbits;
  95
  96 __at(0x008C) __sfr TRISA;
  97 __at(0x008C) volatile __TRISAbits_t TRISAbits;
  98
  99 __at(0x008E) __sfr TRISC;
 100 __at(0x008E) volatile __TRISCbits_t TRISCbits;
 101
 102 __at(0x0091) __sfr PIE1;
 103 __at(0x0091) volatile __PIE1bits_t PIE1bits;
 104
 105 __at(0x0092) __sfr PIE2;
 106 __at(0x0092) volatile __PIE2bits_t PIE2bits;
 107
 108 __at(0x0093) __sfr PIE3;
 109 __at(0x0093) volatile __PIE3bits_t PIE3bits;
 110
 111 __at(0x0095) __sfr OPTION_REG;
 112 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
 113
 114 __at(0x0096) __sfr PCON;
 115 __at(0x0096) volatile __PCONbits_t PCONbits;
 116
 117 __at(0x0097) __sfr WDTCON;
 118 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
 119
 120 __at(0x0098) __sfr OSCTUNE;
 121 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
 122
 123 __at(0x0099) __sfr OSCCON;
 124 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
 125
 126 __at(0x009A) __sfr OSCSTAT;
 127 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
 128
 129 __at(0x009B) __sfr ADRES;
 130
 131 __at(0x009B) __sfr ADRESL;
 132
 133 __at(0x009C) __sfr ADRESH;
 134
 135 __at(0x009D) __sfr ADCON0;
 136 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
 137
 138 __at(0x009E) __sfr ADCON1;
 139 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
 140
 141 __at(0x009F) __sfr ADCON2;
 142 __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
 143
 144 __at(0x010C) __sfr LATA;
 145 __at(0x010C) volatile __LATAbits_t LATAbits;
 146
 147 __at(0x010E) __sfr LATC;
 148 __at(0x010E) volatile __LATCbits_t LATCbits;
 149
 150 __at(0x0111) __sfr CM1CON0;
 151 __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
 152
 153 __at(0x0112) __sfr CM1CON1;
 154 __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
 155
 156 __at(0x0113) __sfr CM2CON0;
 157 __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
 158
 159 __at(0x0114) __sfr CM2CON1;
 160 __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
 161
 162 __at(0x0115) __sfr CMOUT;
 163 __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
 164
 165 __at(0x0116) __sfr BORCON;
 166 __at(0x0116) volatile __BORCONbits_t BORCONbits;
 167
 168 __at(0x0117) __sfr FVRCON;
 169 __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
 170
 171 __at(0x0118) __sfr DAC1CON0;
 172 __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits;
 173
 174 __at(0x0119) __sfr DAC1CON1;
 175 __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits;
 176
 177 __at(0x011C) __sfr ZCD1CON;
 178 __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits;
 179
 180 __at(0x018C) __sfr ANSELA;
 181 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
 182
 183 __at(0x018E) __sfr ANSELC;
 184 __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
 185
 186 __at(0x0191) __sfr PMADR;
 187
 188 __at(0x0191) __sfr PMADRL;
 189
 190 __at(0x0192) __sfr PMADRH;
 191
 192 __at(0x0193) __sfr PMDAT;
 193
 194 __at(0x0193) __sfr PMDATL;
 195
 196 __at(0x0194) __sfr PMDATH;
 197
 198 __at(0x0195) __sfr PMCON1;
 199 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
 200
 201 __at(0x0196) __sfr PMCON2;
 202
 203 __at(0x0197) __sfr VREGCON;
 204 __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
 205
 206 __at(0x0199) __sfr RC1REG;
 207
 208 __at(0x0199) __sfr RCREG;
 209
 210 __at(0x0199) __sfr RCREG1;
 211
 212 __at(0x019A) __sfr TX1REG;
 213
 214 __at(0x019A) __sfr TXREG;
 215
 216 __at(0x019A) __sfr TXREG1;
 217
 218 __at(0x019B) __sfr SP1BRG;
 219
 220 __at(0x019B) __sfr SP1BRGL;
 221
 222 __at(0x019B) __sfr SPBRG;
 223
 224 __at(0x019B) __sfr SPBRG1;
 225
 226 __at(0x019B) __sfr SPBRGL;
 227
 228 __at(0x019C) __sfr SP1BRGH;
 229
 230 __at(0x019C) __sfr SPBRGH;
 231
 232 __at(0x019C) __sfr SPBRGH1;
 233
 234 __at(0x019D) __sfr RC1STA;
 235 __at(0x019D) volatile __RC1STAbits_t RC1STAbits;
 236
 237 __at(0x019D) __sfr RCSTA;
 238 __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
 239
 240 __at(0x019D) __sfr RCSTA1;
 241 __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits;
 242
 243 __at(0x019E) __sfr TX1STA;
 244 __at(0x019E) volatile __TX1STAbits_t TX1STAbits;
 245
 246 __at(0x019E) __sfr TXSTA;
 247 __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
 248
 249 __at(0x019E) __sfr TXSTA1;
 250 __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits;
 251
 252 __at(0x019F) __sfr BAUD1CON;
 253 __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits;
 254
 255 __at(0x019F) __sfr BAUDCON;
 256 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
 257
 258 __at(0x019F) __sfr BAUDCON1;
 259 __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits;
 260
 261 __at(0x019F) __sfr BAUDCTL;
 262 __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits;
 263
 264 __at(0x019F) __sfr BAUDCTL1;
 265 __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits;
 266
 267 __at(0x020C) __sfr WPUA;
 268 __at(0x020C) volatile __WPUAbits_t WPUAbits;
 269
 270 __at(0x020E) __sfr WPUC;
 271 __at(0x020E) volatile __WPUCbits_t WPUCbits;
 272
 273 __at(0x0211) __sfr SSP1BUF;
 274 __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits;
 275
 276 __at(0x0211) __sfr SSPBUF;
 277 __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits;
 278
 279 __at(0x0212) __sfr SSP1ADD;
 280 __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits;
 281
 282 __at(0x0212) __sfr SSPADD;
 283 __at(0x0212) volatile __SSPADDbits_t SSPADDbits;
 284
 285 __at(0x0213) __sfr SSP1MSK;
 286 __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits;
 287
 288 __at(0x0213) __sfr SSPMSK;
 289 __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits;
 290
 291 __at(0x0214) __sfr SSP1STAT;
 292 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
 293
 294 __at(0x0214) __sfr SSPSTAT;
 295 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
 296
 297 __at(0x0215) __sfr SSP1CON;
 298 __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits;
 299
 300 __at(0x0215) __sfr SSP1CON1;
 301 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
 302
 303 __at(0x0215) __sfr SSPCON;
 304 __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
 305
 306 __at(0x0215) __sfr SSPCON1;
 307 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
 308
 309 __at(0x0216) __sfr SSP1CON2;
 310 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
 311
 312 __at(0x0216) __sfr SSPCON2;
 313 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
 314
 315 __at(0x0217) __sfr SSP1CON3;
 316 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
 317
 318 __at(0x0217) __sfr SSPCON3;
 319 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
 320
 321 __at(0x028C) __sfr ODCONA;
 322 __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
 323
 324 __at(0x028E) __sfr ODCONC;
 325 __at(0x028E) volatile __ODCONCbits_t ODCONCbits;
 326
 327 __at(0x0291) __sfr CCPR1;
 328
 329 __at(0x0291) __sfr CCPR1L;
 330
 331 __at(0x0292) __sfr CCPR1H;
 332
 333 __at(0x0293) __sfr CCP1CON;
 334 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits;
 335
 336 __at(0x0293) __sfr ECCP1CON;
 337 __at(0x0293) volatile __ECCP1CONbits_t ECCP1CONbits;
 338
 339 __at(0x0298) __sfr CCPR2;
 340
 341 __at(0x0298) __sfr CCPR2L;
 342
 343 __at(0x0299) __sfr CCPR2H;
 344
 345 __at(0x029A) __sfr CCP2CON;
 346 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits;
 347
 348 __at(0x029A) __sfr ECCP2CON;
 349 __at(0x029A) volatile __ECCP2CONbits_t ECCP2CONbits;
 350
 351 __at(0x029E) __sfr CCPTMRS;
 352 __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits;
 353
 354 __at(0x030C) __sfr SLRCONA;
 355 __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
 356
 357 __at(0x030E) __sfr SLRCONC;
 358 __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits;
 359
 360 __at(0x038C) __sfr INLVLA;
 361 __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
 362
 363 __at(0x038E) __sfr INLVLC;
 364 __at(0x038E) volatile __INLVLCbits_t INLVLCbits;
 365
 366 __at(0x0391) __sfr IOCAP;
 367 __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
 368
 369 __at(0x0392) __sfr IOCAN;
 370 __at(0x0392) volatile __IOCANbits_t IOCANbits;
 371
 372 __at(0x0393) __sfr IOCAF;
 373 __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
 374
 375 __at(0x0397) __sfr IOCCP;
 376 __at(0x0397) volatile __IOCCPbits_t IOCCPbits;
 377
 378 __at(0x0398) __sfr IOCCN;
 379 __at(0x0398) volatile __IOCCNbits_t IOCCNbits;
 380
 381 __at(0x0399) __sfr IOCCF;
 382 __at(0x0399) volatile __IOCCFbits_t IOCCFbits;
 383
 384 __at(0x0415) __sfr TMR4;
 385
 386 __at(0x0416) __sfr PR4;
 387
 388 __at(0x0417) __sfr T4CON;
 389 __at(0x0417) volatile __T4CONbits_t T4CONbits;
 390
 391 __at(0x041C) __sfr TMR6;
 392
 393 __at(0x041D) __sfr PR6;
 394
 395 __at(0x041E) __sfr T6CON;
 396 __at(0x041E) volatile __T6CONbits_t T6CONbits;
 397
 398 __at(0x0511) __sfr OPA1CON;
 399 __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits;
 400
 401 __at(0x0515) __sfr OPA2CON;
 402 __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits;
 403
 404 __at(0x0617) __sfr PWM3DCL;
 405 __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
 406
 407 __at(0x0618) __sfr PWM3DCH;
 408 __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
 409
 410 __at(0x0619) __sfr PWM3CON;
 411 __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
 412
 413 __at(0x0619) __sfr PWM3CON0;
 414 __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
 415
 416 __at(0x061A) __sfr PWM4DCL;
 417 __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
 418
 419 __at(0x061B) __sfr PWM4DCH;
 420 __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
 421
 422 __at(0x061C) __sfr PWM4CON;
 423 __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
 424
 425 __at(0x061C) __sfr PWM4CON0;
 426 __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
 427
 428 __at(0x0691) __sfr COG1PHR;
 429 __at(0x0691) volatile __COG1PHRbits_t COG1PHRbits;
 430
 431 __at(0x0692) __sfr COG1PHF;
 432 __at(0x0692) volatile __COG1PHFbits_t COG1PHFbits;
 433
 434 __at(0x0693) __sfr COG1BLKR;
 435 __at(0x0693) volatile __COG1BLKRbits_t COG1BLKRbits;
 436
 437 __at(0x0694) __sfr COG1BLKF;
 438 __at(0x0694) volatile __COG1BLKFbits_t COG1BLKFbits;
 439
 440 __at(0x0695) __sfr COG1DBR;
 441 __at(0x0695) volatile __COG1DBRbits_t COG1DBRbits;
 442
 443 __at(0x0696) __sfr COG1DBF;
 444 __at(0x0696) volatile __COG1DBFbits_t COG1DBFbits;
 445
 446 __at(0x0697) __sfr COG1CON0;
 447 __at(0x0697) volatile __COG1CON0bits_t COG1CON0bits;
 448
 449 __at(0x0698) __sfr COG1CON1;
 450 __at(0x0698) volatile __COG1CON1bits_t COG1CON1bits;
 451
 452 __at(0x0699) __sfr COG1RIS;
 453 __at(0x0699) volatile __COG1RISbits_t COG1RISbits;
 454
 455 __at(0x069A) __sfr COG1RSIM;
 456 __at(0x069A) volatile __COG1RSIMbits_t COG1RSIMbits;
 457
 458 __at(0x069B) __sfr COG1FIS;
 459 __at(0x069B) volatile __COG1FISbits_t COG1FISbits;
 460
 461 __at(0x069C) __sfr COG1FSIM;
 462 __at(0x069C) volatile __COG1FSIMbits_t COG1FSIMbits;
 463
 464 __at(0x069D) __sfr COG1ASD0;
 465 __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits;
 466
 467 __at(0x069E) __sfr COG1ASD1;
 468 __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits;
 469
 470 __at(0x069F) __sfr COG1STR;
 471 __at(0x069F) volatile __COG1STRbits_t COG1STRbits;
 472
 473 __at(0x0E0F) __sfr PPSLOCK;
 474 __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits;
 475
 476 __at(0x0E10) __sfr INTPPS;
 477
 478 __at(0x0E11) __sfr T0CKIPPS;
 479
 480 __at(0x0E12) __sfr T1CKIPPS;
 481
 482 __at(0x0E13) __sfr T1GPPS;
 483
 484 __at(0x0E14) __sfr CCP1PPS;
 485
 486 __at(0x0E15) __sfr CCP2PPS;
 487
 488 __at(0x0E17) __sfr COGINPPS;
 489
 490 __at(0x0E20) __sfr SSPCLKPPS;
 491
 492 __at(0x0E21) __sfr SSPDATPPS;
 493
 494 __at(0x0E22) __sfr SSPSSPPS;
 495
 496 __at(0x0E24) __sfr RXPPS;
 497
 498 __at(0x0E25) __sfr CKPPS;
 499
 500 __at(0x0E28) __sfr CLCIN0PPS;
 501
 502 __at(0x0E29) __sfr CLCIN1PPS;
 503
 504 __at(0x0E2A) __sfr CLCIN2PPS;
 505
 506 __at(0x0E2B) __sfr CLCIN3PPS;
 507
 508 __at(0x0E90) __sfr RA0PPS;
 509
 510 __at(0x0E91) __sfr RA1PPS;
 511
 512 __at(0x0E92) __sfr RA2PPS;
 513
 514 __at(0x0E94) __sfr RA4PPS;
 515
 516 __at(0x0E95) __sfr RA5PPS;
 517
 518 __at(0x0EA0) __sfr RC0PPS;
 519
 520 __at(0x0EA1) __sfr RC1PPS;
 521
 522 __at(0x0EA2) __sfr RC2PPS;
 523
 524 __at(0x0EA3) __sfr RC3PPS;
 525
 526 __at(0x0EA4) __sfr RC4PPS;
 527
 528 __at(0x0EA5) __sfr RC5PPS;
 529
 530 __at(0x0F0F) __sfr CLCDATA;
 531 __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
 532
 533 __at(0x0F10) __sfr CLC1CON;
 534 __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
 535
 536 __at(0x0F11) __sfr CLC1POL;
 537 __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
 538
 539 __at(0x0F12) __sfr CLC1SEL0;
 540 __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
 541
 542 __at(0x0F13) __sfr CLC1SEL1;
 543 __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
 544
 545 __at(0x0F14) __sfr CLC1SEL2;
 546 __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits;
 547
 548 __at(0x0F15) __sfr CLC1SEL3;
 549 __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits;
 550
 551 __at(0x0F16) __sfr CLC1GLS0;
 552 __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits;
 553
 554 __at(0x0F17) __sfr CLC1GLS1;
 555 __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits;
 556
 557 __at(0x0F18) __sfr CLC1GLS2;
 558 __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits;
 559
 560 __at(0x0F19) __sfr CLC1GLS3;
 561 __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits;
 562
 563 __at(0x0F1A) __sfr CLC2CON;
 564 __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits;
 565
 566 __at(0x0F1B) __sfr CLC2POL;
 567 __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits;
 568
 569 __at(0x0F1C) __sfr CLC2SEL0;
 570 __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits;
 571
 572 __at(0x0F1D) __sfr CLC2SEL1;
 573 __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits;
 574
 575 __at(0x0F1E) __sfr CLC2SEL2;
 576 __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits;
 577
 578 __at(0x0F1F) __sfr CLC2SEL3;
 579 __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits;
 580
 581 __at(0x0F20) __sfr CLC2GLS0;
 582 __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits;
 583
 584 __at(0x0F21) __sfr CLC2GLS1;
 585 __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits;
 586
 587 __at(0x0F22) __sfr CLC2GLS2;
 588 __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits;
 589
 590 __at(0x0F23) __sfr CLC2GLS3;
 591 __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits;
 592
 593 __at(0x0F24) __sfr CLC3CON;
 594 __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits;
 595
 596 __at(0x0F25) __sfr CLC3POL;
 597 __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits;
 598
 599 __at(0x0F26) __sfr CLC3SEL0;
 600 __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits;
 601
 602 __at(0x0F27) __sfr CLC3SEL1;
 603 __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits;
 604
 605 __at(0x0F28) __sfr CLC3SEL2;
 606 __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits;
 607
 608 __at(0x0F29) __sfr CLC3SEL3;
 609 __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits;
 610
 611 __at(0x0F2A) __sfr CLC3GLS0;
 612 __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits;
 613
 614 __at(0x0F2B) __sfr CLC3GLS1;
 615 __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits;
 616
 617 __at(0x0F2C) __sfr CLC3GLS2;
 618 __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits;
 619
 620 __at(0x0F2D) __sfr CLC3GLS3;
 621 __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits;
 622
 623 __at(0x0FE4) __sfr STATUS_SHAD;
 624 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
 625
 626 __at(0x0FE5) __sfr WREG_SHAD;
 627
 628 __at(0x0FE6) __sfr BSR_SHAD;
 629
 630 __at(0x0FE7) __sfr PCLATH_SHAD;
 631
 632 __at(0x0FE8) __sfr FSR0L_SHAD;
 633
 634 __at(0x0FE9) __sfr FSR0H_SHAD;
 635
 636 __at(0x0FEA) __sfr FSR1L_SHAD;
 637
 638 __at(0x0FEB) __sfr FSR1H_SHAD;
 639
 640 __at(0x0FED) __sfr STKPTR;
 641
 642 __at(0x0FEE) __sfr TOSL;
 643
 644 __at(0x0FEF) __sfr TOSH;