sdcc/device/non-free/lib/pic14/libdev/pic16f1768.c

   1 /*
   2  * This definitions of the PIC16F1768 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:14 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic16f1768.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF0;
  30
  31 __at(0x0001) __sfr INDF1;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR0;
  39
  40 __at(0x0004) __sfr FSR0L;
  41
  42 __at(0x0005) __sfr FSR0H;
  43
  44 __at(0x0006) __sfr FSR1;
  45
  46 __at(0x0006) __sfr FSR1L;
  47
  48 __at(0x0007) __sfr FSR1H;
  49
  50 __at(0x0008) __sfr BSR;
  51 __at(0x0008) volatile __BSRbits_t BSRbits;
  52
  53 __at(0x0009) __sfr WREG;
  54
  55 __at(0x000A) __sfr PCLATH;
  56
  57 __at(0x000B) __sfr INTCON;
  58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  59
  60 __at(0x000C) __sfr PORTA;
  61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
  62
  63 __at(0x000D) __sfr PORTB;
  64 __at(0x000D) volatile __PORTBbits_t PORTBbits;
  65
  66 __at(0x000E) __sfr PORTC;
  67 __at(0x000E) volatile __PORTCbits_t PORTCbits;
  68
  69 __at(0x0011) __sfr PIR1;
  70 __at(0x0011) volatile __PIR1bits_t PIR1bits;
  71
  72 __at(0x0012) __sfr PIR2;
  73 __at(0x0012) volatile __PIR2bits_t PIR2bits;
  74
  75 __at(0x0013) __sfr PIR3;
  76 __at(0x0013) volatile __PIR3bits_t PIR3bits;
  77
  78 __at(0x0014) __sfr PIR4;
  79 __at(0x0014) volatile __PIR4bits_t PIR4bits;
  80
  81 __at(0x0015) __sfr TMR0;
  82
  83 __at(0x0016) __sfr TMR1;
  84
  85 __at(0x0016) __sfr TMR1L;
  86
  87 __at(0x0017) __sfr TMR1H;
  88
  89 __at(0x0018) __sfr T1CON;
  90 __at(0x0018) volatile __T1CONbits_t T1CONbits;
  91
  92 __at(0x0019) __sfr T1GCON;
  93 __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
  94
  95 __at(0x001A) __sfr T2TMR;
  96
  97 __at(0x001A) __sfr TMR2;
  98
  99 __at(0x001B) __sfr PR2;
 100
 101 __at(0x001B) __sfr T2PR;
 102
 103 __at(0x001C) __sfr T2CON;
 104 __at(0x001C) volatile __T2CONbits_t T2CONbits;
 105
 106 __at(0x001D) __sfr T2HLT;
 107 __at(0x001D) volatile __T2HLTbits_t T2HLTbits;
 108
 109 __at(0x001E) __sfr T2CLKCON;
 110 __at(0x001E) volatile __T2CLKCONbits_t T2CLKCONbits;
 111
 112 __at(0x001F) __sfr T2RST;
 113 __at(0x001F) volatile __T2RSTbits_t T2RSTbits;
 114
 115 __at(0x008C) __sfr TRISA;
 116 __at(0x008C) volatile __TRISAbits_t TRISAbits;
 117
 118 __at(0x008D) __sfr TRISB;
 119 __at(0x008D) volatile __TRISBbits_t TRISBbits;
 120
 121 __at(0x008E) __sfr TRISC;
 122 __at(0x008E) volatile __TRISCbits_t TRISCbits;
 123
 124 __at(0x0091) __sfr PIE1;
 125 __at(0x0091) volatile __PIE1bits_t PIE1bits;
 126
 127 __at(0x0092) __sfr PIE2;
 128 __at(0x0092) volatile __PIE2bits_t PIE2bits;
 129
 130 __at(0x0093) __sfr PIE3;
 131 __at(0x0093) volatile __PIE3bits_t PIE3bits;
 132
 133 __at(0x0094) __sfr PIE4;
 134 __at(0x0094) volatile __PIE4bits_t PIE4bits;
 135
 136 __at(0x0095) __sfr OPTION_REG;
 137 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
 138
 139 __at(0x0096) __sfr PCON;
 140 __at(0x0096) volatile __PCONbits_t PCONbits;
 141
 142 __at(0x0097) __sfr WDTCON;
 143 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
 144
 145 __at(0x0098) __sfr OSCTUNE;
 146 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
 147
 148 __at(0x0099) __sfr OSCCON;
 149 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
 150
 151 __at(0x009A) __sfr OSCSTAT;
 152 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
 153
 154 __at(0x009B) __sfr ADRES;
 155
 156 __at(0x009B) __sfr ADRESL;
 157
 158 __at(0x009C) __sfr ADRESH;
 159
 160 __at(0x009D) __sfr ADCON0;
 161 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
 162
 163 __at(0x009E) __sfr ADCON1;
 164 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
 165
 166 __at(0x009F) __sfr ADCON2;
 167 __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
 168
 169 __at(0x010C) __sfr LATA;
 170 __at(0x010C) volatile __LATAbits_t LATAbits;
 171
 172 __at(0x010D) __sfr LATB;
 173 __at(0x010D) volatile __LATBbits_t LATBbits;
 174
 175 __at(0x010E) __sfr LATC;
 176 __at(0x010E) volatile __LATCbits_t LATCbits;
 177
 178 __at(0x010F) __sfr CMOUT;
 179 __at(0x010F) volatile __CMOUTbits_t CMOUTbits;
 180
 181 __at(0x0110) __sfr CM1CON0;
 182 __at(0x0110) volatile __CM1CON0bits_t CM1CON0bits;
 183
 184 __at(0x0111) __sfr CM1CON1;
 185 __at(0x0111) volatile __CM1CON1bits_t CM1CON1bits;
 186
 187 __at(0x0112) __sfr CM1NSEL;
 188 __at(0x0112) volatile __CM1NSELbits_t CM1NSELbits;
 189
 190 __at(0x0113) __sfr CM1PSEL;
 191 __at(0x0113) volatile __CM1PSELbits_t CM1PSELbits;
 192
 193 __at(0x0114) __sfr CM2CON0;
 194 __at(0x0114) volatile __CM2CON0bits_t CM2CON0bits;
 195
 196 __at(0x0115) __sfr CM2CON1;
 197 __at(0x0115) volatile __CM2CON1bits_t CM2CON1bits;
 198
 199 __at(0x0116) __sfr CM2NSEL;
 200 __at(0x0116) volatile __CM2NSELbits_t CM2NSELbits;
 201
 202 __at(0x0117) __sfr CM2PSEL;
 203 __at(0x0117) volatile __CM2PSELbits_t CM2PSELbits;
 204
 205 __at(0x0118) __sfr CM3CON0;
 206 __at(0x0118) volatile __CM3CON0bits_t CM3CON0bits;
 207
 208 __at(0x0119) __sfr CM3CON1;
 209 __at(0x0119) volatile __CM3CON1bits_t CM3CON1bits;
 210
 211 __at(0x011A) __sfr CM3NSEL;
 212 __at(0x011A) volatile __CM3NSELbits_t CM3NSELbits;
 213
 214 __at(0x011B) __sfr CM3PSEL;
 215 __at(0x011B) volatile __CM3PSELbits_t CM3PSELbits;
 216
 217 __at(0x011C) __sfr CM4CON0;
 218 __at(0x011C) volatile __CM4CON0bits_t CM4CON0bits;
 219
 220 __at(0x011D) __sfr CM4CON1;
 221 __at(0x011D) volatile __CM4CON1bits_t CM4CON1bits;
 222
 223 __at(0x011E) __sfr CM4NSEL;
 224 __at(0x011E) volatile __CM4NSELbits_t CM4NSELbits;
 225
 226 __at(0x011F) __sfr CM4PSEL;
 227 __at(0x011F) volatile __CM4PSELbits_t CM4PSELbits;
 228
 229 __at(0x018C) __sfr ANSELA;
 230 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
 231
 232 __at(0x018D) __sfr ANSELB;
 233 __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
 234
 235 __at(0x018E) __sfr ANSELC;
 236 __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
 237
 238 __at(0x0191) __sfr PMADR;
 239
 240 __at(0x0191) __sfr PMADRL;
 241
 242 __at(0x0192) __sfr PMADRH;
 243
 244 __at(0x0193) __sfr PMDAT;
 245
 246 __at(0x0193) __sfr PMDATL;
 247
 248 __at(0x0194) __sfr PMDATH;
 249
 250 __at(0x0195) __sfr PMCON1;
 251 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
 252
 253 __at(0x0196) __sfr PMCON2;
 254
 255 __at(0x0197) __sfr VREGCON;
 256 __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
 257
 258 __at(0x0199) __sfr RC1REG;
 259
 260 __at(0x0199) __sfr RCREG;
 261
 262 __at(0x0199) __sfr RCREG1;
 263
 264 __at(0x019A) __sfr TX1REG;
 265
 266 __at(0x019A) __sfr TXREG;
 267
 268 __at(0x019A) __sfr TXREG1;
 269
 270 __at(0x019B) __sfr SP1BRG;
 271
 272 __at(0x019B) __sfr SP1BRGL;
 273
 274 __at(0x019B) __sfr SPBRG;
 275
 276 __at(0x019B) __sfr SPBRG1;
 277
 278 __at(0x019B) __sfr SPBRGL;
 279
 280 __at(0x019C) __sfr SP1BRGH;
 281
 282 __at(0x019C) __sfr SPBRGH;
 283
 284 __at(0x019C) __sfr SPBRGH1;
 285
 286 __at(0x019D) __sfr RC1STA;
 287 __at(0x019D) volatile __RC1STAbits_t RC1STAbits;
 288
 289 __at(0x019D) __sfr RCSTA;
 290 __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
 291
 292 __at(0x019D) __sfr RCSTA1;
 293 __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits;
 294
 295 __at(0x019E) __sfr TX1STA;
 296 __at(0x019E) volatile __TX1STAbits_t TX1STAbits;
 297
 298 __at(0x019E) __sfr TXSTA;
 299 __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
 300
 301 __at(0x019E) __sfr TXSTA1;
 302 __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits;
 303
 304 __at(0x019F) __sfr BAUD1CON;
 305 __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits;
 306
 307 __at(0x019F) __sfr BAUDCON;
 308 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
 309
 310 __at(0x019F) __sfr BAUDCON1;
 311 __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits;
 312
 313 __at(0x019F) __sfr BAUDCTL;
 314 __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits;
 315
 316 __at(0x019F) __sfr BAUDCTL1;
 317 __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits;
 318
 319 __at(0x020C) __sfr WPUA;
 320 __at(0x020C) volatile __WPUAbits_t WPUAbits;
 321
 322 __at(0x020D) __sfr WPUB;
 323 __at(0x020D) volatile __WPUBbits_t WPUBbits;
 324
 325 __at(0x020E) __sfr WPUC;
 326 __at(0x020E) volatile __WPUCbits_t WPUCbits;
 327
 328 __at(0x0211) __sfr SSP1BUF;
 329 __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits;
 330
 331 __at(0x0211) __sfr SSPBUF;
 332 __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits;
 333
 334 __at(0x0212) __sfr SSP1ADD;
 335 __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits;
 336
 337 __at(0x0212) __sfr SSPADD;
 338 __at(0x0212) volatile __SSPADDbits_t SSPADDbits;
 339
 340 __at(0x0213) __sfr SSP1MSK;
 341 __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits;
 342
 343 __at(0x0213) __sfr SSPMSK;
 344 __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits;
 345
 346 __at(0x0214) __sfr SSP1STAT;
 347 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
 348
 349 __at(0x0214) __sfr SSPSTAT;
 350 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
 351
 352 __at(0x0215) __sfr SSP1CON;
 353 __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits;
 354
 355 __at(0x0215) __sfr SSP1CON1;
 356 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
 357
 358 __at(0x0215) __sfr SSPCON;
 359 __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
 360
 361 __at(0x0215) __sfr SSPCON1;
 362 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
 363
 364 __at(0x0216) __sfr SSP1CON2;
 365 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
 366
 367 __at(0x0216) __sfr SSPCON2;
 368 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
 369
 370 __at(0x0217) __sfr SSP1CON3;
 371 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
 372
 373 __at(0x0217) __sfr SSPCON3;
 374 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
 375
 376 __at(0x021D) __sfr BORCON;
 377 __at(0x021D) volatile __BORCONbits_t BORCONbits;
 378
 379 __at(0x021E) __sfr FVRCON;
 380 __at(0x021E) volatile __FVRCONbits_t FVRCONbits;
 381
 382 __at(0x021F) __sfr ZCD1CON;
 383 __at(0x021F) volatile __ZCD1CONbits_t ZCD1CONbits;
 384
 385 __at(0x028C) __sfr ODCONA;
 386 __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
 387
 388 __at(0x028D) __sfr ODCONB;
 389 __at(0x028D) volatile __ODCONBbits_t ODCONBbits;
 390
 391 __at(0x028E) __sfr ODCONC;
 392 __at(0x028E) volatile __ODCONCbits_t ODCONCbits;
 393
 394 __at(0x0291) __sfr CCPR1;
 395
 396 __at(0x0291) __sfr CCPR1L;
 397
 398 __at(0x0292) __sfr CCPR1H;
 399
 400 __at(0x0293) __sfr CCP1CON;
 401 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits;
 402
 403 __at(0x0294) __sfr CCP1CAP;
 404 __at(0x0294) volatile __CCP1CAPbits_t CCP1CAPbits;
 405
 406 __at(0x0298) __sfr CCPR2;
 407
 408 __at(0x0298) __sfr CCPR2L;
 409
 410 __at(0x0299) __sfr CCPR2H;
 411
 412 __at(0x029A) __sfr CCP2CON;
 413 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits;
 414
 415 __at(0x029B) __sfr CCP2CAP;
 416 __at(0x029B) volatile __CCP2CAPbits_t CCP2CAPbits;
 417
 418 __at(0x029E) __sfr CCPTMRS;
 419 __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits;
 420
 421 __at(0x030C) __sfr SLRCONA;
 422 __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
 423
 424 __at(0x030D) __sfr SLRCONB;
 425 __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits;
 426
 427 __at(0x030E) __sfr SLRCONC;
 428 __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits;
 429
 430 __at(0x031B) __sfr MD2CON0;
 431 __at(0x031B) volatile __MD2CON0bits_t MD2CON0bits;
 432
 433 __at(0x031C) __sfr MD2CON1;
 434 __at(0x031C) volatile __MD2CON1bits_t MD2CON1bits;
 435
 436 __at(0x031D) __sfr MD2SRC;
 437 __at(0x031D) volatile __MD2SRCbits_t MD2SRCbits;
 438
 439 __at(0x031E) __sfr MD2CARL;
 440 __at(0x031E) volatile __MD2CARLbits_t MD2CARLbits;
 441
 442 __at(0x031F) __sfr MD2CARH;
 443 __at(0x031F) volatile __MD2CARHbits_t MD2CARHbits;
 444
 445 __at(0x038C) __sfr INLVLA;
 446 __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
 447
 448 __at(0x038D) __sfr INLVLB;
 449 __at(0x038D) volatile __INLVLBbits_t INLVLBbits;
 450
 451 __at(0x038E) __sfr INLVLC;
 452 __at(0x038E) volatile __INLVLCbits_t INLVLCbits;
 453
 454 __at(0x0391) __sfr IOCAP;
 455 __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
 456
 457 __at(0x0392) __sfr IOCAN;
 458 __at(0x0392) volatile __IOCANbits_t IOCANbits;
 459
 460 __at(0x0393) __sfr IOCAF;
 461 __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
 462
 463 __at(0x0394) __sfr IOCBP;
 464 __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
 465
 466 __at(0x0395) __sfr IOCBN;
 467 __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
 468
 469 __at(0x0396) __sfr IOCBF;
 470 __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
 471
 472 __at(0x0397) __sfr IOCCP;
 473 __at(0x0397) volatile __IOCCPbits_t IOCCPbits;
 474
 475 __at(0x0398) __sfr IOCCN;
 476 __at(0x0398) volatile __IOCCNbits_t IOCCNbits;
 477
 478 __at(0x0399) __sfr IOCCF;
 479 __at(0x0399) volatile __IOCCFbits_t IOCCFbits;
 480
 481 __at(0x039B) __sfr MD1CON0;
 482 __at(0x039B) volatile __MD1CON0bits_t MD1CON0bits;
 483
 484 __at(0x039C) __sfr MD1CON1;
 485 __at(0x039C) volatile __MD1CON1bits_t MD1CON1bits;
 486
 487 __at(0x039D) __sfr MD1SRC;
 488 __at(0x039D) volatile __MD1SRCbits_t MD1SRCbits;
 489
 490 __at(0x039E) __sfr MD1CARL;
 491 __at(0x039E) volatile __MD1CARLbits_t MD1CARLbits;
 492
 493 __at(0x039F) __sfr MD1CARH;
 494 __at(0x039F) volatile __MD1CARHbits_t MD1CARHbits;
 495
 496 __at(0x040E) __sfr HIDRVC;
 497 __at(0x040E) volatile __HIDRVCbits_t HIDRVCbits;
 498
 499 __at(0x0413) __sfr T4TMR;
 500
 501 __at(0x0413) __sfr TMR4;
 502
 503 __at(0x0414) __sfr PR4;
 504
 505 __at(0x0414) __sfr T4PR;
 506
 507 __at(0x0415) __sfr T4CON;
 508 __at(0x0415) volatile __T4CONbits_t T4CONbits;
 509
 510 __at(0x0416) __sfr T4HLT;
 511 __at(0x0416) volatile __T4HLTbits_t T4HLTbits;
 512
 513 __at(0x0417) __sfr T4CLKCON;
 514 __at(0x0417) volatile __T4CLKCONbits_t T4CLKCONbits;
 515
 516 __at(0x0418) __sfr T4RST;
 517 __at(0x0418) volatile __T4RSTbits_t T4RSTbits;
 518
 519 __at(0x041A) __sfr T6TMR;
 520
 521 __at(0x041A) __sfr TMR6;
 522
 523 __at(0x041B) __sfr PR6;
 524
 525 __at(0x041B) __sfr T6PR;
 526
 527 __at(0x041C) __sfr T6CON;
 528 __at(0x041C) volatile __T6CONbits_t T6CONbits;
 529
 530 __at(0x041D) __sfr T6HLT;
 531 __at(0x041D) volatile __T6HLTbits_t T6HLTbits;
 532
 533 __at(0x041E) __sfr T6CLKCON;
 534 __at(0x041E) volatile __T6CLKCONbits_t T6CLKCONbits;
 535
 536 __at(0x041F) __sfr T6RST;
 537 __at(0x041F) volatile __T6RSTbits_t T6RSTbits;
 538
 539 __at(0x0493) __sfr TMR3;
 540
 541 __at(0x0493) __sfr TMR3L;
 542
 543 __at(0x0494) __sfr TMR3H;
 544
 545 __at(0x0495) __sfr T3CON;
 546 __at(0x0495) volatile __T3CONbits_t T3CONbits;
 547
 548 __at(0x0496) __sfr T3GCON;
 549 __at(0x0496) volatile __T3GCONbits_t T3GCONbits;
 550
 551 __at(0x049A) __sfr TMR5;
 552
 553 __at(0x049A) __sfr TMR5L;
 554
 555 __at(0x049B) __sfr TMR5H;
 556
 557 __at(0x049C) __sfr T5CON;
 558 __at(0x049C) volatile __T5CONbits_t T5CONbits;
 559
 560 __at(0x049D) __sfr T5GCON;
 561 __at(0x049D) volatile __T5GCONbits_t T5GCONbits;
 562
 563 __at(0x050F) __sfr OPA1NCHS;
 564
 565 __at(0x0510) __sfr OPA1PCHS;
 566
 567 __at(0x0511) __sfr OPA1CON;
 568 __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits;
 569
 570 __at(0x0512) __sfr OPA1ORS;
 571
 572 __at(0x0513) __sfr OPA2NCHS;
 573
 574 __at(0x0514) __sfr OPA2PCHS;
 575
 576 __at(0x0515) __sfr OPA2CON;
 577 __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits;
 578
 579 __at(0x0516) __sfr OPA2ORS;
 580
 581 __at(0x0590) __sfr DACLD;
 582 __at(0x0590) volatile __DACLDbits_t DACLDbits;
 583
 584 __at(0x0591) __sfr DAC1CON0;
 585 __at(0x0591) volatile __DAC1CON0bits_t DAC1CON0bits;
 586
 587 __at(0x0592) __sfr DAC1CON1;
 588 __at(0x0592) volatile __DAC1CON1bits_t DAC1CON1bits;
 589
 590 __at(0x0592) __sfr DAC1REF;
 591
 592 __at(0x0592) __sfr DAC1REFL;
 593 __at(0x0592) volatile __DAC1REFLbits_t DAC1REFLbits;
 594
 595 __at(0x0593) __sfr DAC1CON2;
 596 __at(0x0593) volatile __DAC1CON2bits_t DAC1CON2bits;
 597
 598 __at(0x0593) __sfr DAC1REFH;
 599 __at(0x0593) volatile __DAC1REFHbits_t DAC1REFHbits;
 600
 601 __at(0x0594) __sfr DAC2CON0;
 602 __at(0x0594) volatile __DAC2CON0bits_t DAC2CON0bits;
 603
 604 __at(0x0595) __sfr DAC2CON1;
 605 __at(0x0595) volatile __DAC2CON1bits_t DAC2CON1bits;
 606
 607 __at(0x0595) __sfr DAC2REF;
 608
 609 __at(0x0595) __sfr DAC2REFL;
 610 __at(0x0595) volatile __DAC2REFLbits_t DAC2REFLbits;
 611
 612 __at(0x0596) __sfr DAC2CON2;
 613 __at(0x0596) volatile __DAC2CON2bits_t DAC2CON2bits;
 614
 615 __at(0x0596) __sfr DAC2REFH;
 616 __at(0x0596) volatile __DAC2REFHbits_t DAC2REFHbits;
 617
 618 __at(0x0597) __sfr DAC3CON0;
 619 __at(0x0597) volatile __DAC3CON0bits_t DAC3CON0bits;
 620
 621 __at(0x0598) __sfr DAC3CON1;
 622 __at(0x0598) volatile __DAC3CON1bits_t DAC3CON1bits;
 623
 624 __at(0x0598) __sfr DAC3REF;
 625 __at(0x0598) volatile __DAC3REFbits_t DAC3REFbits;
 626
 627 __at(0x0599) __sfr DAC4CON0;
 628 __at(0x0599) volatile __DAC4CON0bits_t DAC4CON0bits;
 629
 630 __at(0x059A) __sfr DAC4CON1;
 631 __at(0x059A) volatile __DAC4CON1bits_t DAC4CON1bits;
 632
 633 __at(0x059A) __sfr DAC4REF;
 634 __at(0x059A) volatile __DAC4REFbits_t DAC4REFbits;
 635
 636 __at(0x0617) __sfr PWM3DCL;
 637 __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
 638
 639 __at(0x0618) __sfr PWM3DCH;
 640 __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
 641
 642 __at(0x0619) __sfr PWM3CON;
 643 __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
 644
 645 __at(0x061A) __sfr PWM4DCL;
 646 __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
 647
 648 __at(0x061B) __sfr PWM4DCH;
 649 __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
 650
 651 __at(0x061C) __sfr PWM4CON;
 652 __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
 653
 654 __at(0x068D) __sfr COG1PHR;
 655 __at(0x068D) volatile __COG1PHRbits_t COG1PHRbits;
 656
 657 __at(0x068E) __sfr COG1PHF;
 658 __at(0x068E) volatile __COG1PHFbits_t COG1PHFbits;
 659
 660 __at(0x068F) __sfr COG1BLKR;
 661 __at(0x068F) volatile __COG1BLKRbits_t COG1BLKRbits;
 662
 663 __at(0x0690) __sfr COG1BLKF;
 664 __at(0x0690) volatile __COG1BLKFbits_t COG1BLKFbits;
 665
 666 __at(0x0691) __sfr COG1DBR;
 667 __at(0x0691) volatile __COG1DBRbits_t COG1DBRbits;
 668
 669 __at(0x0692) __sfr COG1DBF;
 670 __at(0x0692) volatile __COG1DBFbits_t COG1DBFbits;
 671
 672 __at(0x0693) __sfr COG1CON0;
 673 __at(0x0693) volatile __COG1CON0bits_t COG1CON0bits;
 674
 675 __at(0x0694) __sfr COG1CON1;
 676 __at(0x0694) volatile __COG1CON1bits_t COG1CON1bits;
 677
 678 __at(0x0695) __sfr COG1RIS0;
 679 __at(0x0695) volatile __COG1RIS0bits_t COG1RIS0bits;
 680
 681 __at(0x0696) __sfr COG1RIS1;
 682 __at(0x0696) volatile __COG1RIS1bits_t COG1RIS1bits;
 683
 684 __at(0x0697) __sfr COG1RSIM0;
 685 __at(0x0697) volatile __COG1RSIM0bits_t COG1RSIM0bits;
 686
 687 __at(0x0698) __sfr COG1RSIM1;
 688 __at(0x0698) volatile __COG1RSIM1bits_t COG1RSIM1bits;
 689
 690 __at(0x0699) __sfr COG1FIS0;
 691 __at(0x0699) volatile __COG1FIS0bits_t COG1FIS0bits;
 692
 693 __at(0x069A) __sfr COG1FIS1;
 694 __at(0x069A) volatile __COG1FIS1bits_t COG1FIS1bits;
 695
 696 __at(0x069B) __sfr COG1FSIM0;
 697 __at(0x069B) volatile __COG1FSIM0bits_t COG1FSIM0bits;
 698
 699 __at(0x069C) __sfr COG1FSIM1;
 700 __at(0x069C) volatile __COG1FSIM1bits_t COG1FSIM1bits;
 701
 702 __at(0x069D) __sfr COG1ASD0;
 703 __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits;
 704
 705 __at(0x069E) __sfr COG1ASD1;
 706 __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits;
 707
 708 __at(0x069F) __sfr COG1STR;
 709 __at(0x069F) volatile __COG1STRbits_t COG1STRbits;
 710
 711 __at(0x070D) __sfr COG2PHR;
 712 __at(0x070D) volatile __COG2PHRbits_t COG2PHRbits;
 713
 714 __at(0x070E) __sfr COG2PHF;
 715 __at(0x070E) volatile __COG2PHFbits_t COG2PHFbits;
 716
 717 __at(0x070F) __sfr COG2BLKR;
 718 __at(0x070F) volatile __COG2BLKRbits_t COG2BLKRbits;
 719
 720 __at(0x0710) __sfr COG2BLKF;
 721 __at(0x0710) volatile __COG2BLKFbits_t COG2BLKFbits;
 722
 723 __at(0x0711) __sfr COG2DBR;
 724 __at(0x0711) volatile __COG2DBRbits_t COG2DBRbits;
 725
 726 __at(0x0712) __sfr COG2DBF;
 727 __at(0x0712) volatile __COG2DBFbits_t COG2DBFbits;
 728
 729 __at(0x0713) __sfr COG2CON0;
 730 __at(0x0713) volatile __COG2CON0bits_t COG2CON0bits;
 731
 732 __at(0x0714) __sfr COG2CON1;
 733 __at(0x0714) volatile __COG2CON1bits_t COG2CON1bits;
 734
 735 __at(0x0715) __sfr COG2RIS0;
 736 __at(0x0715) volatile __COG2RIS0bits_t COG2RIS0bits;
 737
 738 __at(0x0716) __sfr COG2RIS1;
 739 __at(0x0716) volatile __COG2RIS1bits_t COG2RIS1bits;
 740
 741 __at(0x0717) __sfr COG2RSIM0;
 742 __at(0x0717) volatile __COG2RSIM0bits_t COG2RSIM0bits;
 743
 744 __at(0x0718) __sfr COG2RSIM1;
 745 __at(0x0718) volatile __COG2RSIM1bits_t COG2RSIM1bits;
 746
 747 __at(0x0719) __sfr COG2FIS0;
 748 __at(0x0719) volatile __COG2FIS0bits_t COG2FIS0bits;
 749
 750 __at(0x071A) __sfr COG2FIS1;
 751 __at(0x071A) volatile __COG2FIS1bits_t COG2FIS1bits;
 752
 753 __at(0x071B) __sfr COG2FSIM0;
 754 __at(0x071B) volatile __COG2FSIM0bits_t COG2FSIM0bits;
 755
 756 __at(0x071C) __sfr COG2FSIM1;
 757 __at(0x071C) volatile __COG2FSIM1bits_t COG2FSIM1bits;
 758
 759 __at(0x071D) __sfr COG2ASD0;
 760 __at(0x071D) volatile __COG2ASD0bits_t COG2ASD0bits;
 761
 762 __at(0x071E) __sfr COG2ASD1;
 763 __at(0x071E) volatile __COG2ASD1bits_t COG2ASD1bits;
 764
 765 __at(0x071F) __sfr COG2STR;
 766 __at(0x071F) volatile __COG2STRbits_t COG2STRbits;
 767
 768 __at(0x0794) __sfr PRG1RTSS;
 769 __at(0x0794) volatile __PRG1RTSSbits_t PRG1RTSSbits;
 770
 771 __at(0x0795) __sfr PRG1FTSS;
 772 __at(0x0795) volatile __PRG1FTSSbits_t PRG1FTSSbits;
 773
 774 __at(0x0796) __sfr PRG1INS;
 775 __at(0x0796) volatile __PRG1INSbits_t PRG1INSbits;
 776
 777 __at(0x0797) __sfr PRG1CON0;
 778 __at(0x0797) volatile __PRG1CON0bits_t PRG1CON0bits;
 779
 780 __at(0x0798) __sfr PRG1CON1;
 781 __at(0x0798) volatile __PRG1CON1bits_t PRG1CON1bits;
 782
 783 __at(0x0799) __sfr PRG1CON2;
 784 __at(0x0799) volatile __PRG1CON2bits_t PRG1CON2bits;
 785
 786 __at(0x079A) __sfr PRG2RTSS;
 787 __at(0x079A) volatile __PRG2RTSSbits_t PRG2RTSSbits;
 788
 789 __at(0x079B) __sfr PRG2FTSS;
 790 __at(0x079B) volatile __PRG2FTSSbits_t PRG2FTSSbits;
 791
 792 __at(0x079C) __sfr PRG2INS;
 793 __at(0x079C) volatile __PRG2INSbits_t PRG2INSbits;
 794
 795 __at(0x079D) __sfr PRG2CON0;
 796 __at(0x079D) volatile __PRG2CON0bits_t PRG2CON0bits;
 797
 798 __at(0x079E) __sfr PRG2CON1;
 799 __at(0x079E) volatile __PRG2CON1bits_t PRG2CON1bits;
 800
 801 __at(0x079F) __sfr PRG2CON2;
 802 __at(0x079F) volatile __PRG2CON2bits_t PRG2CON2bits;
 803
 804 __at(0x0D8E) __sfr PWMEN;
 805 __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
 806
 807 __at(0x0D8F) __sfr PWMLD;
 808 __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
 809
 810 __at(0x0D90) __sfr PWMOUT;
 811 __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
 812
 813 __at(0x0D91) __sfr PWM5PH;
 814
 815 __at(0x0D91) __sfr PWM5PHL;
 816 __at(0x0D91) volatile __PWM5PHLbits_t PWM5PHLbits;
 817
 818 __at(0x0D92) __sfr PWM5PHH;
 819 __at(0x0D92) volatile __PWM5PHHbits_t PWM5PHHbits;
 820
 821 __at(0x0D93) __sfr PWM5DC;
 822
 823 __at(0x0D93) __sfr PWM5DCL;
 824 __at(0x0D93) volatile __PWM5DCLbits_t PWM5DCLbits;
 825
 826 __at(0x0D94) __sfr PWM5DCH;
 827 __at(0x0D94) volatile __PWM5DCHbits_t PWM5DCHbits;
 828
 829 __at(0x0D95) __sfr PWM5PR;
 830
 831 __at(0x0D95) __sfr PWM5PRL;
 832 __at(0x0D95) volatile __PWM5PRLbits_t PWM5PRLbits;
 833
 834 __at(0x0D96) __sfr PWM5PRH;
 835 __at(0x0D96) volatile __PWM5PRHbits_t PWM5PRHbits;
 836
 837 __at(0x0D97) __sfr PWM5OF;
 838
 839 __at(0x0D97) __sfr PWM5OFL;
 840 __at(0x0D97) volatile __PWM5OFLbits_t PWM5OFLbits;
 841
 842 __at(0x0D98) __sfr PWM5OFH;
 843 __at(0x0D98) volatile __PWM5OFHbits_t PWM5OFHbits;
 844
 845 __at(0x0D99) __sfr PWM5TMR;
 846
 847 __at(0x0D99) __sfr PWM5TMRL;
 848 __at(0x0D99) volatile __PWM5TMRLbits_t PWM5TMRLbits;
 849
 850 __at(0x0D9A) __sfr PWM5TMRH;
 851 __at(0x0D9A) volatile __PWM5TMRHbits_t PWM5TMRHbits;
 852
 853 __at(0x0D9B) __sfr PWM5CON;
 854 __at(0x0D9B) volatile __PWM5CONbits_t PWM5CONbits;
 855
 856 __at(0x0D9C) __sfr PWM5INTCON;
 857 __at(0x0D9C) volatile __PWM5INTCONbits_t PWM5INTCONbits;
 858
 859 __at(0x0D9C) __sfr PWM5INTE;
 860 __at(0x0D9C) volatile __PWM5INTEbits_t PWM5INTEbits;
 861
 862 __at(0x0D9D) __sfr PWM5INTF;
 863 __at(0x0D9D) volatile __PWM5INTFbits_t PWM5INTFbits;
 864
 865 __at(0x0D9D) __sfr PWM5INTFLG;
 866 __at(0x0D9D) volatile __PWM5INTFLGbits_t PWM5INTFLGbits;
 867
 868 __at(0x0D9E) __sfr PWM5CLKCON;
 869 __at(0x0D9E) volatile __PWM5CLKCONbits_t PWM5CLKCONbits;
 870
 871 __at(0x0D9F) __sfr PWM5LDCON;
 872 __at(0x0D9F) volatile __PWM5LDCONbits_t PWM5LDCONbits;
 873
 874 __at(0x0DA0) __sfr PWM5OFCON;
 875 __at(0x0DA0) volatile __PWM5OFCONbits_t PWM5OFCONbits;
 876
 877 __at(0x0DA1) __sfr PWM6PH;
 878
 879 __at(0x0DA1) __sfr PWM6PHL;
 880 __at(0x0DA1) volatile __PWM6PHLbits_t PWM6PHLbits;
 881
 882 __at(0x0DA2) __sfr PWM6PHH;
 883 __at(0x0DA2) volatile __PWM6PHHbits_t PWM6PHHbits;
 884
 885 __at(0x0DA3) __sfr PWM6DC;
 886
 887 __at(0x0DA3) __sfr PWM6DCL;
 888 __at(0x0DA3) volatile __PWM6DCLbits_t PWM6DCLbits;
 889
 890 __at(0x0DA4) __sfr PWM6DCH;
 891 __at(0x0DA4) volatile __PWM6DCHbits_t PWM6DCHbits;
 892
 893 __at(0x0DA5) __sfr PWM6PR;
 894
 895 __at(0x0DA5) __sfr PWM6PRL;
 896 __at(0x0DA5) volatile __PWM6PRLbits_t PWM6PRLbits;
 897
 898 __at(0x0DA6) __sfr PWM6PRH;
 899 __at(0x0DA6) volatile __PWM6PRHbits_t PWM6PRHbits;
 900
 901 __at(0x0DA7) __sfr PWM6OF;
 902
 903 __at(0x0DA7) __sfr PWM6OFL;
 904 __at(0x0DA7) volatile __PWM6OFLbits_t PWM6OFLbits;
 905
 906 __at(0x0DA8) __sfr PWM6OFH;
 907 __at(0x0DA8) volatile __PWM6OFHbits_t PWM6OFHbits;
 908
 909 __at(0x0DA9) __sfr PWM6TMR;
 910
 911 __at(0x0DA9) __sfr PWM6TMRL;
 912 __at(0x0DA9) volatile __PWM6TMRLbits_t PWM6TMRLbits;
 913
 914 __at(0x0DAA) __sfr PWM6TMRH;
 915 __at(0x0DAA) volatile __PWM6TMRHbits_t PWM6TMRHbits;
 916
 917 __at(0x0DAB) __sfr PWM6CON;
 918 __at(0x0DAB) volatile __PWM6CONbits_t PWM6CONbits;
 919
 920 __at(0x0DAC) __sfr PWM6INTCON;
 921 __at(0x0DAC) volatile __PWM6INTCONbits_t PWM6INTCONbits;
 922
 923 __at(0x0DAC) __sfr PWM6INTE;
 924 __at(0x0DAC) volatile __PWM6INTEbits_t PWM6INTEbits;
 925
 926 __at(0x0DAD) __sfr PWM6INTF;
 927 __at(0x0DAD) volatile __PWM6INTFbits_t PWM6INTFbits;
 928
 929 __at(0x0DAD) __sfr PWM6INTFLG;
 930 __at(0x0DAD) volatile __PWM6INTFLGbits_t PWM6INTFLGbits;
 931
 932 __at(0x0DAE) __sfr PWM6CLKCON;
 933 __at(0x0DAE) volatile __PWM6CLKCONbits_t PWM6CLKCONbits;
 934
 935 __at(0x0DAF) __sfr PWM6LDCON;
 936 __at(0x0DAF) volatile __PWM6LDCONbits_t PWM6LDCONbits;
 937
 938 __at(0x0DB0) __sfr PWM6OFCON;
 939 __at(0x0DB0) volatile __PWM6OFCONbits_t PWM6OFCONbits;
 940
 941 __at(0x0E0F) __sfr PPSLOCK;
 942 __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits;
 943
 944 __at(0x0E10) __sfr INTPPS;
 945
 946 __at(0x0E11) __sfr T0CKIPPS;
 947
 948 __at(0x0E12) __sfr T1CKIPPS;
 949
 950 __at(0x0E13) __sfr T1GPPS;
 951
 952 __at(0x0E14) __sfr CCP1PPS;
 953
 954 __at(0x0E15) __sfr CCP2PPS;
 955
 956 __at(0x0E16) __sfr COG1INPPS;
 957
 958 __at(0x0E17) __sfr COG2INPPS;
 959
 960 __at(0x0E19) __sfr T2CKIPPS;
 961
 962 __at(0x0E1A) __sfr T3CKIPPS;
 963
 964 __at(0x0E1B) __sfr T3GPPS;
 965
 966 __at(0x0E1C) __sfr T4CKIPPS;
 967
 968 __at(0x0E1D) __sfr T5CKIPPS;
 969
 970 __at(0x0E1E) __sfr T5GPPS;
 971
 972 __at(0x0E1F) __sfr T6CKIPPS;
 973
 974 __at(0x0E20) __sfr SSPCLKPPS;
 975
 976 __at(0x0E21) __sfr SSPDATPPS;
 977
 978 __at(0x0E22) __sfr SSPSSPPS;
 979
 980 __at(0x0E24) __sfr RXPPS;
 981
 982 __at(0x0E25) __sfr CKPPS;
 983
 984 __at(0x0E28) __sfr CLCIN0PPS;
 985
 986 __at(0x0E29) __sfr CLCIN1PPS;
 987
 988 __at(0x0E2A) __sfr CLCIN2PPS;
 989
 990 __at(0x0E2B) __sfr CLCIN3PPS;
 991
 992 __at(0x0E2C) __sfr PRG1RPPS;
 993
 994 __at(0x0E2D) __sfr PRG1FPPS;
 995
 996 __at(0x0E2E) __sfr PRG2RPPS;
 997
 998 __at(0x0E2F) __sfr PRG2FPPS;
 999
1000 __at(0x0E30) __sfr MD1CHPPS;
1001
1002 __at(0x0E31) __sfr MD1CLPPS;
1003
1004 __at(0x0E32) __sfr MD1MODPPS;
1005
1006 __at(0x0E33) __sfr MD2CHPPS;
1007
1008 __at(0x0E34) __sfr MD2CLPPS;
1009
1010 __at(0x0E35) __sfr MD2MODPPS;
1011
1012 __at(0x0E90) __sfr RA0PPS;
1013
1014 __at(0x0E91) __sfr RA1PPS;
1015
1016 __at(0x0E92) __sfr RA2PPS;
1017
1018 __at(0x0E94) __sfr RA4PPS;
1019
1020 __at(0x0E95) __sfr RA5PPS;
1021
1022 __at(0x0E9C) __sfr RB4PPS;
1023
1024 __at(0x0E9D) __sfr RB5PPS;
1025
1026 __at(0x0E9E) __sfr RB6PPS;
1027
1028 __at(0x0E9F) __sfr RB7PPS;
1029
1030 __at(0x0EA0) __sfr RC0PPS;
1031
1032 __at(0x0EA1) __sfr RC1PPS;
1033
1034 __at(0x0EA2) __sfr RC2PPS;
1035
1036 __at(0x0EA3) __sfr RC3PPS;
1037
1038 __at(0x0EA4) __sfr RC4PPS;
1039
1040 __at(0x0EA5) __sfr RC5PPS;
1041
1042 __at(0x0EA6) __sfr RC6PPS;
1043
1044 __at(0x0EA7) __sfr RC7PPS;
1045
1046 __at(0x0F0F) __sfr CLCDATA;
1047 __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
1048
1049 __at(0x0F10) __sfr CLC1CON;
1050 __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
1051
1052 __at(0x0F11) __sfr CLC1POL;
1053 __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
1054
1055 __at(0x0F12) __sfr CLC1SEL0;
1056 __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
1057
1058 __at(0x0F13) __sfr CLC1SEL1;
1059 __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
1060
1061 __at(0x0F14) __sfr CLC1SEL2;
1062 __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits;
1063
1064 __at(0x0F15) __sfr CLC1SEL3;
1065 __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits;
1066
1067 __at(0x0F16) __sfr CLC1GLS0;
1068 __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits;
1069
1070 __at(0x0F17) __sfr CLC1GLS1;
1071 __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits;
1072
1073 __at(0x0F18) __sfr CLC1GLS2;
1074 __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits;
1075
1076 __at(0x0F19) __sfr CLC1GLS3;
1077 __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits;
1078
1079 __at(0x0F1A) __sfr CLC2CON;
1080 __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits;
1081
1082 __at(0x0F1B) __sfr CLC2POL;
1083 __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits;
1084
1085 __at(0x0F1C) __sfr CLC2SEL0;
1086 __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits;
1087
1088 __at(0x0F1D) __sfr CLC2SEL1;
1089 __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits;
1090
1091 __at(0x0F1E) __sfr CLC2SEL2;
1092 __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits;
1093
1094 __at(0x0F1F) __sfr CLC2SEL3;
1095 __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits;
1096
1097 __at(0x0F20) __sfr CLC2GLS0;
1098 __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits;
1099
1100 __at(0x0F21) __sfr CLC2GLS1;
1101 __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits;
1102
1103 __at(0x0F22) __sfr CLC2GLS2;
1104 __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits;
1105
1106 __at(0x0F23) __sfr CLC2GLS3;
1107 __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits;
1108
1109 __at(0x0F24) __sfr CLC3CON;
1110 __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits;
1111
1112 __at(0x0F25) __sfr CLC3POL;
1113 __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits;
1114
1115 __at(0x0F26) __sfr CLC3SEL0;
1116 __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits;
1117
1118 __at(0x0F27) __sfr CLC3SEL1;
1119 __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits;
1120
1121 __at(0x0F28) __sfr CLC3SEL2;
1122 __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits;
1123
1124 __at(0x0F29) __sfr CLC3SEL3;
1125 __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits;
1126
1127 __at(0x0F2A) __sfr CLC3GLS0;
1128 __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits;
1129
1130 __at(0x0F2B) __sfr CLC3GLS1;
1131 __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits;
1132
1133 __at(0x0F2C) __sfr CLC3GLS2;
1134 __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits;
1135
1136 __at(0x0F2D) __sfr CLC3GLS3;
1137 __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits;
1138
1139 __at(0x0FE4) __sfr STATUS_SHAD;
1140 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
1141
1142 __at(0x0FE5) __sfr WREG_SHAD;
1143
1144 __at(0x0FE6) __sfr BSR_SHAD;
1145
1146 __at(0x0FE7) __sfr PCLATH_SHAD;
1147
1148 __at(0x0FE8) __sfr FSR0L_SHAD;
1149
1150 __at(0x0FE9) __sfr FSR0H_SHAD;
1151
1152 __at(0x0FEA) __sfr FSR1L_SHAD;
1153
1154 __at(0x0FEB) __sfr FSR1H_SHAD;
1155
1156 __at(0x0FED) __sfr STKPTR;
1157
1158 __at(0x0FEE) __sfr TOSL;
1159
1160 __at(0x0FEF) __sfr TOSH;