sdcc/device/non-free/lib/pic14/libdev/pic16f18855.c

   1 /*
   2  * This definitions of the PIC16F18855 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:25 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic16f18855.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF0;
  30
  31 __at(0x0001) __sfr INDF1;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR0;
  39
  40 __at(0x0004) __sfr FSR0L;
  41
  42 __at(0x0005) __sfr FSR0H;
  43
  44 __at(0x0006) __sfr FSR1;
  45
  46 __at(0x0006) __sfr FSR1L;
  47
  48 __at(0x0007) __sfr FSR1H;
  49
  50 __at(0x0008) __sfr BSR;
  51 __at(0x0008) volatile __BSRbits_t BSRbits;
  52
  53 __at(0x0009) __sfr WREG;
  54
  55 __at(0x000A) __sfr PCLATH;
  56
  57 __at(0x000B) __sfr INTCON;
  58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  59
  60 __at(0x000C) __sfr PORTA;
  61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
  62
  63 __at(0x000D) __sfr PORTB;
  64 __at(0x000D) volatile __PORTBbits_t PORTBbits;
  65
  66 __at(0x000E) __sfr PORTC;
  67 __at(0x000E) volatile __PORTCbits_t PORTCbits;
  68
  69 __at(0x0010) __sfr PORTE;
  70 __at(0x0010) volatile __PORTEbits_t PORTEbits;
  71
  72 __at(0x0011) __sfr TRISA;
  73 __at(0x0011) volatile __TRISAbits_t TRISAbits;
  74
  75 __at(0x0012) __sfr TRISB;
  76 __at(0x0012) volatile __TRISBbits_t TRISBbits;
  77
  78 __at(0x0013) __sfr TRISC;
  79 __at(0x0013) volatile __TRISCbits_t TRISCbits;
  80
  81 __at(0x0016) __sfr LATA;
  82 __at(0x0016) volatile __LATAbits_t LATAbits;
  83
  84 __at(0x0017) __sfr LATB;
  85 __at(0x0017) volatile __LATBbits_t LATBbits;
  86
  87 __at(0x0018) __sfr LATC;
  88 __at(0x0018) volatile __LATCbits_t LATCbits;
  89
  90 __at(0x001C) __sfr TMR0;
  91 __at(0x001C) volatile __TMR0bits_t TMR0bits;
  92
  93 __at(0x001C) __sfr TMR0L;
  94 __at(0x001C) volatile __TMR0Lbits_t TMR0Lbits;
  95
  96 __at(0x001D) __sfr PR0;
  97 __at(0x001D) volatile __PR0bits_t PR0bits;
  98
  99 __at(0x001D) __sfr TMR0H;
 100 __at(0x001D) volatile __TMR0Hbits_t TMR0Hbits;
 101
 102 __at(0x001E) __sfr T0CON0;
 103 __at(0x001E) volatile __T0CON0bits_t T0CON0bits;
 104
 105 __at(0x001F) __sfr T0CON1;
 106 __at(0x001F) volatile __T0CON1bits_t T0CON1bits;
 107
 108 __at(0x008C) __sfr ADRES;
 109
 110 __at(0x008C) __sfr ADRESL;
 111
 112 __at(0x008D) __sfr ADRESH;
 113
 114 __at(0x008E) __sfr ADPREV;
 115
 116 __at(0x008E) __sfr ADPREVL;
 117 __at(0x008E) volatile __ADPREVLbits_t ADPREVLbits;
 118
 119 __at(0x008F) __sfr ADPREVH;
 120 __at(0x008F) volatile __ADPREVHbits_t ADPREVHbits;
 121
 122 __at(0x0090) __sfr ADACC;
 123
 124 __at(0x0090) __sfr ADACCL;
 125 __at(0x0090) volatile __ADACCLbits_t ADACCLbits;
 126
 127 __at(0x0091) __sfr ADACCH;
 128 __at(0x0091) volatile __ADACCHbits_t ADACCHbits;
 129
 130 __at(0x0093) __sfr ADCON0;
 131 __at(0x0093) volatile __ADCON0bits_t ADCON0bits;
 132
 133 __at(0x0094) __sfr ADCON1;
 134 __at(0x0094) volatile __ADCON1bits_t ADCON1bits;
 135
 136 __at(0x0095) __sfr ADCON2;
 137 __at(0x0095) volatile __ADCON2bits_t ADCON2bits;
 138
 139 __at(0x0096) __sfr ADCON3;
 140 __at(0x0096) volatile __ADCON3bits_t ADCON3bits;
 141
 142 __at(0x0097) __sfr ADSTAT;
 143 __at(0x0097) volatile __ADSTATbits_t ADSTATbits;
 144
 145 __at(0x0098) __sfr ADCLK;
 146 __at(0x0098) volatile __ADCLKbits_t ADCLKbits;
 147
 148 __at(0x0099) __sfr ADACT;
 149 __at(0x0099) volatile __ADACTbits_t ADACTbits;
 150
 151 __at(0x009A) __sfr ADREF;
 152 __at(0x009A) volatile __ADREFbits_t ADREFbits;
 153
 154 __at(0x009B) __sfr ADCAP;
 155 __at(0x009B) volatile __ADCAPbits_t ADCAPbits;
 156
 157 __at(0x009C) __sfr ADPRE;
 158 __at(0x009C) volatile __ADPREbits_t ADPREbits;
 159
 160 __at(0x009D) __sfr ADACQ;
 161 __at(0x009D) volatile __ADACQbits_t ADACQbits;
 162
 163 __at(0x009E) __sfr ADPCH;
 164 __at(0x009E) volatile __ADPCHbits_t ADPCHbits;
 165
 166 __at(0x010C) __sfr ADCNT;
 167 __at(0x010C) volatile __ADCNTbits_t ADCNTbits;
 168
 169 __at(0x010D) __sfr ADRPT;
 170 __at(0x010D) volatile __ADRPTbits_t ADRPTbits;
 171
 172 __at(0x010E) __sfr ADLTH;
 173
 174 __at(0x010E) __sfr ADLTHL;
 175 __at(0x010E) volatile __ADLTHLbits_t ADLTHLbits;
 176
 177 __at(0x010F) __sfr ADLTHH;
 178 __at(0x010F) volatile __ADLTHHbits_t ADLTHHbits;
 179
 180 __at(0x0110) __sfr ADUTH;
 181
 182 __at(0x0110) __sfr ADUTHL;
 183 __at(0x0110) volatile __ADUTHLbits_t ADUTHLbits;
 184
 185 __at(0x0111) __sfr ADUTHH;
 186 __at(0x0111) volatile __ADUTHHbits_t ADUTHHbits;
 187
 188 __at(0x0112) __sfr ADSTPT;
 189
 190 __at(0x0112) __sfr ADSTPTL;
 191 __at(0x0112) volatile __ADSTPTLbits_t ADSTPTLbits;
 192
 193 __at(0x0113) __sfr ADSTPTH;
 194 __at(0x0113) volatile __ADSTPTHbits_t ADSTPTHbits;
 195
 196 __at(0x0114) __sfr ADFLTR;
 197
 198 __at(0x0114) __sfr ADFLTRL;
 199 __at(0x0114) volatile __ADFLTRLbits_t ADFLTRLbits;
 200
 201 __at(0x0115) __sfr ADFLTRH;
 202 __at(0x0115) volatile __ADFLTRHbits_t ADFLTRHbits;
 203
 204 __at(0x0116) __sfr ADERR;
 205
 206 __at(0x0116) __sfr ADERRL;
 207 __at(0x0116) volatile __ADERRLbits_t ADERRLbits;
 208
 209 __at(0x0117) __sfr ADERRH;
 210 __at(0x0117) volatile __ADERRHbits_t ADERRHbits;
 211
 212 __at(0x0119) __sfr RC1REG;
 213
 214 __at(0x0119) __sfr RCREG;
 215
 216 __at(0x0119) __sfr RCREG1;
 217
 218 __at(0x011A) __sfr TX1REG;
 219
 220 __at(0x011A) __sfr TXREG;
 221
 222 __at(0x011A) __sfr TXREG1;
 223
 224 __at(0x011B) __sfr SP1BRG;
 225
 226 __at(0x011B) __sfr SP1BRGL;
 227
 228 __at(0x011B) __sfr SPBRG;
 229
 230 __at(0x011B) __sfr SPBRG1;
 231
 232 __at(0x011B) __sfr SPBRGL;
 233
 234 __at(0x011C) __sfr SP1BRGH;
 235
 236 __at(0x011C) __sfr SPBRGH;
 237
 238 __at(0x011C) __sfr SPBRGH1;
 239
 240 __at(0x011D) __sfr RC1STA;
 241 __at(0x011D) volatile __RC1STAbits_t RC1STAbits;
 242
 243 __at(0x011D) __sfr RCSTA;
 244 __at(0x011D) volatile __RCSTAbits_t RCSTAbits;
 245
 246 __at(0x011D) __sfr RCSTA1;
 247 __at(0x011D) volatile __RCSTA1bits_t RCSTA1bits;
 248
 249 __at(0x011E) __sfr TX1STA;
 250 __at(0x011E) volatile __TX1STAbits_t TX1STAbits;
 251
 252 __at(0x011E) __sfr TXSTA;
 253 __at(0x011E) volatile __TXSTAbits_t TXSTAbits;
 254
 255 __at(0x011E) __sfr TXSTA1;
 256 __at(0x011E) volatile __TXSTA1bits_t TXSTA1bits;
 257
 258 __at(0x011F) __sfr BAUD1CON;
 259 __at(0x011F) volatile __BAUD1CONbits_t BAUD1CONbits;
 260
 261 __at(0x011F) __sfr BAUDCON;
 262 __at(0x011F) volatile __BAUDCONbits_t BAUDCONbits;
 263
 264 __at(0x011F) __sfr BAUDCON1;
 265 __at(0x011F) volatile __BAUDCON1bits_t BAUDCON1bits;
 266
 267 __at(0x011F) __sfr BAUDCTL;
 268 __at(0x011F) volatile __BAUDCTLbits_t BAUDCTLbits;
 269
 270 __at(0x011F) __sfr BAUDCTL1;
 271 __at(0x011F) volatile __BAUDCTL1bits_t BAUDCTL1bits;
 272
 273 __at(0x018C) __sfr SSP1BUF;
 274
 275 __at(0x018D) __sfr SSP1ADD;
 276
 277 __at(0x018E) __sfr SSP1MSK;
 278 __at(0x018E) volatile __SSP1MSKbits_t SSP1MSKbits;
 279
 280 __at(0x018F) __sfr SSP1STAT;
 281 __at(0x018F) volatile __SSP1STATbits_t SSP1STATbits;
 282
 283 __at(0x0190) __sfr SSP1CON1;
 284 __at(0x0190) volatile __SSP1CON1bits_t SSP1CON1bits;
 285
 286 __at(0x0191) __sfr SSP1CON2;
 287 __at(0x0191) volatile __SSP1CON2bits_t SSP1CON2bits;
 288
 289 __at(0x0192) __sfr SSP1CON3;
 290 __at(0x0192) volatile __SSP1CON3bits_t SSP1CON3bits;
 291
 292 __at(0x0196) __sfr SSP2BUF;
 293
 294 __at(0x0197) __sfr SSP2ADD;
 295
 296 __at(0x0198) __sfr SSP2MSK;
 297 __at(0x0198) volatile __SSP2MSKbits_t SSP2MSKbits;
 298
 299 __at(0x0199) __sfr SSP2STAT;
 300 __at(0x0199) volatile __SSP2STATbits_t SSP2STATbits;
 301
 302 __at(0x019A) __sfr SSP2CON1;
 303 __at(0x019A) volatile __SSP2CON1bits_t SSP2CON1bits;
 304
 305 __at(0x019B) __sfr SSP2CON2;
 306 __at(0x019B) volatile __SSP2CON2bits_t SSP2CON2bits;
 307
 308 __at(0x019C) __sfr SSP2CON3;
 309 __at(0x019C) volatile __SSP2CON3bits_t SSP2CON3bits;
 310
 311 __at(0x020C) __sfr TMR1L;
 312 __at(0x020C) volatile __TMR1Lbits_t TMR1Lbits;
 313
 314 __at(0x020D) __sfr TMR1H;
 315 __at(0x020D) volatile __TMR1Hbits_t TMR1Hbits;
 316
 317 __at(0x020E) __sfr T1CON;
 318 __at(0x020E) volatile __T1CONbits_t T1CONbits;
 319
 320 __at(0x020F) __sfr PR1;
 321 __at(0x020F) volatile __PR1bits_t PR1bits;
 322
 323 __at(0x020F) __sfr T1GCON;
 324 __at(0x020F) volatile __T1GCONbits_t T1GCONbits;
 325
 326 __at(0x0210) __sfr T1GATE;
 327 __at(0x0210) volatile __T1GATEbits_t T1GATEbits;
 328
 329 __at(0x0210) __sfr TMR1GATE;
 330 __at(0x0210) volatile __TMR1GATEbits_t TMR1GATEbits;
 331
 332 __at(0x0211) __sfr T1CLK;
 333 __at(0x0211) volatile __T1CLKbits_t T1CLKbits;
 334
 335 __at(0x0211) __sfr TMR1CLK;
 336 __at(0x0211) volatile __TMR1CLKbits_t TMR1CLKbits;
 337
 338 __at(0x0212) __sfr TMR3L;
 339 __at(0x0212) volatile __TMR3Lbits_t TMR3Lbits;
 340
 341 __at(0x0213) __sfr TMR3H;
 342 __at(0x0213) volatile __TMR3Hbits_t TMR3Hbits;
 343
 344 __at(0x0214) __sfr T3CON;
 345 __at(0x0214) volatile __T3CONbits_t T3CONbits;
 346
 347 __at(0x0215) __sfr PR3;
 348 __at(0x0215) volatile __PR3bits_t PR3bits;
 349
 350 __at(0x0215) __sfr T3GCON;
 351 __at(0x0215) volatile __T3GCONbits_t T3GCONbits;
 352
 353 __at(0x0216) __sfr T3GATE;
 354 __at(0x0216) volatile __T3GATEbits_t T3GATEbits;
 355
 356 __at(0x0216) __sfr TMR3GATE;
 357 __at(0x0216) volatile __TMR3GATEbits_t TMR3GATEbits;
 358
 359 __at(0x0217) __sfr T3CLK;
 360 __at(0x0217) volatile __T3CLKbits_t T3CLKbits;
 361
 362 __at(0x0217) __sfr TMR3CLK;
 363 __at(0x0217) volatile __TMR3CLKbits_t TMR3CLKbits;
 364
 365 __at(0x0218) __sfr TMR5L;
 366 __at(0x0218) volatile __TMR5Lbits_t TMR5Lbits;
 367
 368 __at(0x0219) __sfr TMR5H;
 369 __at(0x0219) volatile __TMR5Hbits_t TMR5Hbits;
 370
 371 __at(0x021A) __sfr T5CON;
 372 __at(0x021A) volatile __T5CONbits_t T5CONbits;
 373
 374 __at(0x021B) __sfr PR5;
 375 __at(0x021B) volatile __PR5bits_t PR5bits;
 376
 377 __at(0x021B) __sfr T5GCON;
 378 __at(0x021B) volatile __T5GCONbits_t T5GCONbits;
 379
 380 __at(0x021C) __sfr T5GATE;
 381 __at(0x021C) volatile __T5GATEbits_t T5GATEbits;
 382
 383 __at(0x021C) __sfr TMR5GATE;
 384 __at(0x021C) volatile __TMR5GATEbits_t TMR5GATEbits;
 385
 386 __at(0x021D) __sfr T5CLK;
 387 __at(0x021D) volatile __T5CLKbits_t T5CLKbits;
 388
 389 __at(0x021D) __sfr TMR5CLK;
 390 __at(0x021D) volatile __TMR5CLKbits_t TMR5CLKbits;
 391
 392 __at(0x021E) __sfr CCPTMRS0;
 393 __at(0x021E) volatile __CCPTMRS0bits_t CCPTMRS0bits;
 394
 395 __at(0x021F) __sfr CCPTMRS1;
 396 __at(0x021F) volatile __CCPTMRS1bits_t CCPTMRS1bits;
 397
 398 __at(0x028C) __sfr T2TMR;
 399
 400 __at(0x028C) __sfr TMR2;
 401
 402 __at(0x028D) __sfr PR2;
 403
 404 __at(0x028D) __sfr T2PR;
 405
 406 __at(0x028E) __sfr T2CON;
 407 __at(0x028E) volatile __T2CONbits_t T2CONbits;
 408
 409 __at(0x028F) __sfr T2HLT;
 410 __at(0x028F) volatile __T2HLTbits_t T2HLTbits;
 411
 412 __at(0x0290) __sfr T2CLKCON;
 413 __at(0x0290) volatile __T2CLKCONbits_t T2CLKCONbits;
 414
 415 __at(0x0291) __sfr T2RST;
 416 __at(0x0291) volatile __T2RSTbits_t T2RSTbits;
 417
 418 __at(0x0292) __sfr T4TMR;
 419
 420 __at(0x0292) __sfr TMR4;
 421
 422 __at(0x0293) __sfr PR4;
 423
 424 __at(0x0293) __sfr T4PR;
 425
 426 __at(0x0294) __sfr T4CON;
 427 __at(0x0294) volatile __T4CONbits_t T4CONbits;
 428
 429 __at(0x0295) __sfr T4HLT;
 430 __at(0x0295) volatile __T4HLTbits_t T4HLTbits;
 431
 432 __at(0x0296) __sfr T4CLKCON;
 433 __at(0x0296) volatile __T4CLKCONbits_t T4CLKCONbits;
 434
 435 __at(0x0297) __sfr T4RST;
 436 __at(0x0297) volatile __T4RSTbits_t T4RSTbits;
 437
 438 __at(0x0298) __sfr T6TMR;
 439
 440 __at(0x0298) __sfr TMR6;
 441
 442 __at(0x0299) __sfr PR6;
 443
 444 __at(0x0299) __sfr T6PR;
 445
 446 __at(0x029A) __sfr T6CON;
 447 __at(0x029A) volatile __T6CONbits_t T6CONbits;
 448
 449 __at(0x029B) __sfr T6HLT;
 450 __at(0x029B) volatile __T6HLTbits_t T6HLTbits;
 451
 452 __at(0x029C) __sfr T6CLKCON;
 453 __at(0x029C) volatile __T6CLKCONbits_t T6CLKCONbits;
 454
 455 __at(0x029D) __sfr T6RST;
 456 __at(0x029D) volatile __T6RSTbits_t T6RSTbits;
 457
 458 __at(0x030C) __sfr CCPR1;
 459
 460 __at(0x030C) __sfr CCPR1L;
 461
 462 __at(0x030D) __sfr CCPR1H;
 463
 464 __at(0x030E) __sfr CCP1CON;
 465 __at(0x030E) volatile __CCP1CONbits_t CCP1CONbits;
 466
 467 __at(0x030F) __sfr CCP1CAP;
 468 __at(0x030F) volatile __CCP1CAPbits_t CCP1CAPbits;
 469
 470 __at(0x0310) __sfr CCPR2;
 471
 472 __at(0x0310) __sfr CCPR2L;
 473
 474 __at(0x0311) __sfr CCPR2H;
 475
 476 __at(0x0312) __sfr CCP2CON;
 477 __at(0x0312) volatile __CCP2CONbits_t CCP2CONbits;
 478
 479 __at(0x0313) __sfr CCP2CAP;
 480 __at(0x0313) volatile __CCP2CAPbits_t CCP2CAPbits;
 481
 482 __at(0x0314) __sfr CCPR3;
 483
 484 __at(0x0314) __sfr CCPR3L;
 485
 486 __at(0x0315) __sfr CCPR3H;
 487
 488 __at(0x0316) __sfr CCP3CON;
 489 __at(0x0316) volatile __CCP3CONbits_t CCP3CONbits;
 490
 491 __at(0x0317) __sfr CCP3CAP;
 492 __at(0x0317) volatile __CCP3CAPbits_t CCP3CAPbits;
 493
 494 __at(0x0318) __sfr CCPR4;
 495
 496 __at(0x0318) __sfr CCPR4L;
 497
 498 __at(0x0319) __sfr CCPR4H;
 499
 500 __at(0x031A) __sfr CCP4CON;
 501 __at(0x031A) volatile __CCP4CONbits_t CCP4CONbits;
 502
 503 __at(0x031B) __sfr CCP4CAP;
 504 __at(0x031B) volatile __CCP4CAPbits_t CCP4CAPbits;
 505
 506 __at(0x031C) __sfr CCPR5;
 507
 508 __at(0x031C) __sfr CCPR5L;
 509
 510 __at(0x031D) __sfr CCPR5H;
 511
 512 __at(0x031E) __sfr CCP5CON;
 513 __at(0x031E) volatile __CCP5CONbits_t CCP5CONbits;
 514
 515 __at(0x031F) __sfr CCP5CAP;
 516 __at(0x031F) volatile __CCP5CAPbits_t CCP5CAPbits;
 517
 518 __at(0x038C) __sfr PWM6DCL;
 519 __at(0x038C) volatile __PWM6DCLbits_t PWM6DCLbits;
 520
 521 __at(0x038D) __sfr PWM6DCH;
 522 __at(0x038D) volatile __PWM6DCHbits_t PWM6DCHbits;
 523
 524 __at(0x038E) __sfr PWM6CON;
 525 __at(0x038E) volatile __PWM6CONbits_t PWM6CONbits;
 526
 527 __at(0x0390) __sfr PWM7DCL;
 528 __at(0x0390) volatile __PWM7DCLbits_t PWM7DCLbits;
 529
 530 __at(0x0391) __sfr PWM7DCH;
 531 __at(0x0391) volatile __PWM7DCHbits_t PWM7DCHbits;
 532
 533 __at(0x0392) __sfr PWM7CON;
 534 __at(0x0392) volatile __PWM7CONbits_t PWM7CONbits;
 535
 536 __at(0x040C) __sfr SCANLADRL;
 537 __at(0x040C) volatile __SCANLADRLbits_t SCANLADRLbits;
 538
 539 __at(0x040D) __sfr SCANLADRH;
 540 __at(0x040D) volatile __SCANLADRHbits_t SCANLADRHbits;
 541
 542 __at(0x040E) __sfr SCANHADRL;
 543 __at(0x040E) volatile __SCANHADRLbits_t SCANHADRLbits;
 544
 545 __at(0x040F) __sfr SCANHADRH;
 546 __at(0x040F) volatile __SCANHADRHbits_t SCANHADRHbits;
 547
 548 __at(0x0410) __sfr SCANCON0;
 549 __at(0x0410) volatile __SCANCON0bits_t SCANCON0bits;
 550
 551 __at(0x0411) __sfr SCANTRIG;
 552 __at(0x0411) volatile __SCANTRIGbits_t SCANTRIGbits;
 553
 554 __at(0x0416) __sfr CRCDATA;
 555
 556 __at(0x0416) __sfr CRCDATL;
 557 __at(0x0416) volatile __CRCDATLbits_t CRCDATLbits;
 558
 559 __at(0x0417) __sfr CRCDATH;
 560 __at(0x0417) volatile __CRCDATHbits_t CRCDATHbits;
 561
 562 __at(0x0418) __sfr CRCACC;
 563
 564 __at(0x0418) __sfr CRCACCL;
 565 __at(0x0418) volatile __CRCACCLbits_t CRCACCLbits;
 566
 567 __at(0x0419) __sfr CRCACCH;
 568 __at(0x0419) volatile __CRCACCHbits_t CRCACCHbits;
 569
 570 __at(0x041A) __sfr CRCSHFT;
 571
 572 __at(0x041A) __sfr CRCSHIFTL;
 573 __at(0x041A) volatile __CRCSHIFTLbits_t CRCSHIFTLbits;
 574
 575 __at(0x041B) __sfr CRCSHIFTH;
 576 __at(0x041B) volatile __CRCSHIFTHbits_t CRCSHIFTHbits;
 577
 578 __at(0x041C) __sfr CRCXOR;
 579
 580 __at(0x041C) __sfr CRCXORL;
 581 __at(0x041C) volatile __CRCXORLbits_t CRCXORLbits;
 582
 583 __at(0x041D) __sfr CRCXORH;
 584 __at(0x041D) volatile __CRCXORHbits_t CRCXORHbits;
 585
 586 __at(0x041E) __sfr CRCCON0;
 587 __at(0x041E) volatile __CRCCON0bits_t CRCCON0bits;
 588
 589 __at(0x041F) __sfr CRCCON1;
 590 __at(0x041F) volatile __CRCCON1bits_t CRCCON1bits;
 591
 592 __at(0x048C) __sfr SMT1TMR;
 593
 594 __at(0x048C) __sfr SMT1TMRL;
 595 __at(0x048C) volatile __SMT1TMRLbits_t SMT1TMRLbits;
 596
 597 __at(0x048D) __sfr SMT1TMRH;
 598 __at(0x048D) volatile __SMT1TMRHbits_t SMT1TMRHbits;
 599
 600 __at(0x048E) __sfr SMT1TMRU;
 601 __at(0x048E) volatile __SMT1TMRUbits_t SMT1TMRUbits;
 602
 603 __at(0x048F) __sfr SMT1CPR;
 604
 605 __at(0x048F) __sfr SMT1CPRL;
 606 __at(0x048F) volatile __SMT1CPRLbits_t SMT1CPRLbits;
 607
 608 __at(0x0490) __sfr SMT1CPRH;
 609 __at(0x0490) volatile __SMT1CPRHbits_t SMT1CPRHbits;
 610
 611 __at(0x0491) __sfr SMT1CPRU;
 612 __at(0x0491) volatile __SMT1CPRUbits_t SMT1CPRUbits;
 613
 614 __at(0x0492) __sfr SMT1CPW;
 615
 616 __at(0x0492) __sfr SMT1CPWL;
 617 __at(0x0492) volatile __SMT1CPWLbits_t SMT1CPWLbits;
 618
 619 __at(0x0493) __sfr SMT1CPWH;
 620 __at(0x0493) volatile __SMT1CPWHbits_t SMT1CPWHbits;
 621
 622 __at(0x0494) __sfr SMT1CPWU;
 623 __at(0x0494) volatile __SMT1CPWUbits_t SMT1CPWUbits;
 624
 625 __at(0x0495) __sfr SMT1PR;
 626
 627 __at(0x0495) __sfr SMT1PRL;
 628 __at(0x0495) volatile __SMT1PRLbits_t SMT1PRLbits;
 629
 630 __at(0x0496) __sfr SMT1PRH;
 631 __at(0x0496) volatile __SMT1PRHbits_t SMT1PRHbits;
 632
 633 __at(0x0497) __sfr SMT1PRU;
 634 __at(0x0497) volatile __SMT1PRUbits_t SMT1PRUbits;
 635
 636 __at(0x0498) __sfr SMT1CON0;
 637 __at(0x0498) volatile __SMT1CON0bits_t SMT1CON0bits;
 638
 639 __at(0x0499) __sfr SMT1CON1;
 640 __at(0x0499) volatile __SMT1CON1bits_t SMT1CON1bits;
 641
 642 __at(0x049A) __sfr SMT1STAT;
 643 __at(0x049A) volatile __SMT1STATbits_t SMT1STATbits;
 644
 645 __at(0x049B) __sfr SMT1CLK;
 646 __at(0x049B) volatile __SMT1CLKbits_t SMT1CLKbits;
 647
 648 __at(0x049C) __sfr SMT1SIG;
 649 __at(0x049C) volatile __SMT1SIGbits_t SMT1SIGbits;
 650
 651 __at(0x049D) __sfr SMT1WIN;
 652 __at(0x049D) volatile __SMT1WINbits_t SMT1WINbits;
 653
 654 __at(0x050C) __sfr SMT2TMR;
 655
 656 __at(0x050C) __sfr SMT2TMRL;
 657 __at(0x050C) volatile __SMT2TMRLbits_t SMT2TMRLbits;
 658
 659 __at(0x050D) __sfr SMT2TMRH;
 660 __at(0x050D) volatile __SMT2TMRHbits_t SMT2TMRHbits;
 661
 662 __at(0x050E) __sfr SMT2TMRU;
 663 __at(0x050E) volatile __SMT2TMRUbits_t SMT2TMRUbits;
 664
 665 __at(0x050F) __sfr SMT2CPR;
 666
 667 __at(0x050F) __sfr SMT2CPRL;
 668 __at(0x050F) volatile __SMT2CPRLbits_t SMT2CPRLbits;
 669
 670 __at(0x0510) __sfr SMT2CPRH;
 671 __at(0x0510) volatile __SMT2CPRHbits_t SMT2CPRHbits;
 672
 673 __at(0x0511) __sfr SMT2CPRU;
 674 __at(0x0511) volatile __SMT2CPRUbits_t SMT2CPRUbits;
 675
 676 __at(0x0512) __sfr SMT2CPW;
 677
 678 __at(0x0512) __sfr SMT2CPWL;
 679 __at(0x0512) volatile __SMT2CPWLbits_t SMT2CPWLbits;
 680
 681 __at(0x0513) __sfr SMT2CPWH;
 682 __at(0x0513) volatile __SMT2CPWHbits_t SMT2CPWHbits;
 683
 684 __at(0x0514) __sfr SMT2CPWU;
 685 __at(0x0514) volatile __SMT2CPWUbits_t SMT2CPWUbits;
 686
 687 __at(0x0515) __sfr SMT2PR;
 688
 689 __at(0x0515) __sfr SMT2PRL;
 690 __at(0x0515) volatile __SMT2PRLbits_t SMT2PRLbits;
 691
 692 __at(0x0516) __sfr SMT2PRH;
 693 __at(0x0516) volatile __SMT2PRHbits_t SMT2PRHbits;
 694
 695 __at(0x0517) __sfr SMT2PRU;
 696 __at(0x0517) volatile __SMT2PRUbits_t SMT2PRUbits;
 697
 698 __at(0x0518) __sfr SMT2CON0;
 699 __at(0x0518) volatile __SMT2CON0bits_t SMT2CON0bits;
 700
 701 __at(0x0519) __sfr SMT2CON1;
 702 __at(0x0519) volatile __SMT2CON1bits_t SMT2CON1bits;
 703
 704 __at(0x051A) __sfr SMT2STAT;
 705 __at(0x051A) volatile __SMT2STATbits_t SMT2STATbits;
 706
 707 __at(0x051B) __sfr SMT2CLK;
 708 __at(0x051B) volatile __SMT2CLKbits_t SMT2CLKbits;
 709
 710 __at(0x051C) __sfr SMT2SIG;
 711 __at(0x051C) volatile __SMT2SIGbits_t SMT2SIGbits;
 712
 713 __at(0x051D) __sfr SMT2WIN;
 714 __at(0x051D) volatile __SMT2WINbits_t SMT2WINbits;
 715
 716 __at(0x058C) __sfr NCO1ACC;
 717
 718 __at(0x058C) __sfr NCO1ACCL;
 719 __at(0x058C) volatile __NCO1ACCLbits_t NCO1ACCLbits;
 720
 721 __at(0x058D) __sfr NCO1ACCH;
 722 __at(0x058D) volatile __NCO1ACCHbits_t NCO1ACCHbits;
 723
 724 __at(0x058E) __sfr NCO1ACCU;
 725 __at(0x058E) volatile __NCO1ACCUbits_t NCO1ACCUbits;
 726
 727 __at(0x058F) __sfr NCO1INC;
 728
 729 __at(0x058F) __sfr NCO1INCL;
 730 __at(0x058F) volatile __NCO1INCLbits_t NCO1INCLbits;
 731
 732 __at(0x0590) __sfr NCO1INCH;
 733 __at(0x0590) volatile __NCO1INCHbits_t NCO1INCHbits;
 734
 735 __at(0x0591) __sfr NCO1INCU;
 736 __at(0x0591) volatile __NCO1INCUbits_t NCO1INCUbits;
 737
 738 __at(0x0592) __sfr NCO1CON;
 739 __at(0x0592) volatile __NCO1CONbits_t NCO1CONbits;
 740
 741 __at(0x0593) __sfr NCO1CLK;
 742 __at(0x0593) volatile __NCO1CLKbits_t NCO1CLKbits;
 743
 744 __at(0x060C) __sfr CWG1CLKCON;
 745 __at(0x060C) volatile __CWG1CLKCONbits_t CWG1CLKCONbits;
 746
 747 __at(0x060D) __sfr CWG1ISM;
 748 __at(0x060D) volatile __CWG1ISMbits_t CWG1ISMbits;
 749
 750 __at(0x060E) __sfr CWG1DBR;
 751 __at(0x060E) volatile __CWG1DBRbits_t CWG1DBRbits;
 752
 753 __at(0x060F) __sfr CWG1DBF;
 754 __at(0x060F) volatile __CWG1DBFbits_t CWG1DBFbits;
 755
 756 __at(0x0610) __sfr CWG1CON0;
 757 __at(0x0610) volatile __CWG1CON0bits_t CWG1CON0bits;
 758
 759 __at(0x0611) __sfr CWG1CON1;
 760 __at(0x0611) volatile __CWG1CON1bits_t CWG1CON1bits;
 761
 762 __at(0x0612) __sfr CWG1AS0;
 763 __at(0x0612) volatile __CWG1AS0bits_t CWG1AS0bits;
 764
 765 __at(0x0613) __sfr CWG1AS1;
 766 __at(0x0613) volatile __CWG1AS1bits_t CWG1AS1bits;
 767
 768 __at(0x0614) __sfr CWG1STR;
 769 __at(0x0614) volatile __CWG1STRbits_t CWG1STRbits;
 770
 771 __at(0x0616) __sfr CWG2CLKCON;
 772 __at(0x0616) volatile __CWG2CLKCONbits_t CWG2CLKCONbits;
 773
 774 __at(0x0617) __sfr CWG2ISM;
 775 __at(0x0617) volatile __CWG2ISMbits_t CWG2ISMbits;
 776
 777 __at(0x0618) __sfr CWG2DBR;
 778 __at(0x0618) volatile __CWG2DBRbits_t CWG2DBRbits;
 779
 780 __at(0x0619) __sfr CWG2DBF;
 781 __at(0x0619) volatile __CWG2DBFbits_t CWG2DBFbits;
 782
 783 __at(0x061A) __sfr CWG2CON0;
 784 __at(0x061A) volatile __CWG2CON0bits_t CWG2CON0bits;
 785
 786 __at(0x061B) __sfr CWG2CON1;
 787 __at(0x061B) volatile __CWG2CON1bits_t CWG2CON1bits;
 788
 789 __at(0x061C) __sfr CWG2AS0;
 790 __at(0x061C) volatile __CWG2AS0bits_t CWG2AS0bits;
 791
 792 __at(0x061D) __sfr CWG2AS1;
 793 __at(0x061D) volatile __CWG2AS1bits_t CWG2AS1bits;
 794
 795 __at(0x061E) __sfr CWG2STR;
 796 __at(0x061E) volatile __CWG2STRbits_t CWG2STRbits;
 797
 798 __at(0x068C) __sfr CWG3CLKCON;
 799 __at(0x068C) volatile __CWG3CLKCONbits_t CWG3CLKCONbits;
 800
 801 __at(0x068D) __sfr CWG3ISM;
 802 __at(0x068D) volatile __CWG3ISMbits_t CWG3ISMbits;
 803
 804 __at(0x068E) __sfr CWG3DBR;
 805 __at(0x068E) volatile __CWG3DBRbits_t CWG3DBRbits;
 806
 807 __at(0x068F) __sfr CWG3DBF;
 808 __at(0x068F) volatile __CWG3DBFbits_t CWG3DBFbits;
 809
 810 __at(0x0690) __sfr CWG3CON0;
 811 __at(0x0690) volatile __CWG3CON0bits_t CWG3CON0bits;
 812
 813 __at(0x0691) __sfr CWG3CON1;
 814 __at(0x0691) volatile __CWG3CON1bits_t CWG3CON1bits;
 815
 816 __at(0x0692) __sfr CWG3AS0;
 817 __at(0x0692) volatile __CWG3AS0bits_t CWG3AS0bits;
 818
 819 __at(0x0693) __sfr CWG3AS1;
 820 __at(0x0693) volatile __CWG3AS1bits_t CWG3AS1bits;
 821
 822 __at(0x0694) __sfr CWG3STR;
 823 __at(0x0694) volatile __CWG3STRbits_t CWG3STRbits;
 824
 825 __at(0x070C) __sfr PIR0;
 826 __at(0x070C) volatile __PIR0bits_t PIR0bits;
 827
 828 __at(0x070D) __sfr PIR1;
 829 __at(0x070D) volatile __PIR1bits_t PIR1bits;
 830
 831 __at(0x070E) __sfr PIR2;
 832 __at(0x070E) volatile __PIR2bits_t PIR2bits;
 833
 834 __at(0x070F) __sfr PIR3;
 835 __at(0x070F) volatile __PIR3bits_t PIR3bits;
 836
 837 __at(0x0710) __sfr PIR4;
 838 __at(0x0710) volatile __PIR4bits_t PIR4bits;
 839
 840 __at(0x0711) __sfr PIR5;
 841 __at(0x0711) volatile __PIR5bits_t PIR5bits;
 842
 843 __at(0x0712) __sfr PIR6;
 844 __at(0x0712) volatile __PIR6bits_t PIR6bits;
 845
 846 __at(0x0713) __sfr PIR7;
 847 __at(0x0713) volatile __PIR7bits_t PIR7bits;
 848
 849 __at(0x0714) __sfr PIR8;
 850 __at(0x0714) volatile __PIR8bits_t PIR8bits;
 851
 852 __at(0x0716) __sfr PIE0;
 853 __at(0x0716) volatile __PIE0bits_t PIE0bits;
 854
 855 __at(0x0717) __sfr PIE1;
 856 __at(0x0717) volatile __PIE1bits_t PIE1bits;
 857
 858 __at(0x0718) __sfr PIE2;
 859 __at(0x0718) volatile __PIE2bits_t PIE2bits;
 860
 861 __at(0x0719) __sfr PIE3;
 862 __at(0x0719) volatile __PIE3bits_t PIE3bits;
 863
 864 __at(0x071A) __sfr PIE4;
 865 __at(0x071A) volatile __PIE4bits_t PIE4bits;
 866
 867 __at(0x071B) __sfr PIE5;
 868 __at(0x071B) volatile __PIE5bits_t PIE5bits;
 869
 870 __at(0x071C) __sfr PIE6;
 871 __at(0x071C) volatile __PIE6bits_t PIE6bits;
 872
 873 __at(0x071D) __sfr PIE7;
 874 __at(0x071D) volatile __PIE7bits_t PIE7bits;
 875
 876 __at(0x071E) __sfr PIE8;
 877 __at(0x071E) volatile __PIE8bits_t PIE8bits;
 878
 879 __at(0x0796) __sfr PMD0;
 880 __at(0x0796) volatile __PMD0bits_t PMD0bits;
 881
 882 __at(0x0797) __sfr PMD1;
 883 __at(0x0797) volatile __PMD1bits_t PMD1bits;
 884
 885 __at(0x0798) __sfr PMD2;
 886 __at(0x0798) volatile __PMD2bits_t PMD2bits;
 887
 888 __at(0x0799) __sfr PMD3;
 889 __at(0x0799) volatile __PMD3bits_t PMD3bits;
 890
 891 __at(0x079A) __sfr PMD4;
 892 __at(0x079A) volatile __PMD4bits_t PMD4bits;
 893
 894 __at(0x079B) __sfr PMD5;
 895 __at(0x079B) volatile __PMD5bits_t PMD5bits;
 896
 897 __at(0x080C) __sfr WDTCON0;
 898 __at(0x080C) volatile __WDTCON0bits_t WDTCON0bits;
 899
 900 __at(0x080D) __sfr WDTCON1;
 901 __at(0x080D) volatile __WDTCON1bits_t WDTCON1bits;
 902
 903 __at(0x080E) __sfr WDTPSL;
 904 __at(0x080E) volatile __WDTPSLbits_t WDTPSLbits;
 905
 906 __at(0x080F) __sfr WDTPSH;
 907 __at(0x080F) volatile __WDTPSHbits_t WDTPSHbits;
 908
 909 __at(0x0810) __sfr WDTTMR;
 910 __at(0x0810) volatile __WDTTMRbits_t WDTTMRbits;
 911
 912 __at(0x0811) __sfr BORCON;
 913 __at(0x0811) volatile __BORCONbits_t BORCONbits;
 914
 915 __at(0x0812) __sfr VREGCON;
 916 __at(0x0812) volatile __VREGCONbits_t VREGCONbits;
 917
 918 __at(0x0813) __sfr PCON0;
 919 __at(0x0813) volatile __PCON0bits_t PCON0bits;
 920
 921 __at(0x0814) __sfr CCDCON;
 922 __at(0x0814) volatile __CCDCONbits_t CCDCONbits;
 923
 924 __at(0x081A) __sfr NVMADRL;
 925 __at(0x081A) volatile __NVMADRLbits_t NVMADRLbits;
 926
 927 __at(0x081B) __sfr NVMADRH;
 928 __at(0x081B) volatile __NVMADRHbits_t NVMADRHbits;
 929
 930 __at(0x081C) __sfr NVMDATL;
 931 __at(0x081C) volatile __NVMDATLbits_t NVMDATLbits;
 932
 933 __at(0x081D) __sfr NVMDATH;
 934 __at(0x081D) volatile __NVMDATHbits_t NVMDATHbits;
 935
 936 __at(0x081E) __sfr NVMCON1;
 937 __at(0x081E) volatile __NVMCON1bits_t NVMCON1bits;
 938
 939 __at(0x081F) __sfr NVMCON2;
 940
 941 __at(0x088C) __sfr CPUDOZE;
 942 __at(0x088C) volatile __CPUDOZEbits_t CPUDOZEbits;
 943
 944 __at(0x088D) __sfr OSCCON1;
 945 __at(0x088D) volatile __OSCCON1bits_t OSCCON1bits;
 946
 947 __at(0x088E) __sfr OSCCON2;
 948 __at(0x088E) volatile __OSCCON2bits_t OSCCON2bits;
 949
 950 __at(0x088F) __sfr OSCCON3;
 951 __at(0x088F) volatile __OSCCON3bits_t OSCCON3bits;
 952
 953 __at(0x0890) __sfr OSCSTAT;
 954 __at(0x0890) volatile __OSCSTATbits_t OSCSTATbits;
 955
 956 __at(0x0891) __sfr OSCEN;
 957 __at(0x0891) volatile __OSCENbits_t OSCENbits;
 958
 959 __at(0x0892) __sfr OSCTUNE;
 960 __at(0x0892) volatile __OSCTUNEbits_t OSCTUNEbits;
 961
 962 __at(0x0893) __sfr OSCFRQ;
 963 __at(0x0893) volatile __OSCFRQbits_t OSCFRQbits;
 964
 965 __at(0x0895) __sfr CLKRCON;
 966 __at(0x0895) volatile __CLKRCONbits_t CLKRCONbits;
 967
 968 __at(0x0896) __sfr CLKRCLK;
 969 __at(0x0896) volatile __CLKRCLKbits_t CLKRCLKbits;
 970
 971 __at(0x0897) __sfr MDCON0;
 972 __at(0x0897) volatile __MDCON0bits_t MDCON0bits;
 973
 974 __at(0x0898) __sfr MDCON1;
 975 __at(0x0898) volatile __MDCON1bits_t MDCON1bits;
 976
 977 __at(0x0899) __sfr MDSRC;
 978 __at(0x0899) volatile __MDSRCbits_t MDSRCbits;
 979
 980 __at(0x089A) __sfr MDCARL;
 981 __at(0x089A) volatile __MDCARLbits_t MDCARLbits;
 982
 983 __at(0x089B) __sfr MDCARH;
 984 __at(0x089B) volatile __MDCARHbits_t MDCARHbits;
 985
 986 __at(0x090C) __sfr FVRCON;
 987 __at(0x090C) volatile __FVRCONbits_t FVRCONbits;
 988
 989 __at(0x090E) __sfr DAC1CON0;
 990 __at(0x090E) volatile __DAC1CON0bits_t DAC1CON0bits;
 991
 992 __at(0x090F) __sfr DAC1CON1;
 993 __at(0x090F) volatile __DAC1CON1bits_t DAC1CON1bits;
 994
 995 __at(0x091F) __sfr ZCD1CON;
 996 __at(0x091F) volatile __ZCD1CONbits_t ZCD1CONbits;
 997
 998 __at(0x091F) __sfr ZCDCON;
 999 __at(0x091F) volatile __ZCDCONbits_t ZCDCONbits;
1000
1001 __at(0x098F) __sfr CMOUT;
1002 __at(0x098F) volatile __CMOUTbits_t CMOUTbits;
1003
1004 __at(0x098F) __sfr CMSTAT;
1005 __at(0x098F) volatile __CMSTATbits_t CMSTATbits;
1006
1007 __at(0x0990) __sfr CM1CON0;
1008 __at(0x0990) volatile __CM1CON0bits_t CM1CON0bits;
1009
1010 __at(0x0991) __sfr CM1CON1;
1011 __at(0x0991) volatile __CM1CON1bits_t CM1CON1bits;
1012
1013 __at(0x0992) __sfr CM1NSEL;
1014 __at(0x0992) volatile __CM1NSELbits_t CM1NSELbits;
1015
1016 __at(0x0993) __sfr CM1PSEL;
1017 __at(0x0993) volatile __CM1PSELbits_t CM1PSELbits;
1018
1019 __at(0x0994) __sfr CM2CON0;
1020 __at(0x0994) volatile __CM2CON0bits_t CM2CON0bits;
1021
1022 __at(0x0995) __sfr CM2CON1;
1023 __at(0x0995) volatile __CM2CON1bits_t CM2CON1bits;
1024
1025 __at(0x0996) __sfr CM2NSEL;
1026 __at(0x0996) volatile __CM2NSELbits_t CM2NSELbits;
1027
1028 __at(0x0997) __sfr CM2PSEL;
1029 __at(0x0997) volatile __CM2PSELbits_t CM2PSELbits;
1030
1031 __at(0x0E0F) __sfr CLCDATA;
1032 __at(0x0E0F) volatile __CLCDATAbits_t CLCDATAbits;
1033
1034 __at(0x0E10) __sfr CLC1CON;
1035 __at(0x0E10) volatile __CLC1CONbits_t CLC1CONbits;
1036
1037 __at(0x0E11) __sfr CLC1POL;
1038 __at(0x0E11) volatile __CLC1POLbits_t CLC1POLbits;
1039
1040 __at(0x0E12) __sfr CLC1SEL0;
1041 __at(0x0E12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
1042
1043 __at(0x0E13) __sfr CLC1SEL1;
1044 __at(0x0E13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
1045
1046 __at(0x0E14) __sfr CLC1SEL2;
1047 __at(0x0E14) volatile __CLC1SEL2bits_t CLC1SEL2bits;
1048
1049 __at(0x0E15) __sfr CLC1SEL3;
1050 __at(0x0E15) volatile __CLC1SEL3bits_t CLC1SEL3bits;
1051
1052 __at(0x0E16) __sfr CLC1GLS0;
1053 __at(0x0E16) volatile __CLC1GLS0bits_t CLC1GLS0bits;
1054
1055 __at(0x0E17) __sfr CLC1GLS1;
1056 __at(0x0E17) volatile __CLC1GLS1bits_t CLC1GLS1bits;
1057
1058 __at(0x0E18) __sfr CLC1GLS2;
1059 __at(0x0E18) volatile __CLC1GLS2bits_t CLC1GLS2bits;
1060
1061 __at(0x0E19) __sfr CLC1GLS3;
1062 __at(0x0E19) volatile __CLC1GLS3bits_t CLC1GLS3bits;
1063
1064 __at(0x0E1A) __sfr CLC2CON;
1065 __at(0x0E1A) volatile __CLC2CONbits_t CLC2CONbits;
1066
1067 __at(0x0E1B) __sfr CLC2POL;
1068 __at(0x0E1B) volatile __CLC2POLbits_t CLC2POLbits;
1069
1070 __at(0x0E1C) __sfr CLC2SEL0;
1071 __at(0x0E1C) volatile __CLC2SEL0bits_t CLC2SEL0bits;
1072
1073 __at(0x0E1D) __sfr CLC2SEL1;
1074 __at(0x0E1D) volatile __CLC2SEL1bits_t CLC2SEL1bits;
1075
1076 __at(0x0E1E) __sfr CLC2SEL2;
1077 __at(0x0E1E) volatile __CLC2SEL2bits_t CLC2SEL2bits;
1078
1079 __at(0x0E1F) __sfr CLC2SEL3;
1080 __at(0x0E1F) volatile __CLC2SEL3bits_t CLC2SEL3bits;
1081
1082 __at(0x0E20) __sfr CLC2GLS0;
1083 __at(0x0E20) volatile __CLC2GLS0bits_t CLC2GLS0bits;
1084
1085 __at(0x0E21) __sfr CLC2GLS1;
1086 __at(0x0E21) volatile __CLC2GLS1bits_t CLC2GLS1bits;
1087
1088 __at(0x0E22) __sfr CLC2GLS2;
1089 __at(0x0E22) volatile __CLC2GLS2bits_t CLC2GLS2bits;
1090
1091 __at(0x0E23) __sfr CLC2GLS3;
1092 __at(0x0E23) volatile __CLC2GLS3bits_t CLC2GLS3bits;
1093
1094 __at(0x0E24) __sfr CLC3CON;
1095 __at(0x0E24) volatile __CLC3CONbits_t CLC3CONbits;
1096
1097 __at(0x0E25) __sfr CLC3POL;
1098 __at(0x0E25) volatile __CLC3POLbits_t CLC3POLbits;
1099
1100 __at(0x0E26) __sfr CLC3SEL0;
1101 __at(0x0E26) volatile __CLC3SEL0bits_t CLC3SEL0bits;
1102
1103 __at(0x0E27) __sfr CLC3SEL1;
1104 __at(0x0E27) volatile __CLC3SEL1bits_t CLC3SEL1bits;
1105
1106 __at(0x0E28) __sfr CLC3SEL2;
1107 __at(0x0E28) volatile __CLC3SEL2bits_t CLC3SEL2bits;
1108
1109 __at(0x0E29) __sfr CLC3SEL3;
1110 __at(0x0E29) volatile __CLC3SEL3bits_t CLC3SEL3bits;
1111
1112 __at(0x0E2A) __sfr CLC3GLS0;
1113 __at(0x0E2A) volatile __CLC3GLS0bits_t CLC3GLS0bits;
1114
1115 __at(0x0E2B) __sfr CLC3GLS1;
1116 __at(0x0E2B) volatile __CLC3GLS1bits_t CLC3GLS1bits;
1117
1118 __at(0x0E2C) __sfr CLC3GLS2;
1119 __at(0x0E2C) volatile __CLC3GLS2bits_t CLC3GLS2bits;
1120
1121 __at(0x0E2D) __sfr CLC3GLS3;
1122 __at(0x0E2D) volatile __CLC3GLS3bits_t CLC3GLS3bits;
1123
1124 __at(0x0E2E) __sfr CLC4CON;
1125 __at(0x0E2E) volatile __CLC4CONbits_t CLC4CONbits;
1126
1127 __at(0x0E2F) __sfr CLC4POL;
1128 __at(0x0E2F) volatile __CLC4POLbits_t CLC4POLbits;
1129
1130 __at(0x0E30) __sfr CLC4SEL0;
1131 __at(0x0E30) volatile __CLC4SEL0bits_t CLC4SEL0bits;
1132
1133 __at(0x0E31) __sfr CLC4SEL1;
1134 __at(0x0E31) volatile __CLC4SEL1bits_t CLC4SEL1bits;
1135
1136 __at(0x0E32) __sfr CLC4SEL2;
1137 __at(0x0E32) volatile __CLC4SEL2bits_t CLC4SEL2bits;
1138
1139 __at(0x0E33) __sfr CLC4SEL3;
1140 __at(0x0E33) volatile __CLC4SEL3bits_t CLC4SEL3bits;
1141
1142 __at(0x0E34) __sfr CLC4GLS0;
1143 __at(0x0E34) volatile __CLC4GLS0bits_t CLC4GLS0bits;
1144
1145 __at(0x0E35) __sfr CLC4GLS1;
1146 __at(0x0E35) volatile __CLC4GLS1bits_t CLC4GLS1bits;
1147
1148 __at(0x0E36) __sfr CLC4GLS2;
1149 __at(0x0E36) volatile __CLC4GLS2bits_t CLC4GLS2bits;
1150
1151 __at(0x0E37) __sfr CLC4GLS3;
1152 __at(0x0E37) volatile __CLC4GLS3bits_t CLC4GLS3bits;
1153
1154 __at(0x0E8F) __sfr PPSLOCK;
1155 __at(0x0E8F) volatile __PPSLOCKbits_t PPSLOCKbits;
1156
1157 __at(0x0E90) __sfr INTPPS;
1158 __at(0x0E90) volatile __INTPPSbits_t INTPPSbits;
1159
1160 __at(0x0E91) __sfr T0CKIPPS;
1161 __at(0x0E91) volatile __T0CKIPPSbits_t T0CKIPPSbits;
1162
1163 __at(0x0E92) __sfr T1CKIPPS;
1164 __at(0x0E92) volatile __T1CKIPPSbits_t T1CKIPPSbits;
1165
1166 __at(0x0E93) __sfr T1GPPS;
1167 __at(0x0E93) volatile __T1GPPSbits_t T1GPPSbits;
1168
1169 __at(0x0E94) __sfr T3CKIPPS;
1170 __at(0x0E94) volatile __T3CKIPPSbits_t T3CKIPPSbits;
1171
1172 __at(0x0E95) __sfr T3GPPS;
1173 __at(0x0E95) volatile __T3GPPSbits_t T3GPPSbits;
1174
1175 __at(0x0E96) __sfr T5CKIPPS;
1176 __at(0x0E96) volatile __T5CKIPPSbits_t T5CKIPPSbits;
1177
1178 __at(0x0E97) __sfr T5GPPS;
1179 __at(0x0E97) volatile __T5GPPSbits_t T5GPPSbits;
1180
1181 __at(0x0E9C) __sfr T2AINPPS;
1182 __at(0x0E9C) volatile __T2AINPPSbits_t T2AINPPSbits;
1183
1184 __at(0x0E9D) __sfr T4AINPPS;
1185 __at(0x0E9D) volatile __T4AINPPSbits_t T4AINPPSbits;
1186
1187 __at(0x0E9E) __sfr T6AINPPS;
1188 __at(0x0E9E) volatile __T6AINPPSbits_t T6AINPPSbits;
1189
1190 __at(0x0EA1) __sfr CCP1PPS;
1191 __at(0x0EA1) volatile __CCP1PPSbits_t CCP1PPSbits;
1192
1193 __at(0x0EA2) __sfr CCP2PPS;
1194 __at(0x0EA2) volatile __CCP2PPSbits_t CCP2PPSbits;
1195
1196 __at(0x0EA3) __sfr CCP3PPS;
1197 __at(0x0EA3) volatile __CCP3PPSbits_t CCP3PPSbits;
1198
1199 __at(0x0EA4) __sfr CCP4PPS;
1200 __at(0x0EA4) volatile __CCP4PPSbits_t CCP4PPSbits;
1201
1202 __at(0x0EA5) __sfr CCP5PPS;
1203 __at(0x0EA5) volatile __CCP5PPSbits_t CCP5PPSbits;
1204
1205 __at(0x0EA9) __sfr SMT1WINPPS;
1206 __at(0x0EA9) volatile __SMT1WINPPSbits_t SMT1WINPPSbits;
1207
1208 __at(0x0EAA) __sfr SMT1SIGPPS;
1209 __at(0x0EAA) volatile __SMT1SIGPPSbits_t SMT1SIGPPSbits;
1210
1211 __at(0x0EAB) __sfr SMT2WINPPS;
1212 __at(0x0EAB) volatile __SMT2WINPPSbits_t SMT2WINPPSbits;
1213
1214 __at(0x0EAC) __sfr SMT2SIGPPS;
1215 __at(0x0EAC) volatile __SMT2SIGPPSbits_t SMT2SIGPPSbits;
1216
1217 __at(0x0EB1) __sfr CWG1PPS;
1218 __at(0x0EB1) volatile __CWG1PPSbits_t CWG1PPSbits;
1219
1220 __at(0x0EB2) __sfr CWG2PPS;
1221 __at(0x0EB2) volatile __CWG2PPSbits_t CWG2PPSbits;
1222
1223 __at(0x0EB3) __sfr CWG3PPS;
1224 __at(0x0EB3) volatile __CWG3PPSbits_t CWG3PPSbits;
1225
1226 __at(0x0EB8) __sfr MDCARLPPS;
1227 __at(0x0EB8) volatile __MDCARLPPSbits_t MDCARLPPSbits;
1228
1229 __at(0x0EB9) __sfr MDCARHPPS;
1230 __at(0x0EB9) volatile __MDCARHPPSbits_t MDCARHPPSbits;
1231
1232 __at(0x0EBA) __sfr MDSRCPPS;
1233 __at(0x0EBA) volatile __MDSRCPPSbits_t MDSRCPPSbits;
1234
1235 __at(0x0EBB) __sfr CLCIN0PPS;
1236 __at(0x0EBB) volatile __CLCIN0PPSbits_t CLCIN0PPSbits;
1237
1238 __at(0x0EBC) __sfr CLCIN1PPS;
1239 __at(0x0EBC) volatile __CLCIN1PPSbits_t CLCIN1PPSbits;
1240
1241 __at(0x0EBD) __sfr CLCIN2PPS;
1242 __at(0x0EBD) volatile __CLCIN2PPSbits_t CLCIN2PPSbits;
1243
1244 __at(0x0EBE) __sfr CLCIN3PPS;
1245 __at(0x0EBE) volatile __CLCIN3PPSbits_t CLCIN3PPSbits;
1246
1247 __at(0x0EC3) __sfr ADCACTPPS;
1248 __at(0x0EC3) volatile __ADCACTPPSbits_t ADCACTPPSbits;
1249
1250 __at(0x0EC5) __sfr SSP1CLKPPS;
1251 __at(0x0EC5) volatile __SSP1CLKPPSbits_t SSP1CLKPPSbits;
1252
1253 __at(0x0EC6) __sfr SSP1DATPPS;
1254 __at(0x0EC6) volatile __SSP1DATPPSbits_t SSP1DATPPSbits;
1255
1256 __at(0x0EC7) __sfr SSP1SSPPS;
1257 __at(0x0EC7) volatile __SSP1SSPPSbits_t SSP1SSPPSbits;
1258
1259 __at(0x0EC8) __sfr SSP2CLKPPS;
1260 __at(0x0EC8) volatile __SSP2CLKPPSbits_t SSP2CLKPPSbits;
1261
1262 __at(0x0EC9) __sfr SSP2DATPPS;
1263 __at(0x0EC9) volatile __SSP2DATPPSbits_t SSP2DATPPSbits;
1264
1265 __at(0x0ECA) __sfr SSP2SSPPS;
1266 __at(0x0ECA) volatile __SSP2SSPPSbits_t SSP2SSPPSbits;
1267
1268 __at(0x0ECB) __sfr RXPPS;
1269 __at(0x0ECB) volatile __RXPPSbits_t RXPPSbits;
1270
1271 __at(0x0ECC) __sfr TXPPS;
1272 __at(0x0ECC) volatile __TXPPSbits_t TXPPSbits;
1273
1274 __at(0x0F10) __sfr RA0PPS;
1275 __at(0x0F10) volatile __RA0PPSbits_t RA0PPSbits;
1276
1277 __at(0x0F11) __sfr RA1PPS;
1278 __at(0x0F11) volatile __RA1PPSbits_t RA1PPSbits;
1279
1280 __at(0x0F12) __sfr RA2PPS;
1281 __at(0x0F12) volatile __RA2PPSbits_t RA2PPSbits;
1282
1283 __at(0x0F13) __sfr RA3PPS;
1284 __at(0x0F13) volatile __RA3PPSbits_t RA3PPSbits;
1285
1286 __at(0x0F14) __sfr RA4PPS;
1287 __at(0x0F14) volatile __RA4PPSbits_t RA4PPSbits;
1288
1289 __at(0x0F15) __sfr RA5PPS;
1290 __at(0x0F15) volatile __RA5PPSbits_t RA5PPSbits;
1291
1292 __at(0x0F16) __sfr RA6PPS;
1293 __at(0x0F16) volatile __RA6PPSbits_t RA6PPSbits;
1294
1295 __at(0x0F17) __sfr RA7PPS;
1296 __at(0x0F17) volatile __RA7PPSbits_t RA7PPSbits;
1297
1298 __at(0x0F18) __sfr RB0PPS;
1299 __at(0x0F18) volatile __RB0PPSbits_t RB0PPSbits;
1300
1301 __at(0x0F19) __sfr RB1PPS;
1302 __at(0x0F19) volatile __RB1PPSbits_t RB1PPSbits;
1303
1304 __at(0x0F1A) __sfr RB2PPS;
1305 __at(0x0F1A) volatile __RB2PPSbits_t RB2PPSbits;
1306
1307 __at(0x0F1B) __sfr RB3PPS;
1308 __at(0x0F1B) volatile __RB3PPSbits_t RB3PPSbits;
1309
1310 __at(0x0F1C) __sfr RB4PPS;
1311 __at(0x0F1C) volatile __RB4PPSbits_t RB4PPSbits;
1312
1313 __at(0x0F1D) __sfr RB5PPS;
1314 __at(0x0F1D) volatile __RB5PPSbits_t RB5PPSbits;
1315
1316 __at(0x0F1E) __sfr RB6PPS;
1317 __at(0x0F1E) volatile __RB6PPSbits_t RB6PPSbits;
1318
1319 __at(0x0F1F) __sfr RB7PPS;
1320 __at(0x0F1F) volatile __RB7PPSbits_t RB7PPSbits;
1321
1322 __at(0x0F20) __sfr RC0PPS;
1323 __at(0x0F20) volatile __RC0PPSbits_t RC0PPSbits;
1324
1325 __at(0x0F21) __sfr RC1PPS;
1326 __at(0x0F21) volatile __RC1PPSbits_t RC1PPSbits;
1327
1328 __at(0x0F22) __sfr RC2PPS;
1329 __at(0x0F22) volatile __RC2PPSbits_t RC2PPSbits;
1330
1331 __at(0x0F23) __sfr RC3PPS;
1332 __at(0x0F23) volatile __RC3PPSbits_t RC3PPSbits;
1333
1334 __at(0x0F24) __sfr RC4PPS;
1335 __at(0x0F24) volatile __RC4PPSbits_t RC4PPSbits;
1336
1337 __at(0x0F25) __sfr RC5PPS;
1338 __at(0x0F25) volatile __RC5PPSbits_t RC5PPSbits;
1339
1340 __at(0x0F26) __sfr RC6PPS;
1341 __at(0x0F26) volatile __RC6PPSbits_t RC6PPSbits;
1342
1343 __at(0x0F27) __sfr RC7PPS;
1344 __at(0x0F27) volatile __RC7PPSbits_t RC7PPSbits;
1345
1346 __at(0x0F38) __sfr ANSELA;
1347 __at(0x0F38) volatile __ANSELAbits_t ANSELAbits;
1348
1349 __at(0x0F39) __sfr WPUA;
1350 __at(0x0F39) volatile __WPUAbits_t WPUAbits;
1351
1352 __at(0x0F3A) __sfr ODCONA;
1353 __at(0x0F3A) volatile __ODCONAbits_t ODCONAbits;
1354
1355 __at(0x0F3B) __sfr SLRCONA;
1356 __at(0x0F3B) volatile __SLRCONAbits_t SLRCONAbits;
1357
1358 __at(0x0F3C) __sfr INLVLA;
1359 __at(0x0F3C) volatile __INLVLAbits_t INLVLAbits;
1360
1361 __at(0x0F3D) __sfr IOCAP;
1362 __at(0x0F3D) volatile __IOCAPbits_t IOCAPbits;
1363
1364 __at(0x0F3E) __sfr IOCAN;
1365 __at(0x0F3E) volatile __IOCANbits_t IOCANbits;
1366
1367 __at(0x0F3F) __sfr IOCAF;
1368 __at(0x0F3F) volatile __IOCAFbits_t IOCAFbits;
1369
1370 __at(0x0F40) __sfr CCDNA;
1371 __at(0x0F40) volatile __CCDNAbits_t CCDNAbits;
1372
1373 __at(0x0F41) __sfr CCDPA;
1374 __at(0x0F41) volatile __CCDPAbits_t CCDPAbits;
1375
1376 __at(0x0F43) __sfr ANSELB;
1377 __at(0x0F43) volatile __ANSELBbits_t ANSELBbits;
1378
1379 __at(0x0F44) __sfr WPUB;
1380 __at(0x0F44) volatile __WPUBbits_t WPUBbits;
1381
1382 __at(0x0F45) __sfr ODCONB;
1383 __at(0x0F45) volatile __ODCONBbits_t ODCONBbits;
1384
1385 __at(0x0F46) __sfr SLRCONB;
1386 __at(0x0F46) volatile __SLRCONBbits_t SLRCONBbits;
1387
1388 __at(0x0F47) __sfr INLVLB;
1389 __at(0x0F47) volatile __INLVLBbits_t INLVLBbits;
1390
1391 __at(0x0F48) __sfr IOCBP;
1392 __at(0x0F48) volatile __IOCBPbits_t IOCBPbits;
1393
1394 __at(0x0F49) __sfr IOCBN;
1395 __at(0x0F49) volatile __IOCBNbits_t IOCBNbits;
1396
1397 __at(0x0F4A) __sfr IOCBF;
1398 __at(0x0F4A) volatile __IOCBFbits_t IOCBFbits;
1399
1400 __at(0x0F4B) __sfr CCDNB;
1401 __at(0x0F4B) volatile __CCDNBbits_t CCDNBbits;
1402
1403 __at(0x0F4C) __sfr CCDPB;
1404 __at(0x0F4C) volatile __CCDPBbits_t CCDPBbits;
1405
1406 __at(0x0F4E) __sfr ANSELC;
1407 __at(0x0F4E) volatile __ANSELCbits_t ANSELCbits;
1408
1409 __at(0x0F4F) __sfr WPUC;
1410 __at(0x0F4F) volatile __WPUCbits_t WPUCbits;
1411
1412 __at(0x0F50) __sfr ODCONC;
1413 __at(0x0F50) volatile __ODCONCbits_t ODCONCbits;
1414
1415 __at(0x0F51) __sfr SLRCONC;
1416 __at(0x0F51) volatile __SLRCONCbits_t SLRCONCbits;
1417
1418 __at(0x0F52) __sfr INLVLC;
1419 __at(0x0F52) volatile __INLVLCbits_t INLVLCbits;
1420
1421 __at(0x0F53) __sfr IOCCP;
1422 __at(0x0F53) volatile __IOCCPbits_t IOCCPbits;
1423
1424 __at(0x0F54) __sfr IOCCN;
1425 __at(0x0F54) volatile __IOCCNbits_t IOCCNbits;
1426
1427 __at(0x0F55) __sfr IOCCF;
1428 __at(0x0F55) volatile __IOCCFbits_t IOCCFbits;
1429
1430 __at(0x0F56) __sfr CCDNC;
1431 __at(0x0F56) volatile __CCDNCbits_t CCDNCbits;
1432
1433 __at(0x0F57) __sfr CCDPC;
1434 __at(0x0F57) volatile __CCDPCbits_t CCDPCbits;
1435
1436 __at(0x0F65) __sfr WPUE;
1437 __at(0x0F65) volatile __WPUEbits_t WPUEbits;
1438
1439 __at(0x0F68) __sfr INLVLE;
1440 __at(0x0F68) volatile __INLVLEbits_t INLVLEbits;
1441
1442 __at(0x0F69) __sfr IOCEP;
1443 __at(0x0F69) volatile __IOCEPbits_t IOCEPbits;
1444
1445 __at(0x0F6A) __sfr IOCEN;
1446 __at(0x0F6A) volatile __IOCENbits_t IOCENbits;
1447
1448 __at(0x0F6B) __sfr IOCEF;
1449 __at(0x0F6B) volatile __IOCEFbits_t IOCEFbits;
1450
1451 __at(0x0FE4) __sfr STATUS_SHAD;
1452 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
1453
1454 __at(0x0FE5) __sfr WREG_SHAD;
1455
1456 __at(0x0FE6) __sfr BSR_SHAD;
1457
1458 __at(0x0FE7) __sfr PCLATH_SHAD;
1459
1460 __at(0x0FE8) __sfr FSR0L_SHAD;
1461
1462 __at(0x0FE9) __sfr FSR0H_SHAD;
1463
1464 __at(0x0FEA) __sfr FSR1L_SHAD;
1465
1466 __at(0x0FEB) __sfr FSR1H_SHAD;
1467
1468 __at(0x0FED) __sfr STKPTR;
1469
1470 __at(0x0FEE) __sfr TOSL;
1471
1472 __at(0x0FEF) __sfr TOSH;