sdcc/device/non-free/lib/pic14/libdev/pic16f610.c

   1 /*
   2  * This definitions of the PIC16F610 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:56 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic16f610.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF;
  30
  31 __at(0x0001) __sfr TMR0;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR;
  39
  40 __at(0x0005) __sfr PORTA;
  41 __at(0x0005) volatile __PORTAbits_t PORTAbits;
  42
  43 __at(0x0007) __sfr PORTC;
  44 __at(0x0007) volatile __PORTCbits_t PORTCbits;
  45
  46 __at(0x000A) __sfr PCLATH;
  47
  48 __at(0x000B) __sfr INTCON;
  49 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  50
  51 __at(0x000C) __sfr PIR1;
  52 __at(0x000C) volatile __PIR1bits_t PIR1bits;
  53
  54 __at(0x000E) __sfr TMR1;
  55
  56 __at(0x000E) __sfr TMR1L;
  57
  58 __at(0x000F) __sfr TMR1H;
  59
  60 __at(0x0010) __sfr T1CON;
  61 __at(0x0010) volatile __T1CONbits_t T1CONbits;
  62
  63 __at(0x0019) __sfr VRCON;
  64 __at(0x0019) volatile __VRCONbits_t VRCONbits;
  65
  66 __at(0x001A) __sfr CM1CON0;
  67 __at(0x001A) volatile __CM1CON0bits_t CM1CON0bits;
  68
  69 __at(0x001B) __sfr CM2CON0;
  70 __at(0x001B) volatile __CM2CON0bits_t CM2CON0bits;
  71
  72 __at(0x001C) __sfr CM2CON1;
  73 __at(0x001C) volatile __CM2CON1bits_t CM2CON1bits;
  74
  75 __at(0x0081) __sfr OPTION_REG;
  76 __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
  77
  78 __at(0x0085) __sfr TRISA;
  79 __at(0x0085) volatile __TRISAbits_t TRISAbits;
  80
  81 __at(0x0087) __sfr TRISC;
  82 __at(0x0087) volatile __TRISCbits_t TRISCbits;
  83
  84 __at(0x008C) __sfr PIE1;
  85 __at(0x008C) volatile __PIE1bits_t PIE1bits;
  86
  87 __at(0x008E) __sfr PCON;
  88 __at(0x008E) volatile __PCONbits_t PCONbits;
  89
  90 __at(0x0090) __sfr OSCTUNE;
  91 __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
  92
  93 __at(0x0091) __sfr ANSEL;
  94 __at(0x0091) volatile __ANSELbits_t ANSELbits;
  95
  96 __at(0x0095) __sfr WPU;
  97 __at(0x0095) volatile __WPUbits_t WPUbits;
  98
  99 __at(0x0095) __sfr WPUA;
 100 __at(0x0095) volatile __WPUAbits_t WPUAbits;
 101
 102 __at(0x0096) __sfr IOC;
 103 __at(0x0096) volatile __IOCbits_t IOCbits;
 104
 105 __at(0x0096) __sfr IOCA;
 106 __at(0x0096) volatile __IOCAbits_t IOCAbits;
 107
 108 __at(0x0099) __sfr SRCON0;
 109 __at(0x0099) volatile __SRCON0bits_t SRCON0bits;
 110
 111 __at(0x009A) __sfr SRCON1;
 112 __at(0x009A) volatile __SRCON1bits_t SRCON1bits;