2 * This definitions of the PIC16F636 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #include <pic16f636.h>
27 //==============================================================================
29 __at(0x0000) __sfr INDF
;
31 __at(0x0001) __sfr TMR0
;
33 __at(0x0002) __sfr PCL
;
35 __at(0x0003) __sfr STATUS
;
36 __at(0x0003) volatile __STATUSbits_t STATUSbits
;
38 __at(0x0004) __sfr FSR
;
40 __at(0x0005) __sfr PORTA
;
41 __at(0x0005) volatile __PORTAbits_t PORTAbits
;
43 __at(0x0007) __sfr PORTC
;
44 __at(0x0007) volatile __PORTCbits_t PORTCbits
;
46 __at(0x000A) __sfr PCLATH
;
48 __at(0x000B) __sfr INTCON
;
49 __at(0x000B) volatile __INTCONbits_t INTCONbits
;
51 __at(0x000C) __sfr PIR1
;
52 __at(0x000C) volatile __PIR1bits_t PIR1bits
;
54 __at(0x000E) __sfr TMR1
;
56 __at(0x000E) __sfr TMR1L
;
58 __at(0x000F) __sfr TMR1H
;
60 __at(0x0010) __sfr T1CON
;
61 __at(0x0010) volatile __T1CONbits_t T1CONbits
;
63 __at(0x0018) __sfr WDTCON
;
64 __at(0x0018) volatile __WDTCONbits_t WDTCONbits
;
66 __at(0x0019) __sfr CMCON0
;
67 __at(0x0019) volatile __CMCON0bits_t CMCON0bits
;
69 __at(0x001A) __sfr CMCON1
;
70 __at(0x001A) volatile __CMCON1bits_t CMCON1bits
;
72 __at(0x0081) __sfr OPTION_REG
;
73 __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
75 __at(0x0085) __sfr TRISA
;
76 __at(0x0085) volatile __TRISAbits_t TRISAbits
;
78 __at(0x0087) __sfr TRISC
;
79 __at(0x0087) volatile __TRISCbits_t TRISCbits
;
81 __at(0x008C) __sfr PIE1
;
82 __at(0x008C) volatile __PIE1bits_t PIE1bits
;
84 __at(0x008E) __sfr PCON
;
85 __at(0x008E) volatile __PCONbits_t PCONbits
;
87 __at(0x008F) __sfr OSCCON
;
88 __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
90 __at(0x0090) __sfr OSCTUNE
;
91 __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
93 __at(0x0094) __sfr LVDCON
;
94 __at(0x0094) volatile __LVDCONbits_t LVDCONbits
;
96 __at(0x0095) __sfr WPUDA
;
97 __at(0x0095) volatile __WPUDAbits_t WPUDAbits
;
99 __at(0x0096) __sfr IOCA
;
100 __at(0x0096) volatile __IOCAbits_t IOCAbits
;
102 __at(0x0097) __sfr WDA
;
103 __at(0x0097) volatile __WDAbits_t WDAbits
;
105 __at(0x0099) __sfr VRCON
;
106 __at(0x0099) volatile __VRCONbits_t VRCONbits
;
108 __at(0x009A) __sfr EEDAT
;
110 __at(0x009A) __sfr EEDATA
;
112 __at(0x009B) __sfr EEADR
;
114 __at(0x009C) __sfr EECON1
;
115 __at(0x009C) volatile __EECON1bits_t EECON1bits
;
117 __at(0x009D) __sfr EECON2
;
119 __at(0x0110) __sfr CRCON
;
120 __at(0x0110) volatile __CRCONbits_t CRCONbits
;
122 __at(0x0111) __sfr CRDAT0
;
124 __at(0x0112) __sfr CRDAT1
;
126 __at(0x0113) __sfr CRDAT2
;
128 __at(0x0114) __sfr CRDAT3
;