2 * This definitions of the PIC16F685 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #include <pic16f685.h>
27 //==============================================================================
29 __at(0x0000) __sfr INDF
;
31 __at(0x0001) __sfr TMR0
;
33 __at(0x0002) __sfr PCL
;
35 __at(0x0003) __sfr STATUS
;
36 __at(0x0003) volatile __STATUSbits_t STATUSbits
;
38 __at(0x0004) __sfr FSR
;
40 __at(0x0005) __sfr PORTA
;
41 __at(0x0005) volatile __PORTAbits_t PORTAbits
;
43 __at(0x0006) __sfr PORTB
;
44 __at(0x0006) volatile __PORTBbits_t PORTBbits
;
46 __at(0x0007) __sfr PORTC
;
47 __at(0x0007) volatile __PORTCbits_t PORTCbits
;
49 __at(0x000A) __sfr PCLATH
;
51 __at(0x000B) __sfr INTCON
;
52 __at(0x000B) volatile __INTCONbits_t INTCONbits
;
54 __at(0x000C) __sfr PIR1
;
55 __at(0x000C) volatile __PIR1bits_t PIR1bits
;
57 __at(0x000D) __sfr PIR2
;
58 __at(0x000D) volatile __PIR2bits_t PIR2bits
;
60 __at(0x000E) __sfr TMR1
;
62 __at(0x000E) __sfr TMR1L
;
64 __at(0x000F) __sfr TMR1H
;
66 __at(0x0010) __sfr T1CON
;
67 __at(0x0010) volatile __T1CONbits_t T1CONbits
;
69 __at(0x0011) __sfr TMR2
;
71 __at(0x0012) __sfr T2CON
;
72 __at(0x0012) volatile __T2CONbits_t T2CONbits
;
74 __at(0x0015) __sfr CCPR1
;
76 __at(0x0015) __sfr CCPR1L
;
78 __at(0x0016) __sfr CCPR1H
;
80 __at(0x0017) __sfr CCP1CON
;
81 __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
83 __at(0x001C) __sfr PWM1CON
;
84 __at(0x001C) volatile __PWM1CONbits_t PWM1CONbits
;
86 __at(0x001D) __sfr ECCPAS
;
87 __at(0x001D) volatile __ECCPASbits_t ECCPASbits
;
89 __at(0x001E) __sfr ADRESH
;
91 __at(0x001F) __sfr ADCON0
;
92 __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
94 __at(0x0081) __sfr OPTION_REG
;
95 __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
97 __at(0x0085) __sfr TRISA
;
98 __at(0x0085) volatile __TRISAbits_t TRISAbits
;
100 __at(0x0086) __sfr TRISB
;
101 __at(0x0086) volatile __TRISBbits_t TRISBbits
;
103 __at(0x0087) __sfr TRISC
;
104 __at(0x0087) volatile __TRISCbits_t TRISCbits
;
106 __at(0x008C) __sfr PIE1
;
107 __at(0x008C) volatile __PIE1bits_t PIE1bits
;
109 __at(0x008D) __sfr PIE2
;
110 __at(0x008D) volatile __PIE2bits_t PIE2bits
;
112 __at(0x008E) __sfr PCON
;
113 __at(0x008E) volatile __PCONbits_t PCONbits
;
115 __at(0x008F) __sfr OSCCON
;
116 __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
118 __at(0x0090) __sfr OSCTUNE
;
119 __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
121 __at(0x0092) __sfr PR2
;
123 __at(0x0095) __sfr WPU
;
124 __at(0x0095) volatile __WPUbits_t WPUbits
;
126 __at(0x0095) __sfr WPUA
;
127 __at(0x0095) volatile __WPUAbits_t WPUAbits
;
129 __at(0x0096) __sfr IOC
;
130 __at(0x0096) volatile __IOCbits_t IOCbits
;
132 __at(0x0096) __sfr IOCA
;
133 __at(0x0096) volatile __IOCAbits_t IOCAbits
;
135 __at(0x0097) __sfr WDTCON
;
136 __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
138 __at(0x009E) __sfr ADRESL
;
140 __at(0x009F) __sfr ADCON1
;
141 __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
143 __at(0x010C) __sfr EEDAT
;
145 __at(0x010C) __sfr EEDATA
;
147 __at(0x010D) __sfr EEADR
;
149 __at(0x010E) __sfr EEDATH
;
151 __at(0x010F) __sfr EEADRH
;
153 __at(0x0115) __sfr WPUB
;
154 __at(0x0115) volatile __WPUBbits_t WPUBbits
;
156 __at(0x0116) __sfr IOCB
;
157 __at(0x0116) volatile __IOCBbits_t IOCBbits
;
159 __at(0x0118) __sfr VRCON
;
160 __at(0x0118) volatile __VRCONbits_t VRCONbits
;
162 __at(0x0119) __sfr CM1CON0
;
163 __at(0x0119) volatile __CM1CON0bits_t CM1CON0bits
;
165 __at(0x011A) __sfr CM2CON0
;
166 __at(0x011A) volatile __CM2CON0bits_t CM2CON0bits
;
168 __at(0x011B) __sfr CM2CON1
;
169 __at(0x011B) volatile __CM2CON1bits_t CM2CON1bits
;
171 __at(0x011E) __sfr ANSEL
;
172 __at(0x011E) volatile __ANSELbits_t ANSELbits
;
174 __at(0x011F) __sfr ANSELH
;
175 __at(0x011F) volatile __ANSELHbits_t ANSELHbits
;
177 __at(0x018C) __sfr EECON1
;
178 __at(0x018C) volatile __EECON1bits_t EECON1bits
;
180 __at(0x018D) __sfr EECON2
;
182 __at(0x019D) __sfr PSTRCON
;
183 __at(0x019D) volatile __PSTRCONbits_t PSTRCONbits
;
185 __at(0x019E) __sfr SRCON
;
186 __at(0x019E) volatile __SRCONbits_t SRCONbits
;