sdcc/device/non-free/lib/pic14/libdev/pic16f753.c

   1 /*
   2  * This definitions of the PIC16F753 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:59 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic16f753.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF;
  30
  31 __at(0x0001) __sfr TMR0;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR;
  39
  40 __at(0x0005) __sfr PORTA;
  41 __at(0x0005) volatile __PORTAbits_t PORTAbits;
  42
  43 __at(0x0007) __sfr PORTC;
  44 __at(0x0007) volatile __PORTCbits_t PORTCbits;
  45
  46 __at(0x0008) __sfr IOCAF;
  47 __at(0x0008) volatile __IOCAFbits_t IOCAFbits;
  48
  49 __at(0x0009) __sfr IOCCF;
  50 __at(0x0009) volatile __IOCCFbits_t IOCCFbits;
  51
  52 __at(0x000A) __sfr PCLATH;
  53
  54 __at(0x000B) __sfr INTCON;
  55 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  56
  57 __at(0x000C) __sfr PIR1;
  58 __at(0x000C) volatile __PIR1bits_t PIR1bits;
  59
  60 __at(0x000D) __sfr PIR2;
  61 __at(0x000D) volatile __PIR2bits_t PIR2bits;
  62
  63 __at(0x000F) __sfr TMR1;
  64
  65 __at(0x000F) __sfr TMR1L;
  66
  67 __at(0x0010) __sfr TMR1H;
  68
  69 __at(0x0011) __sfr T1CON;
  70 __at(0x0011) volatile __T1CONbits_t T1CONbits;
  71
  72 __at(0x0012) __sfr T1GCON;
  73 __at(0x0012) volatile __T1GCONbits_t T1GCONbits;
  74
  75 __at(0x0013) __sfr CCPR1;
  76
  77 __at(0x0013) __sfr CCPR1L;
  78
  79 __at(0x0014) __sfr CCPR1H;
  80
  81 __at(0x0015) __sfr CCP1CON;
  82 __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits;
  83
  84 __at(0x001C) __sfr ADRES;
  85
  86 __at(0x001C) __sfr ADRESL;
  87
  88 __at(0x001D) __sfr ADRESH;
  89
  90 __at(0x001E) __sfr ADCON0;
  91 __at(0x001E) volatile __ADCON0bits_t ADCON0bits;
  92
  93 __at(0x001F) __sfr ADCON1;
  94 __at(0x001F) volatile __ADCON1bits_t ADCON1bits;
  95
  96 __at(0x0081) __sfr OPTION_REG;
  97 __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
  98
  99 __at(0x0085) __sfr TRISA;
 100 __at(0x0085) volatile __TRISAbits_t TRISAbits;
 101
 102 __at(0x0087) __sfr TRISC;
 103 __at(0x0087) volatile __TRISCbits_t TRISCbits;
 104
 105 __at(0x0088) __sfr IOCAP;
 106 __at(0x0088) volatile __IOCAPbits_t IOCAPbits;
 107
 108 __at(0x0089) __sfr IOCCP;
 109 __at(0x0089) volatile __IOCCPbits_t IOCCPbits;
 110
 111 __at(0x008C) __sfr PIE1;
 112 __at(0x008C) volatile __PIE1bits_t PIE1bits;
 113
 114 __at(0x008D) __sfr PIE2;
 115 __at(0x008D) volatile __PIE2bits_t PIE2bits;
 116
 117 __at(0x008F) __sfr OSCCON;
 118 __at(0x008F) volatile __OSCCONbits_t OSCCONbits;
 119
 120 __at(0x0090) __sfr FVR1CON0;
 121 __at(0x0090) volatile __FVR1CON0bits_t FVR1CON0bits;
 122
 123 __at(0x0091) __sfr DAC1CON0;
 124 __at(0x0091) volatile __DAC1CON0bits_t DAC1CON0bits;
 125
 126 __at(0x0092) __sfr DAC1REFL;
 127
 128 __at(0x0093) __sfr DAC1REFH;
 129
 130 __at(0x0096) __sfr OPA1CON;
 131 __at(0x0096) volatile __OPA1CONbits_t OPA1CONbits;
 132
 133 __at(0x0096) __sfr OPA1CON0;
 134 __at(0x0096) volatile __OPA1CON0bits_t OPA1CON0bits;
 135
 136 __at(0x009B) __sfr C2CON0;
 137 __at(0x009B) volatile __C2CON0bits_t C2CON0bits;
 138
 139 __at(0x009B) __sfr CM2CON0;
 140 __at(0x009B) volatile __CM2CON0bits_t CM2CON0bits;
 141
 142 __at(0x009C) __sfr C2CON1;
 143 __at(0x009C) volatile __C2CON1bits_t C2CON1bits;
 144
 145 __at(0x009C) __sfr CM2CON1;
 146 __at(0x009C) volatile __CM2CON1bits_t CM2CON1bits;
 147
 148 __at(0x009D) __sfr C1CON0;
 149 __at(0x009D) volatile __C1CON0bits_t C1CON0bits;
 150
 151 __at(0x009D) __sfr CM1CON0;
 152 __at(0x009D) volatile __CM1CON0bits_t CM1CON0bits;
 153
 154 __at(0x009E) __sfr C1CON1;
 155 __at(0x009E) volatile __C1CON1bits_t C1CON1bits;
 156
 157 __at(0x009E) __sfr CM1CON1;
 158 __at(0x009E) volatile __CM1CON1bits_t CM1CON1bits;
 159
 160 __at(0x009F) __sfr CMOUT;
 161 __at(0x009F) volatile __CMOUTbits_t CMOUTbits;
 162
 163 __at(0x009F) __sfr MCOUT;
 164 __at(0x009F) volatile __MCOUTbits_t MCOUTbits;
 165
 166 __at(0x0105) __sfr LATA;
 167 __at(0x0105) volatile __LATAbits_t LATAbits;
 168
 169 __at(0x0107) __sfr LATC;
 170 __at(0x0107) volatile __LATCbits_t LATCbits;
 171
 172 __at(0x0108) __sfr IOCAN;
 173 __at(0x0108) volatile __IOCANbits_t IOCANbits;
 174
 175 __at(0x0109) __sfr IOCCN;
 176 __at(0x0109) volatile __IOCCNbits_t IOCCNbits;
 177
 178 __at(0x010C) __sfr WPUA;
 179 __at(0x010C) volatile __WPUAbits_t WPUAbits;
 180
 181 __at(0x010D) __sfr WPUC;
 182 __at(0x010D) volatile __WPUCbits_t WPUCbits;
 183
 184 __at(0x010E) __sfr SLRCONC;
 185 __at(0x010E) volatile __SLRCONCbits_t SLRCONCbits;
 186
 187 __at(0x010F) __sfr PCON;
 188 __at(0x010F) volatile __PCONbits_t PCONbits;
 189
 190 __at(0x0110) __sfr TMR2;
 191
 192 __at(0x0111) __sfr PR2;
 193
 194 __at(0x0112) __sfr T2CON;
 195 __at(0x0112) volatile __T2CONbits_t T2CONbits;
 196
 197 __at(0x0113) __sfr HLTMR1;
 198
 199 __at(0x0114) __sfr HLTPR1;
 200
 201 __at(0x0115) __sfr HLT1CON0;
 202 __at(0x0115) volatile __HLT1CON0bits_t HLT1CON0bits;
 203
 204 __at(0x0116) __sfr HLT1CON1;
 205 __at(0x0116) volatile __HLT1CON1bits_t HLT1CON1bits;
 206
 207 __at(0x0117) __sfr HLTMR2;
 208
 209 __at(0x0118) __sfr HLTPR2;
 210
 211 __at(0x0119) __sfr HLT2CON0;
 212 __at(0x0119) volatile __HLT2CON0bits_t HLT2CON0bits;
 213
 214 __at(0x011A) __sfr HLT2CON1;
 215 __at(0x011A) volatile __HLT2CON1bits_t HLT2CON1bits;
 216
 217 __at(0x011E) __sfr SLPC1CON0;
 218 __at(0x011E) volatile __SLPC1CON0bits_t SLPC1CON0bits;
 219
 220 __at(0x011E) __sfr SLPCCON0;
 221 __at(0x011E) volatile __SLPCCON0bits_t SLPCCON0bits;
 222
 223 __at(0x011F) __sfr SLPC1CON1;
 224 __at(0x011F) volatile __SLPC1CON1bits_t SLPC1CON1bits;
 225
 226 __at(0x011F) __sfr SLPCCON1;
 227 __at(0x011F) volatile __SLPCCON1bits_t SLPCCON1bits;
 228
 229 __at(0x0185) __sfr ANSELA;
 230 __at(0x0185) volatile __ANSELAbits_t ANSELAbits;
 231
 232 __at(0x0187) __sfr ANSELC;
 233 __at(0x0187) volatile __ANSELCbits_t ANSELCbits;
 234
 235 __at(0x0188) __sfr APFCON;
 236 __at(0x0188) volatile __APFCONbits_t APFCONbits;
 237
 238 __at(0x0189) __sfr OSCTUNE;
 239 __at(0x0189) volatile __OSCTUNEbits_t OSCTUNEbits;
 240
 241 __at(0x018C) __sfr PMCON1;
 242 __at(0x018C) volatile __PMCON1bits_t PMCON1bits;
 243
 244 __at(0x018D) __sfr PMCON2;
 245
 246 __at(0x018E) __sfr PMADR;
 247
 248 __at(0x018E) __sfr PMADRL;
 249
 250 __at(0x018F) __sfr PMADRH;
 251
 252 __at(0x0190) __sfr PMDAT;
 253
 254 __at(0x0190) __sfr PMDATL;
 255
 256 __at(0x0191) __sfr PMDATH;
 257
 258 __at(0x0192) __sfr COG1PHR;
 259 __at(0x0192) volatile __COG1PHRbits_t COG1PHRbits;
 260
 261 __at(0x0193) __sfr COG1PHF;
 262 __at(0x0193) volatile __COG1PHFbits_t COG1PHFbits;
 263
 264 __at(0x0194) __sfr COG1BKR;
 265 __at(0x0194) volatile __COG1BKRbits_t COG1BKRbits;
 266
 267 __at(0x0195) __sfr COG1BKF;
 268 __at(0x0195) volatile __COG1BKFbits_t COG1BKFbits;
 269
 270 __at(0x0196) __sfr COG1DBR;
 271 __at(0x0196) volatile __COG1DBRbits_t COG1DBRbits;
 272
 273 __at(0x0197) __sfr COG1DBF;
 274 __at(0x0197) volatile __COG1DBFbits_t COG1DBFbits;
 275
 276 __at(0x0198) __sfr COG1CON0;
 277 __at(0x0198) volatile __COG1CON0bits_t COG1CON0bits;
 278
 279 __at(0x0199) __sfr COG1CON1;
 280 __at(0x0199) volatile __COG1CON1bits_t COG1CON1bits;
 281
 282 __at(0x019A) __sfr COG1RIS;
 283 __at(0x019A) volatile __COG1RISbits_t COG1RISbits;
 284
 285 __at(0x019B) __sfr COG1RSIM;
 286 __at(0x019B) volatile __COG1RSIMbits_t COG1RSIMbits;
 287
 288 __at(0x019C) __sfr COG1FIS;
 289 __at(0x019C) volatile __COG1FISbits_t COG1FISbits;
 290
 291 __at(0x019D) __sfr COG1FSIM;
 292 __at(0x019D) volatile __COG1FSIMbits_t COG1FSIMbits;
 293
 294 __at(0x019E) __sfr COG1ASD0;
 295 __at(0x019E) volatile __COG1ASD0bits_t COG1ASD0bits;
 296
 297 __at(0x019F) __sfr COG1ASD1;
 298 __at(0x019F) volatile __COG1ASD1bits_t COG1ASD1bits;