sdcc/device/non-free/lib/pic14/libdev/pic16f785.c

   1 /*
   2  * This definitions of the PIC16F785 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:59 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic16f785.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF;
  30
  31 __at(0x0001) __sfr TMR0;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR;
  39
  40 __at(0x0005) __sfr PORTA;
  41 __at(0x0005) volatile __PORTAbits_t PORTAbits;
  42
  43 __at(0x0006) __sfr PORTB;
  44 __at(0x0006) volatile __PORTBbits_t PORTBbits;
  45
  46 __at(0x0007) __sfr PORTC;
  47 __at(0x0007) volatile __PORTCbits_t PORTCbits;
  48
  49 __at(0x000A) __sfr PCLATH;
  50
  51 __at(0x000B) __sfr INTCON;
  52 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  53
  54 __at(0x000C) __sfr PIR1;
  55 __at(0x000C) volatile __PIR1bits_t PIR1bits;
  56
  57 __at(0x000E) __sfr TMR1;
  58
  59 __at(0x000E) __sfr TMR1L;
  60
  61 __at(0x000F) __sfr TMR1H;
  62
  63 __at(0x0010) __sfr T1CON;
  64 __at(0x0010) volatile __T1CONbits_t T1CONbits;
  65
  66 __at(0x0011) __sfr TMR2;
  67
  68 __at(0x0012) __sfr T2CON;
  69 __at(0x0012) volatile __T2CONbits_t T2CONbits;
  70
  71 __at(0x0013) __sfr CCPR;
  72
  73 __at(0x0013) __sfr CCPR1L;
  74
  75 __at(0x0014) __sfr CCPR1H;
  76
  77 __at(0x0015) __sfr CCP1CON;
  78 __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits;
  79
  80 __at(0x0018) __sfr WDTCON;
  81 __at(0x0018) volatile __WDTCONbits_t WDTCONbits;
  82
  83 __at(0x001E) __sfr ADRESH;
  84
  85 __at(0x001F) __sfr ADCON0;
  86 __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
  87
  88 __at(0x0081) __sfr OPTION_REG;
  89 __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
  90
  91 __at(0x0085) __sfr TRISA;
  92 __at(0x0085) volatile __TRISAbits_t TRISAbits;
  93
  94 __at(0x0086) __sfr TRISB;
  95 __at(0x0086) volatile __TRISBbits_t TRISBbits;
  96
  97 __at(0x0087) __sfr TRISC;
  98 __at(0x0087) volatile __TRISCbits_t TRISCbits;
  99
 100 __at(0x008C) __sfr PIE1;
 101 __at(0x008C) volatile __PIE1bits_t PIE1bits;
 102
 103 __at(0x008E) __sfr PCON;
 104 __at(0x008E) volatile __PCONbits_t PCONbits;
 105
 106 __at(0x008F) __sfr OSCCON;
 107 __at(0x008F) volatile __OSCCONbits_t OSCCONbits;
 108
 109 __at(0x0090) __sfr OSCTUNE;
 110 __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
 111
 112 __at(0x0091) __sfr ANSEL;
 113 __at(0x0091) volatile __ANSELbits_t ANSELbits;
 114
 115 __at(0x0091) __sfr ANSEL0;
 116 __at(0x0091) volatile __ANSEL0bits_t ANSEL0bits;
 117
 118 __at(0x0092) __sfr PR2;
 119
 120 __at(0x0093) __sfr ANSEL1;
 121 __at(0x0093) volatile __ANSEL1bits_t ANSEL1bits;
 122
 123 __at(0x0095) __sfr WPU;
 124 __at(0x0095) volatile __WPUbits_t WPUbits;
 125
 126 __at(0x0095) __sfr WPUA;
 127 __at(0x0095) volatile __WPUAbits_t WPUAbits;
 128
 129 __at(0x0096) __sfr IOC;
 130 __at(0x0096) volatile __IOCbits_t IOCbits;
 131
 132 __at(0x0096) __sfr IOCA;
 133 __at(0x0096) volatile __IOCAbits_t IOCAbits;
 134
 135 __at(0x0098) __sfr REFCON;
 136 __at(0x0098) volatile __REFCONbits_t REFCONbits;
 137
 138 __at(0x0099) __sfr VRCON;
 139 __at(0x0099) volatile __VRCONbits_t VRCONbits;
 140
 141 __at(0x009A) __sfr EEDAT;
 142
 143 __at(0x009A) __sfr EEDATA;
 144
 145 __at(0x009B) __sfr EEADR;
 146
 147 __at(0x009C) __sfr EECON1;
 148 __at(0x009C) volatile __EECON1bits_t EECON1bits;
 149
 150 __at(0x009D) __sfr EECON2;
 151
 152 __at(0x009E) __sfr ADRESL;
 153
 154 __at(0x009F) __sfr ADCON1;
 155 __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
 156
 157 __at(0x0110) __sfr PWMCON1;
 158 __at(0x0110) volatile __PWMCON1bits_t PWMCON1bits;
 159
 160 __at(0x0111) __sfr PWMCON0;
 161 __at(0x0111) volatile __PWMCON0bits_t PWMCON0bits;
 162
 163 __at(0x0112) __sfr PWMCLK;
 164 __at(0x0112) volatile __PWMCLKbits_t PWMCLKbits;
 165
 166 __at(0x0113) __sfr PWMPH1;
 167 __at(0x0113) volatile __PWMPH1bits_t PWMPH1bits;
 168
 169 __at(0x0114) __sfr PWMPH2;
 170 __at(0x0114) volatile __PWMPH2bits_t PWMPH2bits;
 171
 172 __at(0x0119) __sfr CM1CON0;
 173 __at(0x0119) volatile __CM1CON0bits_t CM1CON0bits;
 174
 175 __at(0x011A) __sfr CM2CON0;
 176 __at(0x011A) volatile __CM2CON0bits_t CM2CON0bits;
 177
 178 __at(0x011B) __sfr CM2CON1;
 179 __at(0x011B) volatile __CM2CON1bits_t CM2CON1bits;
 180
 181 __at(0x011C) __sfr OPA1CON;
 182 __at(0x011C) volatile __OPA1CONbits_t OPA1CONbits;
 183
 184 __at(0x011D) __sfr OPA2CON;
 185 __at(0x011D) volatile __OPA2CONbits_t OPA2CONbits;