2 * This definitions of the PIC16F883 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:01 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #include <pic16f883.h>
27 //==============================================================================
29 __at(0x0000) __sfr INDF
;
31 __at(0x0001) __sfr TMR0
;
33 __at(0x0002) __sfr PCL
;
35 __at(0x0003) __sfr STATUS
;
36 __at(0x0003) volatile __STATUSbits_t STATUSbits
;
38 __at(0x0004) __sfr FSR
;
40 __at(0x0005) __sfr PORTA
;
41 __at(0x0005) volatile __PORTAbits_t PORTAbits
;
43 __at(0x0006) __sfr PORTB
;
44 __at(0x0006) volatile __PORTBbits_t PORTBbits
;
46 __at(0x0007) __sfr PORTC
;
47 __at(0x0007) volatile __PORTCbits_t PORTCbits
;
49 __at(0x0009) __sfr PORTE
;
50 __at(0x0009) volatile __PORTEbits_t PORTEbits
;
52 __at(0x000A) __sfr PCLATH
;
54 __at(0x000B) __sfr INTCON
;
55 __at(0x000B) volatile __INTCONbits_t INTCONbits
;
57 __at(0x000C) __sfr PIR1
;
58 __at(0x000C) volatile __PIR1bits_t PIR1bits
;
60 __at(0x000D) __sfr PIR2
;
61 __at(0x000D) volatile __PIR2bits_t PIR2bits
;
63 __at(0x000E) __sfr TMR1
;
65 __at(0x000E) __sfr TMR1L
;
67 __at(0x000F) __sfr TMR1H
;
69 __at(0x0010) __sfr T1CON
;
70 __at(0x0010) volatile __T1CONbits_t T1CONbits
;
72 __at(0x0011) __sfr TMR2
;
74 __at(0x0012) __sfr T2CON
;
75 __at(0x0012) volatile __T2CONbits_t T2CONbits
;
77 __at(0x0013) __sfr SSPBUF
;
79 __at(0x0014) __sfr SSPCON
;
80 __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
82 __at(0x0015) __sfr CCPR1
;
84 __at(0x0015) __sfr CCPR1L
;
86 __at(0x0016) __sfr CCPR1H
;
88 __at(0x0017) __sfr CCP1CON
;
89 __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
91 __at(0x0018) __sfr RCSTA
;
92 __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
94 __at(0x0019) __sfr TXREG
;
96 __at(0x001A) __sfr RCREG
;
98 __at(0x001B) __sfr CCPR2
;
100 __at(0x001B) __sfr CCPR2L
;
102 __at(0x001C) __sfr CCPR2H
;
104 __at(0x001D) __sfr CCP2CON
;
105 __at(0x001D) volatile __CCP2CONbits_t CCP2CONbits
;
107 __at(0x001E) __sfr ADRESH
;
109 __at(0x001F) __sfr ADCON0
;
110 __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
112 __at(0x0081) __sfr OPTION_REG
;
113 __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
115 __at(0x0085) __sfr TRISA
;
116 __at(0x0085) volatile __TRISAbits_t TRISAbits
;
118 __at(0x0086) __sfr TRISB
;
119 __at(0x0086) volatile __TRISBbits_t TRISBbits
;
121 __at(0x0087) __sfr TRISC
;
122 __at(0x0087) volatile __TRISCbits_t TRISCbits
;
124 __at(0x0089) __sfr TRISE
;
125 __at(0x0089) volatile __TRISEbits_t TRISEbits
;
127 __at(0x008C) __sfr PIE1
;
128 __at(0x008C) volatile __PIE1bits_t PIE1bits
;
130 __at(0x008D) __sfr PIE2
;
131 __at(0x008D) volatile __PIE2bits_t PIE2bits
;
133 __at(0x008E) __sfr PCON
;
134 __at(0x008E) volatile __PCONbits_t PCONbits
;
136 __at(0x008F) __sfr OSCCON
;
137 __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
139 __at(0x0090) __sfr OSCTUNE
;
140 __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
142 __at(0x0091) __sfr SSPCON2
;
143 __at(0x0091) volatile __SSPCON2bits_t SSPCON2bits
;
145 __at(0x0092) __sfr PR2
;
147 __at(0x0093) __sfr MSK
;
148 __at(0x0093) volatile __MSKbits_t MSKbits
;
150 __at(0x0093) __sfr SSPADD
;
152 __at(0x0093) __sfr SSPMSK
;
153 __at(0x0093) volatile __SSPMSKbits_t SSPMSKbits
;
155 __at(0x0094) __sfr SSPSTAT
;
156 __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
158 __at(0x0095) __sfr WPUB
;
159 __at(0x0095) volatile __WPUBbits_t WPUBbits
;
161 __at(0x0096) __sfr IOCB
;
162 __at(0x0096) volatile __IOCBbits_t IOCBbits
;
164 __at(0x0097) __sfr VRCON
;
165 __at(0x0097) volatile __VRCONbits_t VRCONbits
;
167 __at(0x0098) __sfr TXSTA
;
168 __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
170 __at(0x0099) __sfr SPBRG
;
171 __at(0x0099) volatile __SPBRGbits_t SPBRGbits
;
173 __at(0x009A) __sfr SPBRGH
;
174 __at(0x009A) volatile __SPBRGHbits_t SPBRGHbits
;
176 __at(0x009B) __sfr PWM1CON
;
177 __at(0x009B) volatile __PWM1CONbits_t PWM1CONbits
;
179 __at(0x009C) __sfr ECCPAS
;
180 __at(0x009C) volatile __ECCPASbits_t ECCPASbits
;
182 __at(0x009D) __sfr PSTRCON
;
183 __at(0x009D) volatile __PSTRCONbits_t PSTRCONbits
;
185 __at(0x009E) __sfr ADRESL
;
187 __at(0x009F) __sfr ADCON1
;
188 __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
190 __at(0x0105) __sfr WDTCON
;
191 __at(0x0105) volatile __WDTCONbits_t WDTCONbits
;
193 __at(0x0107) __sfr CM1CON0
;
194 __at(0x0107) volatile __CM1CON0bits_t CM1CON0bits
;
196 __at(0x0108) __sfr CM2CON0
;
197 __at(0x0108) volatile __CM2CON0bits_t CM2CON0bits
;
199 __at(0x0109) __sfr CM2CON1
;
200 __at(0x0109) volatile __CM2CON1bits_t CM2CON1bits
;
202 __at(0x010C) __sfr EEDAT
;
204 __at(0x010C) __sfr EEDATA
;
206 __at(0x010D) __sfr EEADR
;
208 __at(0x010E) __sfr EEDATH
;
210 __at(0x010F) __sfr EEADRH
;
212 __at(0x0185) __sfr SRCON
;
213 __at(0x0185) volatile __SRCONbits_t SRCONbits
;
215 __at(0x0187) __sfr BAUDCTL
;
216 __at(0x0187) volatile __BAUDCTLbits_t BAUDCTLbits
;
218 __at(0x0188) __sfr ANSEL
;
219 __at(0x0188) volatile __ANSELbits_t ANSELbits
;
221 __at(0x0189) __sfr ANSELH
;
222 __at(0x0189) volatile __ANSELHbits_t ANSELHbits
;
224 __at(0x018C) __sfr EECON1
;
225 __at(0x018C) volatile __EECON1bits_t EECON1bits
;
227 __at(0x018D) __sfr EECON2
;