2 * This definitions of the PIC16LF87 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:56 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #include <pic16lf87.h>
27 //==============================================================================
29 __at(0x0000) __sfr INDF
;
31 __at(0x0001) __sfr TMR0
;
33 __at(0x0002) __sfr PCL
;
35 __at(0x0003) __sfr STATUS
;
36 __at(0x0003) volatile __STATUSbits_t STATUSbits
;
38 __at(0x0004) __sfr FSR
;
40 __at(0x0005) __sfr PORTA
;
41 __at(0x0005) volatile __PORTAbits_t PORTAbits
;
43 __at(0x0006) __sfr PORTB
;
44 __at(0x0006) volatile __PORTBbits_t PORTBbits
;
46 __at(0x000A) __sfr PCLATH
;
48 __at(0x000B) __sfr INTCON
;
49 __at(0x000B) volatile __INTCONbits_t INTCONbits
;
51 __at(0x000C) __sfr PIR1
;
52 __at(0x000C) volatile __PIR1bits_t PIR1bits
;
54 __at(0x000D) __sfr PIR2
;
55 __at(0x000D) volatile __PIR2bits_t PIR2bits
;
57 __at(0x000E) __sfr TMR1
;
59 __at(0x000E) __sfr TMR1L
;
61 __at(0x000F) __sfr TMR1H
;
63 __at(0x0010) __sfr T1CON
;
64 __at(0x0010) volatile __T1CONbits_t T1CONbits
;
66 __at(0x0011) __sfr TMR2
;
68 __at(0x0012) __sfr T2CON
;
69 __at(0x0012) volatile __T2CONbits_t T2CONbits
;
71 __at(0x0013) __sfr SSPBUF
;
73 __at(0x0014) __sfr SSPCON
;
74 __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
76 __at(0x0015) __sfr CCPR1
;
78 __at(0x0015) __sfr CCPR1L
;
80 __at(0x0016) __sfr CCPR1H
;
82 __at(0x0017) __sfr CCP1CON
;
83 __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
85 __at(0x0018) __sfr RCSTA
;
86 __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
88 __at(0x0019) __sfr TXREG
;
90 __at(0x001A) __sfr RCREG
;
92 __at(0x0081) __sfr OPTION_REG
;
93 __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
95 __at(0x0085) __sfr TRISA
;
96 __at(0x0085) volatile __TRISAbits_t TRISAbits
;
98 __at(0x0086) __sfr TRISB
;
99 __at(0x0086) volatile __TRISBbits_t TRISBbits
;
101 __at(0x008C) __sfr PIE1
;
102 __at(0x008C) volatile __PIE1bits_t PIE1bits
;
104 __at(0x008D) __sfr PIE2
;
105 __at(0x008D) volatile __PIE2bits_t PIE2bits
;
107 __at(0x008E) __sfr PCON
;
108 __at(0x008E) volatile __PCONbits_t PCONbits
;
110 __at(0x008F) __sfr OSCCON
;
111 __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
113 __at(0x0090) __sfr OSCTUNE
;
114 __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
116 __at(0x0092) __sfr PR2
;
118 __at(0x0093) __sfr SSPADD
;
120 __at(0x0094) __sfr SSPSTAT
;
121 __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
123 __at(0x0098) __sfr TXSTA
;
124 __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
126 __at(0x0099) __sfr SPBRG
;
128 __at(0x009C) __sfr CMCON
;
129 __at(0x009C) volatile __CMCONbits_t CMCONbits
;
131 __at(0x009D) __sfr CVRCON
;
132 __at(0x009D) volatile __CVRCONbits_t CVRCONbits
;
134 __at(0x0105) __sfr WDTCON
;
135 __at(0x0105) volatile __WDTCONbits_t WDTCONbits
;
137 __at(0x010C) __sfr EEDATA
;
139 __at(0x010D) __sfr EEADR
;
141 __at(0x010E) __sfr EEDATH
;
143 __at(0x010F) __sfr EEADRH
;
145 __at(0x018C) __sfr EECON1
;
146 __at(0x018C) volatile __EECON1bits_t EECON1bits
;
148 __at(0x018D) __sfr EECON2
;