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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / sdas / as6500 / r65pst.c
blob3c241495ad90f9850d4bbc38b737c4a8c0b73a73
1 /* r65pst.c */
2
3 /*
4 * Copyright (C) 1995-2023 Alan R. Baldwin
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 *
19 *
20 * Alan R. Baldwin
21 * 721 Berkeley St.
22 * Kent, Ohio 44240
23 */
24
25 /*
26 * With Contributions from
27 *
28 * Marko Makela
29 * Sillitie 10 A
30 * 01480 Vantaa
31 * Finland
32 * Internet: Marko dot Makela at Helsinki dot Fi
33 * EARN/BitNet: msmakela at finuh
34 */
35
36 #include "asxxxx.h"
37 #include "r6500.h"
38
39 #if 0
40
41 /*
42 * Coding Banks
43 */
44 struct bank bank[2] = {
45 /* The '_CODE' area/bank has a NULL default file suffix. */
46 { NULL, "_CSEG", NULL, 0, 0, 0, 0, 0 },
47 { &bank[0], "_DSEG", "_DS", 1, 0, 0, 0, B_FSFX }
48 };
49
50 /*
51 * Coding Areas
52 */
53 struct area area[2] = {
54 { NULL, &bank[0], "_CODE", 0, 0, 0, A_1BYTE|A_BNK|A_CSEG },
55 { &area[0], &bank[1], "_DATA", 1, 0, 0, A_1BYTE|A_BNK|A_DSEG }
56 };
57
58 /*
59 * Basic Relocation Mode Definition
60 *
61 * #define R_NORM 0000 No Bit Positioning
62 */
63 char mode0[32] = { /* R_NORM */
64 '\200', '\201', '\202', '\203', '\204', '\205', '\206', '\207',
65 '\210', '\211', '\212', '\213', '\214', '\215', '\216', '\217',
66 '\220', '\221', '\222', '\223', '\224', '\225', '\226', '\227',
67 '\230', '\231', '\232', '\233', '\234', '\235', '\236', '\237'
68 };
69
70 /*
71 * Additional Relocation Mode Definitions
72 */
73
74 /* None Required */
75
76 /*
77 * *m_def is a pointer to the bit relocation definition.
78 * m_flag indicates that bit position swapping is required.
79 * m_dbits contains the active bit positions for the output.
80 * m_sbits contains the active bit positions for the input.
81 *
82 * struct mode
83 * {
84 * char * m_def; Bit Relocation Definition
85 * a_uint m_flag; Bit Swapping Flag
86 * a_uint m_dbits; Destination Bit Mask
87 * a_uint m_sbits; Source Bit Mask
88 * };
89 */
90 struct mode mode[1] = {
91 { &mode0[0], 0, 0x0000FFFF, 0x0000FFFF }
92 };
93
94 /*
95 * Array of Pointers to mode Structures
96 */
97 struct mode *modep[16] = {
98 &mode[0], NULL, NULL, NULL,
99 NULL, NULL, NULL, NULL,
100 NULL, NULL, NULL, NULL,
101 NULL, NULL, NULL, NULL
102 };
103
104 #endif
105
106 /*
107 * Mnemonic Structure
108 */
109 struct mne mne[] = {
110
111 /* machine */
112
113 // { NULL, "CSEG", S_ATYP, 0, A_CSEG|A_1BYTE },
114 // { NULL, "DSEG", S_ATYP, 0, A_DSEG|A_1BYTE },
115
116 /* system */
117
118 // { NULL, "BANK", S_ATYP, 0, A_BNK },
119 { NULL, "CON", S_ATYP, 0, A_CON },
120 { NULL, "OVR", S_ATYP, 0, A_OVR },
121 { NULL, "REL", S_ATYP, 0, A_REL },
122 { NULL, "ABS", S_ATYP, 0, A_ABS },
123 { NULL, "NOPAG", S_ATYP, 0, A_NOPAG },
124 { NULL, "PAG", S_ATYP, 0, A_PAG },
125
126 { NULL, "CODE", S_ATYP, 0, A_CODE },
127 { NULL, "DATA", S_ATYP, 0, A_DATA },
128 { NULL, "LOAD", S_ATYP, 0, A_LOAD },
129 { NULL, "NOLOAD", S_ATYP, 0, A_NOLOAD },
130
131 { NULL, ".page", S_PAGE, 0, 0 },
132 { NULL, ".title", S_HEADER, 0, O_TITLE },
133 { NULL, ".sbttl", S_HEADER, 0, O_SBTTL },
134 { NULL, ".module", S_MODUL, 0, 0 },
135 { NULL, ".include", S_INCL, 0, I_CODE },
136 { NULL, ".incbin", S_INCL, 0, I_BNRY },
137 { NULL, ".area", S_AREA, 0, 0 },
138 // { NULL, ".psharea", S_AREA, 0, O_PSH },
139 // { NULL, ".poparea", S_AREA, 0, O_POP },
140 // { NULL, ".bank", S_BANK, 0, 0 },
141 { NULL, ".org", S_ORG, 0, 0 },
142 { NULL, ".radix", S_RADIX, 0, 0 },
143 { NULL, ".globl", S_GLOBL, 0, 0 },
144 { NULL, ".local", S_LOCAL, 0, 0 },
145 { NULL, ".if", S_CONDITIONAL, 0, O_IF },
146 { NULL, ".iff", S_CONDITIONAL, 0, O_IFF },
147 { NULL, ".ift", S_CONDITIONAL, 0, O_IFT },
148 { NULL, ".iftf", S_CONDITIONAL, 0, O_IFTF },
149 { NULL, ".ifdef", S_CONDITIONAL, 0, O_IFDEF },
150 { NULL, ".ifndef", S_CONDITIONAL, 0, O_IFNDEF},
151 { NULL, ".ifgt", S_CONDITIONAL, 0, O_IFGT },
152 { NULL, ".iflt", S_CONDITIONAL, 0, O_IFLT },
153 { NULL, ".ifge", S_CONDITIONAL, 0, O_IFGE },
154 { NULL, ".ifle", S_CONDITIONAL, 0, O_IFLE },
155 { NULL, ".ifeq", S_CONDITIONAL, 0, O_IFEQ },
156 { NULL, ".ifne", S_CONDITIONAL, 0, O_IFNE },
157 { NULL, ".ifb", S_CONDITIONAL, 0, O_IFB },
158 { NULL, ".ifnb", S_CONDITIONAL, 0, O_IFNB },
159 { NULL, ".ifidn", S_CONDITIONAL, 0, O_IFIDN },
160 { NULL, ".ifdif", S_CONDITIONAL, 0, O_IFDIF },
161 { NULL, ".iif", S_CONDITIONAL, 0, O_IIF },
162 { NULL, ".iiff", S_CONDITIONAL, 0, O_IIFF },
163 { NULL, ".iift", S_CONDITIONAL, 0, O_IIFT },
164 { NULL, ".iiftf", S_CONDITIONAL, 0, O_IIFTF },
165 { NULL, ".iifdef", S_CONDITIONAL, 0, O_IIFDEF},
166 { NULL, ".iifndef", S_CONDITIONAL, 0, O_IIFNDEF},
167 { NULL, ".iifgt", S_CONDITIONAL, 0, O_IIFGT },
168 { NULL, ".iiflt", S_CONDITIONAL, 0, O_IIFLT },
169 { NULL, ".iifge", S_CONDITIONAL, 0, O_IIFGE },
170 { NULL, ".iifle", S_CONDITIONAL, 0, O_IIFLE },
171 { NULL, ".iifeq", S_CONDITIONAL, 0, O_IIFEQ },
172 { NULL, ".iifne", S_CONDITIONAL, 0, O_IIFNE },
173 { NULL, ".iifb", S_CONDITIONAL, 0, O_IIFB },
174 { NULL, ".iifnb", S_CONDITIONAL, 0, O_IIFNB },
175 { NULL, ".iifidn", S_CONDITIONAL, 0, O_IIFIDN},
176 { NULL, ".iifdif", S_CONDITIONAL, 0, O_IIFDIF},
177 { NULL, ".else", S_CONDITIONAL, 0, O_ELSE },
178 { NULL, ".endif", S_CONDITIONAL, 0, O_ENDIF },
179 { NULL, ".list", S_LISTING, 0, O_LIST },
180 { NULL, ".nlist", S_LISTING, 0, O_NLIST },
181 { NULL, ".uleb128", S_ULEB128, 0, 0 },
182 { NULL, ".sleb128", S_SLEB128, 0, 0 },
183 { NULL, ".equ", S_EQU, 0, O_EQU },
184 { NULL, ".gblequ", S_EQU, 0, O_GBLEQU},
185 { NULL, ".lclequ", S_EQU, 0, O_LCLEQU},
186 { NULL, ".byte", S_DATA, 0, O_1BYTE },
187 { NULL, ".db", S_DATA, 0, O_1BYTE },
188 { NULL, ".fcb", S_DATA, 0, O_1BYTE },
189 { NULL, ".word", S_DATA, 0, O_2BYTE },
190 { NULL, ".dw", S_DATA, 0, O_2BYTE },
191 { NULL, ".fdb", S_DATA, 0, O_2BYTE },
192 /* { NULL, ".3byte", S_DATA, 0, O_3BYTE }, */
193 /* { NULL, ".triple", S_DATA, 0, O_3BYTE }, */
194 /* { NULL, ".dl", S_DATA, 0, O_4BYTE }, */
195 /* { NULL, ".4byte", S_DATA, 0, O_4BYTE }, */
196 /* { NULL, ".quad", S_DATA, 0, O_4BYTE }, */
197 /* { NULL, ".long", S_DATA, 0, O_4BYTE }, */
198 { NULL, ".blkb", S_BLK, 0, O_1BYTE },
199 { NULL, ".ds", S_BLK, 0, O_1BYTE },
200 { NULL, ".rmb", S_BLK, 0, O_1BYTE },
201 { NULL, ".rs", S_BLK, 0, O_1BYTE },
202 { NULL, ".blkw", S_BLK, 0, O_2BYTE },
203 /* { NULL, ".blk3", S_BLK, 0, O_3BYTE }, */
204 /* { NULL, ".blk4", S_BLK, 0, O_4BYTE }, */
205 /* { NULL, ".blkl", S_BLK, 0, O_4BYTE }, */
206 { NULL, ".ascii", S_ASCIX, 0, O_ASCII },
207 { NULL, ".ascis", S_ASCIX, 0, O_ASCIS },
208 { NULL, ".asciz", S_ASCIX, 0, O_ASCIZ },
209 { NULL, ".str", S_ASCIX, 0, O_ASCII },
210 { NULL, ".strs", S_ASCIX, 0, O_ASCIS },
211 { NULL, ".strz", S_ASCIX, 0, O_ASCIZ },
212 { NULL, ".fcc", S_ASCIX, 0, O_ASCII },
213 { NULL, ".define", S_DEFINE, 0, O_DEF },
214 { NULL, ".undefine", S_DEFINE, 0, O_UNDEF },
215 { NULL, ".even", S_BOUNDARY, 0, O_EVEN },
216 { NULL, ".odd", S_BOUNDARY, 0, O_ODD },
217 { NULL, ".bndry", S_BOUNDARY, 0, O_BNDRY },
218 { NULL, ".msg", S_MSG, 0, 0 },
219 { NULL, ".assume", S_ERROR, 0, O_ASSUME},
220 { NULL, ".error", S_ERROR, 0, O_ERROR },
221 /* { NULL, ".msb", S_MSB, 0, 0 }, */
222 /* { NULL, ".lohi", S_MSB, 0, O_LOHI }, */
223 /* { NULL, ".hilo", S_MSB, 0, O_HILO }, */
224 /* { NULL, ".8bit", S_BITS, 0, O_1BYTE }, */
225 /* { NULL, ".16bit", S_BITS, 0, O_2BYTE }, */
226 /* { NULL, ".24bit", S_BITS, 0, O_3BYTE }, */
227 /* { NULL, ".32bit", S_BITS, 0, O_4BYTE }, */
228 // { NULL, ".trace", S_TRACE, 0, O_TRC },
229 // { NULL, ".ntrace", S_TRACE, 0, O_NTRC },
230 /* { NULL, "_______", S_CONST, 0, VALUE }, */
231 // { NULL, ".end", S_END, 0, 0 },
232
233 /* sdas specific */
234 { NULL, ".optsdcc", S_OPTSDCC, 0, 0 },
235 /* end sdas specific */
236
237
238 /* Macro Processor */
239
240 { NULL, ".macro", S_MACRO, 0, O_MACRO },
241 { NULL, ".endm", S_MACRO, 0, O_ENDM },
242 { NULL, ".mexit", S_MACRO, 0, O_MEXIT },
243
244 { NULL, ".narg", S_MACRO, 0, O_NARG },
245 { NULL, ".nchr", S_MACRO, 0, O_NCHR },
246 { NULL, ".ntyp", S_MACRO, 0, O_NTYP },
247
248 { NULL, ".irp", S_MACRO, 0, O_IRP },
249 { NULL, ".irpc", S_MACRO, 0, O_IRPC },
250 { NULL, ".rept", S_MACRO, 0, O_REPT },
251
252 { NULL, ".nval", S_MACRO, 0, O_NVAL },
253
254 { NULL, ".mdelete", S_MACRO, 0, O_MDEL },
255
256 /* Special */
257
258 { NULL, ".setdp", S_SDP, 0, 0 },
259 // { NULL, ".dpgbl", S_PGD, 0, 0 },
260
261 /* Machines */
262
263 { NULL, ".r6500", S_CPU, 0, X_R6500 },
264 { NULL, ".r65f11", S_CPU, 0, X_R65F11},
265 { NULL, ".r65c00", S_CPU, 0, X_R65C00},
266 { NULL, ".r65c02", S_CPU, 0, X_R65C02},
267
268 /* 650X / 651X Family Instructions */
269
270 { NULL, "adc", S_DOP, 0, 0x60 },
271 { NULL, "and", S_DOP, 0, 0x20 },
272 { NULL, "cmp", S_DOP, 0, 0xC0 },
273 { NULL, "eor", S_DOP, 0, 0x40 },
274 { NULL, "lda", S_DOP, 0, 0xA0 },
275 { NULL, "ora", S_DOP, 0, 0x00 },
276 { NULL, "sbc", S_DOP, 0, 0xE0 },
277 { NULL, "sta", S_DOP, 0, 0x80 },
278
279 { NULL, "asl", S_SOP, 0, 0x00 },
280 { NULL, "lsr", S_SOP, 0, 0x40 },
281 { NULL, "rol", S_SOP, 0, 0x20 },
282 { NULL, "ror", S_SOP, 0, 0x60 },
283 { NULL, "dec", S_SOP, 0, 0xC0 },
284 { NULL, "inc", S_SOP, 0, 0xE0 },
285
286 { NULL, "bpl", S_BRA1, 0, 0x10 },
287 { NULL, "bmi", S_BRA1, 0, 0x30 },
288 { NULL, "bvc", S_BRA1, 0, 0x50 },
289 { NULL, "bvs", S_BRA1, 0, 0x70 },
290 { NULL, "bcc", S_BRA1, 0, 0x90 },
291 { NULL, "bhs", S_BRA1, 0, 0x90 },
292 { NULL, "bcs", S_BRA1, 0, 0xB0 },
293 { NULL, "blo", S_BRA1, 0, 0xB0 },
294 { NULL, "bne", S_BRA1, 0, 0xD0 },
295 { NULL, "beq", S_BRA1, 0, 0xF0 },
296
297 { NULL, "bit", S_BIT, 0, 0x20 },
298
299 { NULL, "brk", S_INH1, 0, 0x00 },
300 { NULL, "clc", S_INH1, 0, 0x18 },
301 { NULL, "cld", S_INH1, 0, 0xD8 },
302 { NULL, "cli", S_INH1, 0, 0x58 },
303 { NULL, "clv", S_INH1, 0, 0xB8 },
304 { NULL, "dex", S_INH1, 0, 0xCA },
305 { NULL, "dey", S_INH1, 0, 0x88 },
306 { NULL, "inx", S_INH1, 0, 0xE8 },
307 { NULL, "iny", S_INH1, 0, 0xC8 },
308 { NULL, "nop", S_INH1, 0, 0xEA },
309 { NULL, "pha", S_INH1, 0, 0x48 },
310 { NULL, "php", S_INH1, 0, 0x08 },
311 { NULL, "pla", S_INH1, 0, 0x68 },
312 { NULL, "plp", S_INH1, 0, 0x28 },
313 { NULL, "rti", S_INH1, 0, 0x40 },
314 { NULL, "rts", S_INH1, 0, 0x60 },
315 { NULL, "sec", S_INH1, 0, 0x38 },
316 { NULL, "sed", S_INH1, 0, 0xF8 },
317 { NULL, "sei", S_INH1, 0, 0x78 },
318 { NULL, "tax", S_INH1, 0, 0xAA },
319 { NULL, "tay", S_INH1, 0, 0xA8 },
320 { NULL, "tsx", S_INH1, 0, 0xBA },
321 { NULL, "txa", S_INH1, 0, 0x8A },
322 { NULL, "txs", S_INH1, 0, 0x9A },
323 { NULL, "tya", S_INH1, 0, 0x98 },
324
325 { NULL, "cpx", S_CP, 0, 0xE0 },
326 { NULL, "cpy", S_CP, 0, 0xC0 },
327
328 { NULL, "ldx", S_LDSTX, 0, 0xA0 },
329 { NULL, "stx", S_LDSTX, 0, 0x80 },
330
331 { NULL, "ldy", S_LDSTY, 0, 0xA0 },
332 { NULL, "sty", S_LDSTY, 0, 0x80 },
333
334 { NULL, "jmp", S_JMP, 0, 0x4C },
335
336 { NULL, "jsr", S_JSR, 0, 0x20 },
337
338 /* Additional R65F1X series Instructions */
339
340 { NULL, "bbr0", S_BB, 0, 0x0F },
341 { NULL, "bbr1", S_BB, 0, 0x1F },
342 { NULL, "bbr2", S_BB, 0, 0x2F },
343 { NULL, "bbr3", S_BB, 0, 0x3F },
344 { NULL, "bbr4", S_BB, 0, 0x4F },
345 { NULL, "bbr5", S_BB, 0, 0x5F },
346 { NULL, "bbr6", S_BB, 0, 0x6F },
347 { NULL, "bbr7", S_BB, 0, 0x7F },
348 { NULL, "bbs0", S_BB, 0, 0x8F },
349 { NULL, "bbs1", S_BB, 0, 0x9F },
350 { NULL, "bbs2", S_BB, 0, 0xAF },
351 { NULL, "bbs3", S_BB, 0, 0xBF },
352 { NULL, "bbs4", S_BB, 0, 0xCF },
353 { NULL, "bbs5", S_BB, 0, 0xDF },
354 { NULL, "bbs6", S_BB, 0, 0xEF },
355 { NULL, "bbs7", S_BB, 0, 0xFF },
356
357 { NULL, "rmb0", S_MB, 0, 0x07 },
358 { NULL, "rmb1", S_MB, 0, 0x17 },
359 { NULL, "rmb2", S_MB, 0, 0x27 },
360 { NULL, "rmb3", S_MB, 0, 0x37 },
361 { NULL, "rmb4", S_MB, 0, 0x47 },
362 { NULL, "rmb5", S_MB, 0, 0x57 },
363 { NULL, "rmb6", S_MB, 0, 0x67 },
364 { NULL, "rmb7", S_MB, 0, 0x77 },
365 { NULL, "smb0", S_MB, 0, 0x87 },
366 { NULL, "smb1", S_MB, 0, 0x97 },
367 { NULL, "smb2", S_MB, 0, 0xA7 },
368 { NULL, "smb3", S_MB, 0, 0xB7 },
369 { NULL, "smb4", S_MB, 0, 0xC7 },
370 { NULL, "smb5", S_MB, 0, 0xD7 },
371 { NULL, "smb6", S_MB, 0, 0xE7 },
372 { NULL, "smb7", S_MB, 0, 0xF7 },
373
374 /* Additional R65C00 series Instructions */
375
376 { NULL, "bra", S_BRA2, 0, 0x80 },
377
378 { NULL, "phx", S_INH2, 0, 0xDA },
379 { NULL, "phy", S_INH2, 0, 0x5A },
380 { NULL, "plx", S_INH2, 0, 0xFA },
381 { NULL, "ply", S_INH2, 0, 0x7A },
382
383 { NULL, "mul", S_INH3, 0, 0x02 },
384
385 /* Additional R65C02 series Instructions */
386
387 { NULL, "stz", S_STZ, 0, 0x60 },
388
389 { NULL, "trb", S_TB, 0, 0x10 },
390 { NULL, "tsb", S_TB, S_EOL, 0x00 }
391 };
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