struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / sdas / as6808 / m08mch.c
bloba3d2caaaeb856bb2aa03336aacc9f57c9c3e565b
1 /* m08mch.c */
3 /*
4 * Copyright (C) 1993-2021 Alan R. Baldwin
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 * Alan R. Baldwin
21 * 721 Berkeley St.
22 * Kent, Ohio 44240
25 #include "asxxxx.h"
26 #include "m6808.h"
28 char *cpu = "Motorola 68HC(S)08 / 68(HC)05";
29 char *dsft = "asm";
32 * Opcode Cycle Definitions
34 #define OPCY_SDP ((char) (0xFF))
35 #define OPCY_ERR ((char) (0xFE))
36 #define OPCY_CPU ((char) (0xFD))
39 /* OPCY_NONE ((char) (0x80)) */
40 /* OPCY_MASK ((char) (0x7F)) */
42 #define UN ((char) (OPCY_NONE | 0x00))
43 #define P2 ((char) (OPCY_NONE | 0x01))
47 * 6805 Cycles
50 static char m05cyc[256] = {
51 /*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
52 /*--*--* - - - - - - - - - - - - - - - - */
53 /*00*/ 10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,
54 /*10*/ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
55 /*20*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
56 /*30*/ 6,UN,UN, 6, 6,UN, 6, 6, 6, 6, 6,UN, 6, 6,UN, 6,
57 /*40*/ 4,UN,UN, 4, 4,UN, 4, 4, 4, 4, 4,UN, 4, 4,UN, 4,
58 /*50*/ 4,UN,UN, 4, 4,UN, 4, 4, 4, 4, 4,UN, 4, 4,UN, 4,
59 /*60*/ 7,UN,UN, 7, 7,UN, 7, 7, 7, 7, 7,UN, 7, 7,UN, 7,
60 /*70*/ 6,UN,UN, 6, 6,UN, 6, 6, 6, 6, 6,UN, 6, 6,UN, 6,
61 /*80*/ 9, 6,UN,11,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 2, 2,
62 /*90*/ UN,UN,UN,UN,UN,UN,UN, 2, 2, 2, 2, 2, 2, 2,UN, 2,
63 /*A0*/ 2, 2, 2, 2, 2, 2, 2,UN, 2, 2, 2, 2,UN, 8, 2,UN,
64 /*B0*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 7, 4, 5,
65 /*C0*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 8, 5, 6,
66 /*D0*/ 6, 6, 6, 6, 6, 6, 6, 7, 6, 6, 6, 6, 5, 9, 6, 7,
67 /*E0*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 8, 5, 6,
68 /*F0*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 7, 4, 5
73 * 146805 CMOS Cycles
76 static char mcmcyc[256] = {
77 /*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
78 /*--*--* - - - - - - - - - - - - - - - - */
79 /*00*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
80 /*10*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
81 /*20*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
82 /*30*/ 5,UN,UN, 5, 5,UN, 5, 5, 5, 5, 5,UN, 5, 4,UN, 5,
83 /*40*/ 3,UN,UN, 3, 3,UN, 3, 3, 3, 3, 3,UN, 3, 3,UN, 3,
84 /*50*/ 3,UN,UN, 3, 3,UN, 3, 3, 3, 3, 3,UN, 3, 3,UN, 3,
85 /*60*/ 6,UN,UN, 6, 6,UN, 6, 6, 6, 6, 6,UN, 6, 5,UN, 6,
86 /*70*/ 5,UN,UN, 5, 5,UN, 5, 5, 5, 5, 5,UN, 5, 4,UN, 5,
87 /*80*/ 9, 6,UN,10,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 2, 2,
88 /*90*/ UN,UN,UN,UN,UN,UN,UN, 2, 2, 2, 2, 2, 2, 2,UN, 2,
89 /*A0*/ 2, 2, 2, 2, 2, 2, 2,UN, 2, 2, 2, 2,UN, 6, 2,UN,
90 /*B0*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 5, 3, 4,
91 /*C0*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 6, 4, 5,
92 /*D0*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 7, 5, 6,
93 /*E0*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 6, 4, 5,
94 /*F0*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 5, 3, 4
99 * 68HC08 Cycles
102 static char m08pg1[256] = {
103 /*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
104 /*--*--* - - - - - - - - - - - - - - - - */
105 /*00*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
106 /*10*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
107 /*20*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
108 /*30*/ 4, 5,UN, 4, 4, 4, 4, 4, 4, 4, 4, 5, 4, 3,UN, 3,
109 /*40*/ 1, 4, 5, 1, 1, 3, 1, 1, 1, 1, 1, 3, 1, 1, 5, 1,
110 /*50*/ 1, 4, 7, 1, 1, 4, 1, 1, 1, 1, 1, 3, 1, 1, 4, 1,
111 /*60*/ 4, 5, 3, 4, 4, 3, 4, 4, 4, 4, 4, 5, 4, 3, 4, 3,
112 /*70*/ 3, 4, 2, 3, 3, 4, 3, 3, 3, 3, 3, 4, 3, 2, 4, 2,
113 /*80*/ 7, 4,UN, 9, 2, 1, 2, 2, 2, 2, 2, 2, 1,UN, 1, 1,
114 /*90*/ 3, 3, 3, 3, 2, 2,UN, 1, 1, 1, 2, 2, 1, 1,P2, 1,
115 /*A0*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,UN, 4, 2, 2,
116 /*B0*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 4, 3, 3,
117 /*C0*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 5, 4, 4,
118 /*D0*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 6, 4, 4,
119 /*E0*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 5, 3, 3,
120 /*F0*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 4, 2, 2
123 static char m08pg2[256] = {
124 /*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
125 /*--*--* - - - - - - - - - - - - - - - - */
126 /*00*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
127 /*10*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
128 /*20*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
129 /*30*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
130 /*40*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
131 /*50*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
132 /*60*/ 5, 6,UN, 5, 5,UN, 5, 5, 5, 5, 5, 6, 5, 4,UN, 4,
133 /*70*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
134 /*80*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
135 /*90*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
136 /*A0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
137 /*B0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
138 /*C0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
139 /*D0*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,UN,UN, 5, 5,
140 /*E0*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,UN,UN, 4, 4,
141 /*F0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN
144 static char *m08Page[2] = {
145 m08pg1, m08pg2
150 * 68HCS08 Cycles
153 static char s08pg1[256] = {
154 /*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
155 /*--*--* - - - - - - - - - - - - - - - - */
156 /*00*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
157 /*10*/ 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
158 /*20*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
159 /*30*/ 5, 5, 5, 5, 5, 4, 5, 5, 5, 5, 5, 7, 5, 4, 6, 5,
160 /*40*/ 1, 4, 5, 1, 1, 3, 1, 1, 1, 1, 1, 4, 1, 1, 6, 1,
161 /*50*/ 1, 4, 6, 1, 1, 4, 1, 1, 1, 1, 1, 4, 1, 1, 5, 1,
162 /*60*/ 5, 5, 1, 5, 5, 3, 5, 5, 5, 5, 5, 7, 5, 4, 4, 5,
163 /*70*/ 4, 5, 1, 4, 4, 5, 4, 4, 4, 4, 4, 6, 4, 3, 5, 4,
164 /*80*/ 9, 6, 5,11, 1, 1, 3, 2, 3, 2, 3, 2, 1,UN, 2, 2,
165 /*90*/ 3, 3, 3, 3, 2, 2, 5, 1, 1, 1, 1, 1, 1, 1,P2, 1,
166 /*A0*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,UN, 5, 2, 2,
167 /*B0*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 5, 3, 3,
168 /*C0*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 6, 4, 4,
169 /*D0*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 6, 4, 4,
170 /*E0*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 5, 3, 3,
171 /*F0*/ 3, 3, 3, 3, 3, 3, 3, 2, 3, 3, 3, 3, 3, 5, 3, 2
174 static char s08pg2[256] = {
175 /*--*--* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
176 /*--*--* - - - - - - - - - - - - - - - - */
177 /*00*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
178 /*10*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
179 /*20*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
180 /*30*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
181 /*40*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
182 /*50*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
183 /*60*/ 6, 6,UN, 6, 6,UN, 6, 6, 6, 6, 6, 8, 6, 5,UN, 6,
184 /*70*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
185 /*80*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
186 /*90*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,
187 /*A0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 5,UN,
188 /*B0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 6,UN,
189 /*C0*/ UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 5,UN,
190 /*D0*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,UN,UN, 5, 5,
191 /*E0*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,UN,UN, 4, 4,
192 /*F0*/ UN,UN,UN, 6,UN,UN,UN,UN,UN,UN,UN,UN,UN,UN, 5, 5
195 static char *s08Page[2] = {
196 s08pg1, s08pg2
200 int mchtyp;
201 struct area *zpg;
204 * Process a machine op.
206 VOID
207 machine(mp)
208 struct mne *mp;
210 int op, t1, t2, type;
211 struct expr e1, e2, e3;
212 a_uint espv;
213 char id[NCPS];
214 int c, v1;
216 clrexpr(&e1);
217 clrexpr(&e2);
218 clrexpr(&e3);
219 op = (int) mp->m_valu;
220 type = mp->m_type;
221 switch (type) {
223 case S_SDP:
224 opcycles = OPCY_SDP;
225 zpg = dot.s_area;
226 if (more()) {
227 expr(&e1, 0);
228 if (e1.e_flag == 0 && e1.e_base.e_ap == NULL) {
229 if (e1.e_addr) {
230 xerr('b', "Only Page 0 Allowed.");
233 if ((c = getnb()) == ',') {
234 getid(id, -1);
235 zpg = alookup(id);
236 if (zpg == NULL) {
237 xerr('u', "Undefined Area.");
239 } else {
240 unget(c);
243 outdp(zpg, &e1, 0);
244 lmode = SLIST;
245 break;
247 case S_CPU:
248 opcycles = OPCY_CPU;
249 mchtyp = op;
250 sym[2].s_addr = op;
251 lmode = SLIST;
252 break;
254 case S_INH8S:
255 if (mchtyp != X_HCS08) {
256 opcycles = OPCY_ERR;
257 xerr('o', "A 68HCS08 Instruction.");
258 break;
259 } /* Fall Through */
260 case S_INH8:
261 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
262 opcycles = OPCY_ERR;
263 xerr('o', "A 68HC(S)08 Instruction.");
264 break;
265 } /* Fall Through */
266 case S_INH:
267 outab(op);
268 break;
270 case S_BRA8:
271 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
272 opcycles = OPCY_ERR;
273 xerr('o', "A 68HC(S)08 Instruction.");
274 break;
275 } /* Fall Through */
276 case S_BRA:
277 expr(&e1, 0);
278 outab(op);
279 if (mchpcr(&e1)) {
280 v1 = (int) (e1.e_addr - dot.s_addr - 1);
281 if ((v1 < -128) || (v1 > 127))
282 xerr('a', "Branching Range Exceeded.");
283 outab(v1);
284 } else {
285 outrb(&e1, R_PCR);
287 if (e1.e_mode != S_USER)
288 rerr();
289 break;
291 case S_TYP1:
292 t1 = addr(&e1);
293 if (t1 == S_A) {
294 outab(op+0x10);
295 break;
297 if (t1 == S_X) {
298 outab(op+0x20);
299 break;
301 if (t1 == S_DIR || t1 == S_EXT) {
302 outab(op);
303 outrb(&e1, R_PAG0);
304 break;
306 if (t1 == S_IX) {
307 outab(op+0x40);
308 break;
310 if (t1 == S_IX1 || t1 == S_IX2) {
311 outab(op+0x30);
312 outrb(&e1, R_USGN);
313 break;
315 if (t1 == S_SP1 || t1 == S_SP2) {
316 if ((mchtyp == X_HC08) || (mchtyp == X_HCS08)) {
317 outab(0x9e);
318 outab(op+0x30);
319 outrb(&e1, R_USGN);
320 break;
323 xerr('a', "Invalid Addressing Mode.");
324 break;
326 case S_TYP2:
327 t1 = addr(&e1);
328 if (t1 == S_IMMED) {
329 if ((op == 0xA7) || (op == 0xAC) ||
330 (op == 0xAD) || (op == 0xAF))
331 aerr();
332 outab(op);
333 outrb(&e1, 0);
334 break;
336 if (t1 == S_DIR) {
337 outab(op+0x10);
338 outrb(&e1, R_PAG0);
339 break;
341 if (t1 == S_EXT) {
342 outab(op+0x20);
343 outrw(&e1, 0);
344 break;
346 if (t1 == S_IX) {
347 outab(op+0x50);
348 break;
350 if (t1 == S_IX1) {
351 outab(op+0x40);
352 outrb(&e1, R_USGN);
353 break;
355 if (t1 == S_IX2) {
356 outab(op+0x30);
357 outrw(&e1, 0);
358 break;
360 if (t1 == S_SP1) {
361 if ((mchtyp == X_HC08) || (mchtyp == X_HCS08)) {
362 if (op == 0xAC || op == 0xAD)
363 xerr('a', "Invalid 68HC(S)08 JMP/JSR Addressing Mode.");
364 outab(0x9e);
365 outab(op+0x40);
366 outrb(&e1, R_USGN);
367 break;
370 if (t1 == S_SP2) {
371 if ((mchtyp == X_HC08) || (mchtyp == X_HCS08)) {
372 if (op == 0xAC || op == 0xAD)
373 xerr('a', "Invalid 68HC(S)08 JMP/JSR Addressing Mode.");
374 outab(0x9e);
375 outab(op+0x30);
376 outrw(&e1, 0);
377 break;
380 xerr('a', "Invalid Addressing Mode.");
381 break;
383 case S_TYP3:
384 t1 = addr(&e1);
385 espv = e1.e_addr;
386 if (t1 != S_IMMED)
387 xerr('a', "Require Immediate(#) For First Argument.");
388 comma(1);
389 t2 = addr(&e2);
390 if (t2 != S_DIR)
391 xerr('a', "Require Direct Mode For Second Argument.");
392 outab(op + 2*(espv&0x07));
393 outrb(&e2, R_PAG0);
394 break;
396 case S_TYP4:
397 t1 = addr(&e1);
398 espv = e1.e_addr;
399 if (t1 != S_IMMED)
400 xerr('a', "Require Immediate(#) For First Argument.");
401 comma(1);
402 t2 = addr(&e2);
403 if (t2 != S_DIR)
404 xerr('a', "Require Direct Mode For Second Argument.");
405 comma(1);
406 expr(&e3, 0);
407 outab(op + 2*(espv&0x07));
408 outrb(&e2, R_PAG0);
409 if (mchpcr(&e3)) {
410 v1 = (int) (e3.e_addr - dot.s_addr - 1);
411 if ((v1 < -128) || (v1 > 127))
412 aerr();
413 outab(v1);
414 } else {
415 outrb(&e3, R_PCR);
417 if (e3.e_mode != S_USER)
418 rerr();
419 break;
421 case S_TYPAI:
422 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
423 opcycles = OPCY_ERR;
424 xerr('o', "A 68HC(S)08 Instruction.");
425 break;
427 t1 = addr(&e1);
428 if (t1 == S_IMMED) {
429 outab(op);
430 if (e1.e_flag == 0 && e1.e_base.e_ap == NULL) {
431 v1 = (int) e1.e_addr;
432 if ((v1 < -128) || (v1 > 127))
433 xerr('a', "Branching Range Exceeded.");
434 outab(v1);
435 } else {
436 outrb(&e1, 0);
438 break;
440 xerr('a', "Invalid Addressing Mode.");
441 break;
443 case S_TYPHX:
444 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
445 opcycles = OPCY_ERR;
446 xerr('o', "A 68HC(S)08 Instruction.");
447 break;
449 t1 = addr(&e1);
450 if (t1 == S_IMMED) {
451 if (op == 0x25)
452 aerr();
453 outab(op);
454 outrw(&e1, 0);
455 break;
457 if (mchtyp == X_HCS08) {
458 if (t1 == S_EXT) {
459 switch (op) {
460 default:
461 case 0x25: outab(0x96); break;
462 case 0x45: outab(0x32); break;
463 case 0x65: outab(0x3E); break;
465 outrw(&e1, 0);
466 break;
468 if ((t1 == S_SP1) || (t1 == S_SP2)) {
469 outab(0x9E);
470 switch (op) {
471 default:
472 case 0x25: outab(0xFF); break;
473 case 0x45: outab(0xFE); break;
474 case 0x65: outab(0xF3); break;
476 outrb(&e1, R_USGN);
477 break;
479 if ((t1 == S_IX) && (op == 0x45)) {
480 outab(0x9E);
481 outab(0xAE);
482 break;
484 if ((t1 == S_IX1) && (op == 0x45)) {
485 outab(0x9E);
486 outab(0xCE);
487 outrb(&e1, R_USGN);
488 break;
490 if ((t1 == S_IX2) && (op == 0x45)) {
491 outab(0x9E);
492 outab(0xBE);
493 outrw(&e1, 0);
494 break;
496 } else {
497 if (t1 == S_EXT) {
498 t1 = S_DIR;
501 if (t1 == S_DIR) {
502 outab(op | 0x10);
503 outrb(&e1, R_PAG0);
504 break;
506 xerr('a', "Invalid Addressing Mode.");
507 break;
509 case S_CBEQ:
510 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
511 opcycles = OPCY_ERR;
512 xerr('o', "A 68HC(S)08 Instruction.");
513 break;
515 t1 = addr(&e1);
516 comma(1);
517 expr(&e2, 0);
518 if (t1 == S_IMMED) {
519 outab(op);
520 outrb(&e1, 0);
521 } else
522 if (t1 == S_DIR || t1 == S_EXT) {
523 outab(op);
524 outrb(&e1, R_PAG0);
525 } else
526 if (t1 == S_IXP) {
527 outab(op+0x40);
528 } else
529 if (t1 == S_IX1P || t1 == S_IX2P) {
530 outab(op+0x30);
531 outrb(&e1, R_USGN);
532 } else
533 if (t1 == S_SP1 || t1 == S_SP2) {
534 outab(0x9E);
535 outab(op+0x30);
536 outrb(&e1, R_USGN);
537 } else {
538 xerr('a', "Invalid Addressing Mode.");
539 break;
541 if (mchpcr(&e2)) {
542 v1 = (int) (e2.e_addr - dot.s_addr - 1);
543 if ((v1 < -128) || (v1 > 127))
544 xerr('a', "Branching Range Exceeded.");
545 outab(v1);
546 } else {
547 outrb(&e2, R_PCR);
549 if (e2.e_mode != S_USER)
550 rerr();
551 break;
553 case S_CQAX:
554 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
555 opcycles = OPCY_ERR;
556 xerr('o', "A 68HC(S)08 Instruction.");
557 break;
559 t1 = addr(&e1);
560 if (t1 != S_IMMED)
561 xerr('a', "Immediate(#) First Argument Required.");
562 comma(1);
563 expr(&e2, 0);
564 outab(op);
565 outrb(&e1, 0);
566 if (mchpcr(&e2)) {
567 v1 = (int) (e2.e_addr - dot.s_addr - 1);
568 if ((v1 < -128) || (v1 > 127))
569 xerr('a', "Branching Range Exceeded.");
570 outab(v1);
571 } else {
572 outrb(&e2, R_PCR);
574 if (e2.e_mode != S_USER)
575 rerr();
576 break;
578 case S_DBNZ:
579 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
580 opcycles = OPCY_ERR;
581 xerr('o', "A 68HC(S)08 Instruction.");
582 break;
584 t1 = addr(&e1);
585 comma(1);
586 expr(&e2, 0);
587 if (t1 == S_DIR || t1 == S_EXT) {
588 outab(op);
589 outrb(&e1, R_PAG0);
590 } else
591 if (t1 == S_IX) {
592 outab(op+0x40);
593 } else
594 if (t1 == S_IX1 || t1 == S_IX2) {
595 outab(op+0x30);
596 outrb(&e1, R_USGN);
597 } else
598 if (t1 == S_SP1 || t1 == S_SP2) {
599 outab(0x9E);
600 outab(op+0x30);
601 outrb(&e1, R_USGN);
602 } else {
603 xerr('a', "Invalid Addressing Mode.");
604 break;
606 if (mchpcr(&e2)) {
607 v1 = (int) (e2.e_addr - dot.s_addr - 1);
608 if ((v1 < -128) || (v1 > 127))
609 xerr('a', "Branching Range Exceeded.");
610 outab(v1);
611 } else {
612 outrb(&e2, R_PCR);
614 if (e2.e_mode != S_USER)
615 rerr();
616 break;
618 case S_DZAX:
619 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
620 opcycles = OPCY_ERR;
621 xerr('o', "A 68HC(S)08 Instruction.");
622 break;
624 expr(&e1, 0);
625 outab(op);
626 if (mchpcr(&e1)) {
627 v1 = (int) (e1.e_addr - dot.s_addr - 1);
628 if ((v1 < -128) || (v1 > 127))
629 xerr('a', "Branching Range Exceeded.");
630 outab(v1);
631 } else {
632 outrb(&e1, R_PCR);
634 if (e1.e_mode != S_USER)
635 rerr();
636 break;
638 case S_MOV:
639 if ((mchtyp != X_HC08) && (mchtyp != X_HCS08)) {
640 opcycles = OPCY_ERR;
641 xerr('o', "A 68HC(S)08 Instruction.");
642 break;
644 t1 = addr(&e1);
645 if (t1 == S_IX1P || t1 == S_IX2P) {
646 outab(op+0x10);
647 outrb(&e1, R_PAG0);
648 break;
650 comma(1);
651 t2 = addr(&e2);
652 if (t1 == S_IMMED) {
653 if (t2 == S_DIR || t2 == S_EXT) {
654 outab(op+0x20);
655 outrb(&e1, 0);
656 outrb(&e2, R_PAG0);
657 break;
660 if (t1 == S_DIR || t1 == S_EXT) {
661 if (t2 == S_DIR || t2 == S_EXT) {
662 outab(op);
663 outrb(&e1, R_PAG0);
664 outrb(&e2, R_PAG0);
665 break;
668 if (t1 == S_IXP) {
669 if (t2 == S_DIR || t2 == S_EXT) {
670 outab(op+0x30);
671 outrb(&e2, R_PAG0);
672 break;
675 xerr('a', "Invalid Addressing Mode.");
676 break;
678 default:
679 opcycles = OPCY_ERR;
680 err('o');
681 xerr('o', "Internal Opcode Error.");
682 break;
685 if (opcycles == OPCY_NONE) {
686 switch (mchtyp) {
687 case X_HC08: /* 68HC08 */
688 opcycles = m08pg1[cb[0] & 0xFF];
689 if ((opcycles & OPCY_NONE) && (opcycles & OPCY_MASK)) {
690 opcycles = m08Page[opcycles & OPCY_MASK][cb[1] & 0xFF];
692 break;
693 case X_HCS08: /* 68HCS08 */
694 opcycles = s08pg1[cb[0] & 0xFF];
695 if ((opcycles & OPCY_NONE) && (opcycles & OPCY_MASK)) {
696 opcycles = s08Page[opcycles & OPCY_MASK][cb[1] & 0xFF];
698 break;
699 case X_6805: /* 6805 */
700 opcycles = m05cyc[cb[0] & 0xFF];
701 break;
702 case X_HC05: /* 146805 */
703 opcycles = mcmcyc[cb[0] & 0xFF];
704 break;
710 * Branch/Jump PCR Mode Check
713 mchpcr(esp)
714 struct expr *esp;
716 if (esp->e_base.e_ap == dot.s_area) {
717 return(1);
719 if (esp->e_flag==0 && esp->e_base.e_ap==NULL) {
721 * Absolute Destination
723 * Use the global symbol '.__.ABS.'
724 * of value zero and force the assembler
725 * to use this absolute constant as the
726 * base value for the relocation.
728 esp->e_flag = 1;
729 esp->e_base.e_sp = &sym[1];
731 return(0);
735 * Machine specific initialization.
737 VOID
738 minit()
741 * Byte Order
743 hilo = 1;
746 * Zero Page
748 zpg = NULL;
750 mchtyp = X_HC08;
751 sym[2].s_addr = X_HC08;