1 DS80C390 flat mode support
3 2/4/2000 Kevin Vigor (e-mail: kevin at vigor.nu)
5 I have hacked the 8051 assembler to support the 24 bit flat address mode of
6 the DS80C390 processor. This mode allows the chip to directly address up to
7 4 Meg of RAM. Details can be found at Dallas' web site: www.dalsemi.com.
11 24 bit mode is entered via a new assembler directive, .flat24. This directive
12 takes a mandatory argument, which is either the string "on" or the string
13 "off". ".flat24 on" enables 24-bit mode, and ".flat24 off" puts the assembler
14 into standard 8051 mode.
16 Note that any .included files within a ".flat24 on" segment of the code will
17 be compiled in 24-bit mode.
19 In 24-bit mode, 8 instructions have altered behavior. Of these, 5 modify
20 the instruction encoding, while 3 differ only in behavior. These
21 instructions are discussed in the DS80C390 User's Guide, but a summary is
24 ACALL and AJMP now take a 19 bit offset instead of the 8051's 11 bit offset.
25 An extra address byte is added to the encoded instruction.
27 LCALL and LJMP now take a 24 bit target address instead of the 8051's 16 bit
28 address. An extra address byte is added to the encoded instruction.
30 MOV DPTR, #immed now takes a 24 bit immediate value instead of the 8051's 16
31 bit address. An extra data byte is added to the encoded instruction.
33 INC DPTR now increments the entire 24 bit DPTR. The encoding is not changed.
35 RET and RETI restore the full 24 bit PC from the stack. The encoding is not
40 The linker supports (through a variety of evil hacks) 19 bit ACALL/AJMP
41 relocations and 24 bit LCALL/LJMP/DPTR relocations. These changes should be
42 invisible to the user.
44 The linker can now also generated extended linear address records in the
45 Intel hex output format. This is necessary for any areas located above the
46 64K mark. This is enabled by the "-r" linker flag, and is disabled by
47 default (but the linker will throw a warning if an extended address is
48 encountered without the -r flag being enabled).
50 Note that for various reasons, areas may still not be larger than 64K.
51 However, they may be located anywhere in the 4 Meg address space via the
52 assembler .org directive (for ABS areas) or the linker "-b" option.
56 Note that this example uses ABS areas to make the layout obvious. This code
57 won't do anything useful at all, but demonstrates the instruction encoding
58 in .flat24 mode vs 8051 mode.
64 ; SFRs not known to the assembler yet...
68 ; Set the chip to 24 bit flat mode via the DS "timed access" procedure.
71 mov $ACON, #0x06 ; 10 bit stack & 24 bit flat addressing.
73 .flat24 on ; Enable 24-bit mode. The AM1 bit had better be
76 mov dptr, #myData ; Valid on the '390: myData is in the FARDATA
78 ; Generates: 90 30 00 01
79 acall _junkNear ; Within 11 bit range, but still must generate
80 ; 19 bit address for '390 flat mode.
82 ajmp _junkFar ; Within 16 bit range.
84 acall _junkReallyFar ; Within 19 bit range.
86 lcall _junkReallyReallyFar ; Within 24 bit range.
87 ; Generates 12 08 00 00
89 ; Set the chip to 8051 mode via the DS "timed access" procedure.
92 mov $ACON, #0x00 ; 8 bit stack & 16 bit flat addressing.
94 .flat24 off ; Now we're an 8051 again. The AM1 bit had better be
97 ;mov dptr, #myData ; Can't do that: myData is too far away.
98 acall _junkNear ; Within 11 bit range.
100 ljmp _junkFar ; Within 16 bit range; can't AJMP, but can LJMP
106 ; This is within the 11 bit ACALL/AJMP range of the 8051.
112 ; This is within the 390's 19 bit ACALL/AJMP range, and inside the stock
113 ; 8051's 16 bit LCALL range.
118 ; This is within the 390's 19 bit ACALL/AJMP range and outside the
119 ; 8051's LCALL range.
120 ; Note that to link an image with an area beyond 64K (like this one),
121 ; the '-r' flag must be provided to the linker, and Intel Hex output format
128 ; This is outside anybody's ACALL/AJMP range.
130 _junkReallyReallyFar:
135 ; This is way, way up there.