sdcc/support/sdbinutils/include/elf/m32r.h

   1 /* M32R ELF support for BFD.
   2    Copyright (C) 1996-2022 Free Software Foundation, Inc.
   3
   4    This file is part of BFD, the Binary File Descriptor library.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software Foundation,
  18    Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  19
  20 #ifndef _ELF_M32R_H
  21 #define _ELF_M32R_H
  22
  23 #include "elf/reloc-macros.h"
  24
  25 /* Relocations.  */
  26 START_RELOC_NUMBERS (elf_m32r_reloc_type)
  27   RELOC_NUMBER (R_M32R_NONE, 0)
  28   /* REL relocations */
  29   RELOC_NUMBER (R_M32R_16, 1)            /* For backwards compatibility. */
  30   RELOC_NUMBER (R_M32R_32, 2)            /* For backwards compatibility. */
  31   RELOC_NUMBER (R_M32R_24, 3)            /* For backwards compatibility. */
  32   RELOC_NUMBER (R_M32R_10_PCREL, 4)      /* For backwards compatibility. */
  33   RELOC_NUMBER (R_M32R_18_PCREL, 5)      /* For backwards compatibility. */
  34   RELOC_NUMBER (R_M32R_26_PCREL, 6)      /* For backwards compatibility. */
  35   RELOC_NUMBER (R_M32R_HI16_ULO, 7)      /* For backwards compatibility. */
  36   RELOC_NUMBER (R_M32R_HI16_SLO, 8)      /* For backwards compatibility. */
  37   RELOC_NUMBER (R_M32R_LO16, 9)          /* For backwards compatibility. */
  38   RELOC_NUMBER (R_M32R_SDA16, 10)        /* For backwards compatibility. */
  39   RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)/* For backwards compatibility. */
  40   RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12)  /* For backwards compatibility. */
  41
  42   /* RELA relocations */
  43   RELOC_NUMBER (R_M32R_16_RELA, 33)
  44   RELOC_NUMBER (R_M32R_32_RELA, 34)
  45   RELOC_NUMBER (R_M32R_24_RELA, 35)
  46   RELOC_NUMBER (R_M32R_10_PCREL_RELA, 36)
  47   RELOC_NUMBER (R_M32R_18_PCREL_RELA, 37)
  48   RELOC_NUMBER (R_M32R_26_PCREL_RELA, 38)
  49   RELOC_NUMBER (R_M32R_HI16_ULO_RELA, 39)
  50   RELOC_NUMBER (R_M32R_HI16_SLO_RELA, 40)
  51   RELOC_NUMBER (R_M32R_LO16_RELA, 41)
  52   RELOC_NUMBER (R_M32R_SDA16_RELA, 42)
  53   RELOC_NUMBER (R_M32R_RELA_GNU_VTINHERIT, 43)
  54   RELOC_NUMBER (R_M32R_RELA_GNU_VTENTRY, 44)
  55
  56   RELOC_NUMBER (R_M32R_REL32, 45)
  57
  58   RELOC_NUMBER (R_M32R_GOT24, 48)
  59   RELOC_NUMBER (R_M32R_26_PLTREL, 49)
  60   RELOC_NUMBER (R_M32R_COPY, 50)
  61   RELOC_NUMBER (R_M32R_GLOB_DAT, 51)
  62   RELOC_NUMBER (R_M32R_JMP_SLOT, 52)
  63   RELOC_NUMBER (R_M32R_RELATIVE, 53)
  64   RELOC_NUMBER (R_M32R_GOTOFF, 54)
  65   RELOC_NUMBER (R_M32R_GOTPC24, 55)
  66   RELOC_NUMBER (R_M32R_GOT16_HI_ULO, 56)
  67   RELOC_NUMBER (R_M32R_GOT16_HI_SLO, 57)
  68   RELOC_NUMBER (R_M32R_GOT16_LO, 58)
  69   RELOC_NUMBER (R_M32R_GOTPC_HI_ULO, 59)
  70   RELOC_NUMBER (R_M32R_GOTPC_HI_SLO, 60)
  71   RELOC_NUMBER (R_M32R_GOTPC_LO, 61)
  72   RELOC_NUMBER (R_M32R_GOTOFF_HI_ULO, 62)
  73   RELOC_NUMBER (R_M32R_GOTOFF_HI_SLO, 63)
  74   RELOC_NUMBER (R_M32R_GOTOFF_LO, 64)
  75
  76 END_RELOC_NUMBERS (R_M32R_max)
  77
  78 /* Processor specific section indices.  These sections do not actually
  79    exist.  Symbols with a st_shndx field corresponding to one of these
  80    values have a special meaning.  */
  81
  82 /* Small common symbol.  */
  83 #define SHN_M32R_SCOMMON        SHN_LORESERVE
  84
  85 /* Processor specific section flags.  */
  86
  87 /* This section contains sufficient relocs to be relaxed.
  88    When relaxing, even relocs of branch instructions the assembler could
  89    complete must be present because relaxing may cause the branch target to
  90    move.  */
  91 #define SHF_M32R_CAN_RELAX      0x10000000
  92
  93 /* Processor specific flags for the ELF header e_flags field.  */
  94
  95 /* Two bit m32r architecture field.  */
  96 #define EF_M32R_ARCH            0x30000000
  97
  98 /* m32r code.  */
  99 #define E_M32R_ARCH             0x00000000
 100 /* m32rx code.  */
 101 #define E_M32RX_ARCH            0x10000000
 102 /* m32r2 code.  */
 103 #define E_M32R2_ARCH            0x20000000
 104
 105 /* 12 bit m32r new instructions field.  */
 106 #define EF_M32R_INST            0x0FFF0000
 107 /* Parallel instructions.  */
 108 #define E_M32R_HAS_PARALLEL     0x00010000
 109 /* Hidden instructions for m32rx:
 110    jc, jnc, macwhi-a, macwlo-a, mulwhi-a, mulwlo-a, sth+, shb+, sat, pcmpbz,
 111    sc, snc.  */
 112 #define E_M32R_HAS_HIDDEN_INST  0x00020000
 113 /* New bit instructions:
 114    clrpsw, setpsw, bset, bclr, btst.  */
 115 #define E_M32R_HAS_BIT_INST     0x00040000
 116 /* Floating point instructions.  */
 117 #define E_M32R_HAS_FLOAT_INST   0x00080000
 118
 119 /* 4 bit m32r ignore to check field.  */
 120 #define EF_M32R_IGNORE          0x0000000F
 121
 122 #endif