1 /* SPARC ELF support for BFD.
2 Copyright (C) 1996-2022 Free Software Foundation, Inc.
3 By Doug Evans, Cygnus Support, <dje@cygnus.com>.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
25 /* Processor specific flags for the ELF header e_flags field. */
27 /* These are defined by Sun. */
29 #define EF_SPARC_32PLUS_MASK 0xffff00 /* bits indicating V8+ type */
30 #define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */
31 #define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */
32 #define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */
33 #define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */
35 #define EF_SPARC_LEDATA 0x800000 /* little endian data */
37 /* This name is used in the V9 ABI. */
38 #define EF_SPARC_EXT_MASK 0xffff00 /* reserved for vendor extensions */
40 /* V9 memory models */
41 #define EF_SPARCV9_MM 0x3 /* memory model mask */
42 #define EF_SPARCV9_TSO 0x0 /* total store ordering */
43 #define EF_SPARCV9_PSO 0x1 /* partial store ordering */
44 #define EF_SPARCV9_RMO 0x2 /* relaxed store ordering */
46 /* Section indices. */
48 #define SHN_BEFORE SHN_LORESERVE /* Used with SHF_ORDERED and... */
49 #define SHN_AFTER (SHN_LORESERVE + 1) /* SHF_LINK_ORDER section flags. */
53 #define SHF_ORDERED 0x40000000 /* treat sh_link,sh_info specially */
57 #define STT_REGISTER 13 /* global reg reserved to app. */
59 #include "elf/reloc-macros.h"
61 /* Relocation types. */
62 START_RELOC_NUMBERS (elf_sparc_reloc_type
)
63 RELOC_NUMBER (R_SPARC_NONE
, 0)
64 RELOC_NUMBER (R_SPARC_8
, 1)
65 RELOC_NUMBER (R_SPARC_16
, 2)
66 RELOC_NUMBER (R_SPARC_32
, 3)
67 RELOC_NUMBER (R_SPARC_DISP8
, 4)
68 RELOC_NUMBER (R_SPARC_DISP16
, 5)
69 RELOC_NUMBER (R_SPARC_DISP32
, 6)
70 RELOC_NUMBER (R_SPARC_WDISP30
, 7)
71 RELOC_NUMBER (R_SPARC_WDISP22
, 8)
72 RELOC_NUMBER (R_SPARC_HI22
, 9)
73 RELOC_NUMBER (R_SPARC_22
, 10)
74 RELOC_NUMBER (R_SPARC_13
, 11)
75 RELOC_NUMBER (R_SPARC_LO10
, 12)
76 RELOC_NUMBER (R_SPARC_GOT10
, 13)
77 RELOC_NUMBER (R_SPARC_GOT13
, 14)
78 RELOC_NUMBER (R_SPARC_GOT22
, 15)
79 RELOC_NUMBER (R_SPARC_PC10
, 16)
80 RELOC_NUMBER (R_SPARC_PC22
, 17)
81 RELOC_NUMBER (R_SPARC_WPLT30
, 18)
82 RELOC_NUMBER (R_SPARC_COPY
, 19)
83 RELOC_NUMBER (R_SPARC_GLOB_DAT
, 20)
84 RELOC_NUMBER (R_SPARC_JMP_SLOT
, 21)
85 RELOC_NUMBER (R_SPARC_RELATIVE
, 22)
86 RELOC_NUMBER (R_SPARC_UA32
, 23)
88 /* ??? These 6 relocs are new but not currently used. For binary
89 compatibility in the sparc64-elf toolchain, we leave them out.
90 A non-binary upward compatible change is expected for sparc64-elf. */
91 #ifndef SPARC64_OLD_RELOCS
92 /* ??? New relocs on the UltraSPARC. Not sure what they're for yet. */
93 RELOC_NUMBER (R_SPARC_PLT32
, 24)
94 RELOC_NUMBER (R_SPARC_HIPLT22
, 25)
95 RELOC_NUMBER (R_SPARC_LOPLT10
, 26)
96 RELOC_NUMBER (R_SPARC_PCPLT32
, 27)
97 RELOC_NUMBER (R_SPARC_PCPLT22
, 28)
98 RELOC_NUMBER (R_SPARC_PCPLT10
, 29)
102 RELOC_NUMBER (R_SPARC_10
, 30)
103 RELOC_NUMBER (R_SPARC_11
, 31)
104 RELOC_NUMBER (R_SPARC_64
, 32)
105 RELOC_NUMBER (R_SPARC_OLO10
, 33)
106 RELOC_NUMBER (R_SPARC_HH22
, 34)
107 RELOC_NUMBER (R_SPARC_HM10
, 35)
108 RELOC_NUMBER (R_SPARC_LM22
, 36)
109 RELOC_NUMBER (R_SPARC_PC_HH22
, 37)
110 RELOC_NUMBER (R_SPARC_PC_HM10
, 38)
111 RELOC_NUMBER (R_SPARC_PC_LM22
, 39)
112 RELOC_NUMBER (R_SPARC_WDISP16
, 40)
113 RELOC_NUMBER (R_SPARC_WDISP19
, 41)
114 RELOC_NUMBER (R_SPARC_UNUSED_42
, 42)
115 RELOC_NUMBER (R_SPARC_7
, 43)
116 RELOC_NUMBER (R_SPARC_5
, 44)
117 RELOC_NUMBER (R_SPARC_6
, 45)
118 RELOC_NUMBER (R_SPARC_DISP64
, 46)
119 RELOC_NUMBER (R_SPARC_PLT64
, 47)
120 RELOC_NUMBER (R_SPARC_HIX22
, 48)
121 RELOC_NUMBER (R_SPARC_LOX10
, 49)
122 RELOC_NUMBER (R_SPARC_H44
, 50)
123 RELOC_NUMBER (R_SPARC_M44
, 51)
124 RELOC_NUMBER (R_SPARC_L44
, 52)
125 RELOC_NUMBER (R_SPARC_REGISTER
, 53)
126 RELOC_NUMBER (R_SPARC_UA64
, 54)
127 RELOC_NUMBER (R_SPARC_UA16
, 55)
129 RELOC_NUMBER (R_SPARC_TLS_GD_HI22
, 56)
130 RELOC_NUMBER (R_SPARC_TLS_GD_LO10
, 57)
131 RELOC_NUMBER (R_SPARC_TLS_GD_ADD
, 58)
132 RELOC_NUMBER (R_SPARC_TLS_GD_CALL
, 59)
133 RELOC_NUMBER (R_SPARC_TLS_LDM_HI22
, 60)
134 RELOC_NUMBER (R_SPARC_TLS_LDM_LO10
, 61)
135 RELOC_NUMBER (R_SPARC_TLS_LDM_ADD
, 62)
136 RELOC_NUMBER (R_SPARC_TLS_LDM_CALL
, 63)
137 RELOC_NUMBER (R_SPARC_TLS_LDO_HIX22
, 64)
138 RELOC_NUMBER (R_SPARC_TLS_LDO_LOX10
, 65)
139 RELOC_NUMBER (R_SPARC_TLS_LDO_ADD
, 66)
140 RELOC_NUMBER (R_SPARC_TLS_IE_HI22
, 67)
141 RELOC_NUMBER (R_SPARC_TLS_IE_LO10
, 68)
142 RELOC_NUMBER (R_SPARC_TLS_IE_LD
, 69)
143 RELOC_NUMBER (R_SPARC_TLS_IE_LDX
, 70)
144 RELOC_NUMBER (R_SPARC_TLS_IE_ADD
, 71)
145 RELOC_NUMBER (R_SPARC_TLS_LE_HIX22
, 72)
146 RELOC_NUMBER (R_SPARC_TLS_LE_LOX10
, 73)
147 RELOC_NUMBER (R_SPARC_TLS_DTPMOD32
, 74)
148 RELOC_NUMBER (R_SPARC_TLS_DTPMOD64
, 75)
149 RELOC_NUMBER (R_SPARC_TLS_DTPOFF32
, 76)
150 RELOC_NUMBER (R_SPARC_TLS_DTPOFF64
, 77)
151 RELOC_NUMBER (R_SPARC_TLS_TPOFF32
, 78)
152 RELOC_NUMBER (R_SPARC_TLS_TPOFF64
, 79)
154 RELOC_NUMBER (R_SPARC_GOTDATA_HIX22
, 80)
155 RELOC_NUMBER (R_SPARC_GOTDATA_LOX10
, 81)
156 RELOC_NUMBER (R_SPARC_GOTDATA_OP_HIX22
, 82)
157 RELOC_NUMBER (R_SPARC_GOTDATA_OP_LOX10
, 83)
158 RELOC_NUMBER (R_SPARC_GOTDATA_OP
, 84)
160 RELOC_NUMBER (R_SPARC_H34
, 85)
161 RELOC_NUMBER (R_SPARC_SIZE32
, 86)
162 RELOC_NUMBER (R_SPARC_SIZE64
, 87)
163 RELOC_NUMBER (R_SPARC_WDISP10
, 88)
165 EMPTY_RELOC (R_SPARC_max_std
)
167 RELOC_NUMBER (R_SPARC_JMP_IREL
, 248)
168 RELOC_NUMBER (R_SPARC_IRELATIVE
, 249)
169 RELOC_NUMBER (R_SPARC_GNU_VTINHERIT
, 250)
170 RELOC_NUMBER (R_SPARC_GNU_VTENTRY
, 251)
171 RELOC_NUMBER (R_SPARC_REV32
, 252)
173 END_RELOC_NUMBERS (R_SPARC_max
)
175 /* Relocation macros. */
177 #define ELF64_R_TYPE_DATA(info) \
178 (((bfd_signed_vma)(ELF64_R_TYPE(info) >> 8) ^ 0x800000) - 0x800000)
179 #define ELF64_R_TYPE_ID(info) \
181 #define ELF64_R_TYPE_INFO(data, type) \
182 (((bfd_vma) ((data) & 0xffffff) << 8) | (bfd_vma) (type))
184 /* Values for Elf64_Dyn.d_tag. */
186 #define DT_SPARC_REGISTER 0x70000001
188 /* Object attribute tags. */
191 /* 0-3 are generic. */
192 Tag_GNU_Sparc_HWCAPS
= 4,
193 Tag_GNU_Sparc_HWCAPS2
= 8
196 /* Generally speaking the ELF_SPARC_HWCAP_* and ELF_SPARC_HWCAP2_*
197 values match the AV_SPARC_* and AV2_SPARC_* bits respectively.
199 However Solaris 11 introduced a backwards-incompatible change
200 deprecating the RANDOM, TRANS and ASI_CACHE_SPARING bits in the
201 AT_SUNW_CAP_HW1 flags, reusing the bits for the unrelated hwcaps
202 FJATHHPC, FJDES and FJAES respectively. In GNU/Linux we opted to
203 keep the old hwcaps in Tag_GNU_Sparc_HWCAPS and allocate bits for
204 FJATHHPC, FJDES and JFAES in Tag_GNU_Sparc_HWCAPS2. */
206 #define ELF_SPARC_HWCAP_MUL32 0x00000001 /* umul/umulcc/smul/smulcc insns */
207 #define ELF_SPARC_HWCAP_DIV32 0x00000002 /* udiv/udivcc/sdiv/sdivcc insns */
208 #define ELF_SPARC_HWCAP_FSMULD 0x00000004 /* 'fsmuld' insn */
209 #define ELF_SPARC_HWCAP_V8PLUS 0x00000008 /* v9 insns available to 32bit */
210 #define ELF_SPARC_HWCAP_POPC 0x00000010 /* 'popc' insn */
211 #define ELF_SPARC_HWCAP_VIS 0x00000020 /* VIS insns */
212 #define ELF_SPARC_HWCAP_VIS2 0x00000040 /* VIS2 insns */
213 #define ELF_SPARC_HWCAP_ASI_BLK_INIT \
214 0x00000080 /* block init ASIs */
215 #define ELF_SPARC_HWCAP_FMAF 0x00000100 /* fused multiply-add */
216 #define ELF_SPARC_HWCAP_VIS3 0x00000400 /* VIS3 insns */
217 #define ELF_SPARC_HWCAP_HPC 0x00000800 /* HPC insns */
218 #define ELF_SPARC_HWCAP_RANDOM 0x00001000 /* 'random' insn */
219 #define ELF_SPARC_HWCAP_TRANS 0x00002000 /* transaction insns */
220 #define ELF_SPARC_HWCAP_FJFMAU 0x00004000 /* unfused multiply-add */
221 #define ELF_SPARC_HWCAP_IMA 0x00008000 /* integer multiply-add */
222 #define ELF_SPARC_HWCAP_ASI_CACHE_SPARING \
223 0x00010000 /* cache sparing ASIs */
224 #define ELF_SPARC_HWCAP_AES 0x00020000 /* AES crypto insns */
225 #define ELF_SPARC_HWCAP_DES 0x00040000 /* DES crypto insns */
226 #define ELF_SPARC_HWCAP_KASUMI 0x00080000 /* KASUMI crypto insns */
227 #define ELF_SPARC_HWCAP_CAMELLIA \
228 0x00100000 /* CAMELLIA crypto insns */
229 #define ELF_SPARC_HWCAP_MD5 0x00200000 /* MD5 hashing insns */
230 #define ELF_SPARC_HWCAP_SHA1 0x00400000 /* SHA1 hashing insns */
231 #define ELF_SPARC_HWCAP_SHA256 0x00800000 /* SHA256 hashing insns */
232 #define ELF_SPARC_HWCAP_SHA512 0x01000000 /* SHA512 hashing insns */
233 #define ELF_SPARC_HWCAP_MPMUL 0x02000000 /* Multiple Precision Multiply */
234 #define ELF_SPARC_HWCAP_MONT 0x04000000 /* Montgomery Mult/Sqrt */
235 #define ELF_SPARC_HWCAP_PAUSE 0x08000000 /* Pause insn */
236 #define ELF_SPARC_HWCAP_CBCOND 0x10000000 /* Compare and Branch insns */
237 #define ELF_SPARC_HWCAP_CRC32C 0x20000000 /* CRC32C insn */
239 #define ELF_SPARC_HWCAP2_FJATHPLUS 0x00000001 /* Fujitsu Athena+ */
240 #define ELF_SPARC_HWCAP2_VIS3B 0x00000002 /* Subset of VIS3 present on sparc64 X+ */
241 #define ELF_SPARC_HWCAP2_ADP 0x00000004 /* Application Data Protection */
242 #define ELF_SPARC_HWCAP2_SPARC5 0x00000008 /* The 29 new fp and sub instructions */
243 #define ELF_SPARC_HWCAP2_MWAIT 0x00000010 /* mwait instruction and load/monitor ASIs */
244 #define ELF_SPARC_HWCAP2_XMPMUL 0x00000020 /* XOR multiple precision multiply */
245 #define ELF_SPARC_HWCAP2_XMONT 0x00000040 /* XOR Montgomery mult/sqr instructions */
246 #define ELF_SPARC_HWCAP2_NSEC \
247 0x00000080 /* pause insn with support for nsec timings */
248 #define ELF_SPARC_HWCAP2_FJATHHPC 0x00001000 /* Fujitsu HPC instrs */
249 #define ELF_SPARC_HWCAP2_FJDES 0x00002000 /* Fujitsu DES instrs */
250 #define ELF_SPARC_HWCAP2_FJAES 0x00010000 /* Fujitsu AES instrs */
252 #define ELF_SPARC_HWCAP2_SPARC6 0x00020000 /* OSA2017 new instructions */
253 #define ELF_SPARC_HWCAP2_ONADDSUB 0x00040000 /* Oracle Number add/subtract */
254 #define ELF_SPARC_HWCAP2_ONMUL 0x00080000 /* Oracle Number multiply */
255 #define ELF_SPARC_HWCAP2_ONDIV 0x00100000 /* Oracle Number divide */
256 #define ELF_SPARC_HWCAP2_DICTUNP 0x00200000 /* Dictionary unpack instruction */
257 #define ELF_SPARC_HWCAP2_FPCMPSHL 0x00400000 /* Partition compare with shifted result */
258 #define ELF_SPARC_HWCAP2_RLE 0x00800000 /* Run-length encoded burst and length */
259 #define ELF_SPARC_HWCAP2_SHA3 0x01000000 /* SHA3 instruction */
261 #endif /* _ELF_SPARC_H */