struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / support / sdbinutils / include / opcode / arc-attrs.h
blob18f6653603af44abb63f2c63849755e7d97b79ca
1 /* Copyright (C) 1994-2022 Free Software Foundation, Inc.
3 Contributed by Claudiu Zissulescu (claziss@synopsys.com)
5 This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and
6 the GNU Binutils.
8 GAS/GDB is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
13 GAS/GDB is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS or GDB; see the file COPYING3. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
23 #ifndef ATTRS_ARC_H
24 #define ATTRS_ARC_H
26 #ifndef FEATURE_LIST_NAME
27 #define FEATURE_LIST_NAME feature_list
28 #endif
30 /* A table with cpu features. */
31 const struct feature_type
33 unsigned feature;
34 unsigned cpus;
35 const char *attr;
36 const char *name;
37 } FEATURE_LIST_NAME [] =
39 { BTSCN, ARC_OPCODE_ARCALL, "BITSCAN", "bit-scan" },
40 { CD, ARC_OPCODE_ARCV2, "CD", "code-density" },
41 { DIV, ARC_OPCODE_ARCV2, "DIV_REM", "div/rem" },
42 { DP, ARC_OPCODE_ARCv2HS, "FPUD", "double-precision FPU" },
43 { DPA, ARC_OPCODE_ARCv2EM, "FPUDA", "double assist FP" },
44 { DPX, ARC_OPCODE_ARCFPX, "DPFP", "double-precision FPX" },
45 { LL64, ARC_OPCODE_ARCv2HS, "LL64", "double load/store" },
46 { NPS400, ARC_OPCODE_ARC700, "NPS400", "nps400" },
47 { QUARKSE1, ARC_OPCODE_ARCv2EM, "QUARKSE1", "QuarkSE-EM" },
48 { QUARKSE2, ARC_OPCODE_ARCv2EM, "QUARKSE2", "QuarkSE-EM" },
49 { SHFT1, ARC_OPCODE_ARCALL, "SA", "shift assist" },
50 { SHFT2, ARC_OPCODE_ARCALL, "BS", "barrel-shifter" },
51 { SWAP, ARC_OPCODE_ARCALL, "SWAP", "swap" },
52 { SP, ARC_OPCODE_ARCV2, "FPUS", "single-precision FPU" },
53 { SPX, ARC_OPCODE_ARCFPX, "SPFP", "single-precision FPX" }
56 #ifndef CONFLICT_LIST
57 #define CONFLICT_LIST conflict_list
58 #endif
60 /* A table with conflicting features. */
61 const unsigned CONFLICT_LIST [] = {
62 NPS400 | SPX,
63 NPS400 | DPX,
64 DPX | DPA,
65 SP | DPX,
66 SP | SPX,
67 DP | DPX,
68 DP | SPX,
69 QUARKSE1 | DP,
70 QUARKSE1 | SP
72 #endif