?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / support / sdbinutils / include / opcode / arm.h
blob8d6f8db34ab9bcdc22a39751b425a474b76ef6ac
1 /* ARM assembler/disassembler support.
2 Copyright (C) 2004-2022 Free Software Foundation, Inc.
3
4 This file is part of GDB and GAS.
5
6 GDB and GAS are free software; you can redistribute it and/or
7 modify it under the terms of the GNU General Public License as
8 published by the Free Software Foundation; either version 3, or (at
9 your option) any later version.
10
11 GDB and GAS are distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GDB or GAS; see the file COPYING3. If not, write to the
18 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 /* The following bitmasks control CPU extensions: */
22 #define ARM_EXT_V1 0x00000001 /* All processors (core set). */
23 #define ARM_EXT_V2 0x00000002 /* Multiply instructions. */
24 #define ARM_EXT_V2S 0x00000004 /* SWP instructions. */
25 #define ARM_EXT_V3 0x00000008 /* MSR MRS. */
26 #define ARM_EXT_V3M 0x00000010 /* Allow long multiplies. */
27 #define ARM_EXT_V4 0x00000020 /* Allow half word loads. */
28 #define ARM_EXT_V4T 0x00000040 /* Thumb. */
29 #define ARM_EXT_V5 0x00000080 /* Allow CLZ, etc. */
30 #define ARM_EXT_V5T 0x00000100 /* Improved interworking. */
31 #define ARM_EXT_V5ExP 0x00000200 /* DSP core set. */
32 #define ARM_EXT_V5E 0x00000400 /* DSP Double transfers. */
33 #define ARM_EXT_V5J 0x00000800 /* Jazelle extension. */
34 #define ARM_EXT_V6 0x00001000 /* ARM V6. */
35 #define ARM_EXT_V6K 0x00002000 /* ARM V6K. */
36 #define ARM_EXT_V8 0x00004000 /* ARMv8 w/o atomics. */
37 #define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
38 #define ARM_EXT_DIV 0x00010000 /* Integer division. */
39 /* The 'M' in Arm V7M stands for Microcontroller.
40 On earlier architecture variants it stands for Multiply. */
41 #define ARM_EXT_V5E_NOTM 0x00020000 /* Arm V5E but not Arm V7M. */
42 #define ARM_EXT_V6_NOTM 0x00040000 /* Arm V6 but not Arm V7M. */
43 #define ARM_EXT_V7 0x00080000 /* Arm V7. */
44 #define ARM_EXT_V7A 0x00100000 /* Arm V7A. */
45 #define ARM_EXT_V7R 0x00200000 /* Arm V7R. */
46 #define ARM_EXT_V7M 0x00400000 /* Arm V7M. */
47 #define ARM_EXT_V6M 0x00800000 /* ARM V6M. */
48 #define ARM_EXT_BARRIER 0x01000000 /* DSB/DMB/ISB. */
49 #define ARM_EXT_THUMB_MSR 0x02000000 /* Thumb MSR/MRS. */
50 #define ARM_EXT_V6_DSP 0x04000000 /* ARM v6 (DSP-related),
51 not in v7-M. */
52 #define ARM_EXT_MP 0x08000000 /* Multiprocessing Extensions. */
53 #define ARM_EXT_SEC 0x10000000 /* Security extensions. */
54 #define ARM_EXT_OS 0x20000000 /* OS Extensions. */
55 #define ARM_EXT_ADIV 0x40000000 /* Integer divide extensions in ARM
56 state. */
57 #define ARM_EXT_VIRT 0x80000000 /* Virtualization extensions. */
58
59 #define ARM_EXT2_PAN 0x00000001 /* PAN extension. */
60 #define ARM_EXT2_V8_2A 0x00000002 /* ARM V8.2A. */
61 #define ARM_EXT2_V8M 0x00000004 /* ARM V8M. */
62 #define ARM_EXT2_ATOMICS 0x00000008 /* ARMv8 atomics. */
63 #define ARM_EXT2_V6T2_V8M 0x00000010 /* V8M Baseline from V6T2. */
64 #define ARM_EXT2_FP16_INST 0x00000020 /* ARM V8.2A FP16 instructions. */
65 #define ARM_EXT2_V8M_MAIN 0x00000040 /* ARMv8-M Mainline. */
66 #define ARM_EXT2_RAS 0x00000080 /* RAS extension. */
67 #define ARM_EXT2_V8_3A 0x00000100 /* ARM V8.3A. */
68 #define ARM_EXT2_V8A 0x00000200 /* ARMv8-A. */
69 #define ARM_EXT2_V8_4A 0x00000400 /* ARM V8.4A. */
70 #define ARM_EXT2_FP16_FML 0x00000800 /* ARM V8.2A FP16-FML
71 instructions. */
72 #define ARM_EXT2_V8_5A 0x00001000 /* ARM V8.5A. */
73 #define ARM_EXT2_SB 0x00002000 /* Speculation Barrier instruction. */
74 #define ARM_EXT2_PREDRES 0x00004000 /* Prediction Restriction insns. */
75 #define ARM_EXT2_V8_1M_MAIN 0x00008000 /* ARMv8.1-M Mainline. */
76 #define ARM_EXT2_V8_6A 0x00010000 /* ARM V8.6A. */
77 #define ARM_EXT2_BF16 0x00020000 /* ARMv8 bfloat16. */
78 #define ARM_EXT2_I8MM 0x00040000 /* ARMv8.6A i8mm. */
79 #define ARM_EXT2_CRC 0x00080000 /* ARMv8 CRC32 */
80 #define ARM_EXT2_MVE 0x00100000 /* MVE Integer extension. */
81 #define ARM_EXT2_MVE_FP 0x00200000 /* MVE Floating Point extension. */
82 #define ARM_EXT2_CDE 0x00400000 /* Custom Datapath Extension. */
83 #define ARM_EXT2_CDE0 0x00800000 /* Using CDE coproc 0. */
84 #define ARM_EXT2_CDE1 0x01000000 /* Using CDE coproc 1. */
85 #define ARM_EXT2_CDE2 0x02000000 /* Using CDE coproc 2. */
86 #define ARM_EXT2_CDE3 0x04000000 /* Using CDE coproc 3. */
87 #define ARM_EXT2_CDE4 0x08000000 /* Using CDE coproc 4. */
88 #define ARM_EXT2_CDE5 0x10000000 /* Using CDE coproc 5. */
89 #define ARM_EXT2_CDE6 0x20000000 /* Using CDE coproc 6. */
90 #define ARM_EXT2_CDE7 0x40000000 /* Using CDE coproc 7. */
91 #define ARM_EXT2_V8R 0x80000000 /* Arm V8R. */
92
93 #define ARM_EXT3_PACBTI 0x00000001 /* Arm v8-M Mainline Pointer
94 Authentication and Branch
95 Target Identification
96 Extension. */
97 #define ARM_EXT3_V9A 0x00000002 /* Armv9-A. */
98
99 /* Co-processor space extensions. */
100 #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
101 #define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */
102 #define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology
103 coprocessor. */
104 #define ARM_CEXT_IWMMXT2 0x00000008 /* Intel Wireless MMX technology
105 coprocessor version 2. */
106
107 #define FPU_ENDIAN_PURE 0x80000000 /* Pure-endian doubles. */
108 #define FPU_FPA_EXT_V1 0x40000000 /* Base FPA instruction set. */
109 #define FPU_FPA_EXT_V2 0x20000000 /* LFM/SFM. */
110 #define FPU_MAVERICK 0x10000000 /* Cirrus Maverick. */
111 #define FPU_VFP_EXT_V1xD 0x08000000 /* Base VFP instruction set. */
112 #define FPU_VFP_EXT_V1 0x04000000 /* Double-precision insns. */
113 #define FPU_VFP_EXT_V2 0x02000000 /* ARM10E VFPr1. */
114 #define FPU_VFP_EXT_V3xD 0x01000000 /* VFPv3 single-precision. */
115 #define FPU_VFP_EXT_V3 0x00800000 /* VFPv3 double-precision. */
116 #define FPU_NEON_EXT_V1 0x00400000 /* Neon (SIMD) insns. */
117 #define FPU_VFP_EXT_D32 0x00200000 /* Registers D16-D31. */
118 #define FPU_VFP_EXT_FP16 0x00100000 /* Half-precision extensions. */
119 #define FPU_NEON_EXT_FMA 0x00080000 /* Neon fused multiply-add. */
120 #define FPU_VFP_EXT_FMA 0x00040000 /* VFP fused multiply-add. */
121 #define FPU_VFP_EXT_ARMV8 0x00020000 /* Double-precision FP for ARMv8. */
122 #define FPU_NEON_EXT_ARMV8 0x00010000 /* Neon for ARMv8. */
123 #define FPU_CRYPTO_EXT_ARMV8 0x00008000 /* Crypto for ARMv8. */
124 /* Unused 0x00004000 */
125 #define FPU_VFP_EXT_ARMV8xD 0x00002000 /* Single-precision FP for ARMv8. */
126 #define FPU_NEON_EXT_RDMA 0x00001000 /* v8.1 Adv.SIMD extensions. */
127 #define FPU_NEON_EXT_DOTPROD 0x00000800 /* Dot Product extension. */
128
129 /* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
130 defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
131 ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE. To these we add
132 three more to cover cores prior to ARM6. Finally, there are cores which
133 implement further extensions in the co-processor space. */
134 #define ARM_AEXT_V1 ARM_EXT_V1
135 #define ARM_AEXT_V2 (ARM_AEXT_V1 | ARM_EXT_V2)
136 #define ARM_AEXT_V2S (ARM_AEXT_V2 | ARM_EXT_V2S)
137 #define ARM_AEXT_V3 (ARM_AEXT_V2S | ARM_EXT_V3)
138 #define ARM_AEXT_V3M (ARM_AEXT_V3 | ARM_EXT_V3M)
139 #define ARM_AEXT_V4xM (ARM_AEXT_V3 | ARM_EXT_V4)
140 #define ARM_AEXT_V4 (ARM_AEXT_V3M | ARM_EXT_V4)
141 #define ARM_AEXT_V4TxM (ARM_AEXT_V4xM | ARM_EXT_V4T | ARM_EXT_OS)
142 #define ARM_AEXT_V4T (ARM_AEXT_V4 | ARM_EXT_V4T | ARM_EXT_OS)
143 #define ARM_AEXT_V5xM (ARM_AEXT_V4xM | ARM_EXT_V5)
144 #define ARM_AEXT_V5 (ARM_AEXT_V4 | ARM_EXT_V5)
145 #define ARM_AEXT_V5TxM (ARM_AEXT_V5xM | ARM_EXT_V4T | ARM_EXT_V5T \
146 | ARM_EXT_OS)
147 #define ARM_AEXT_V5T (ARM_AEXT_V5 | ARM_EXT_V4T | ARM_EXT_V5T \
148 | ARM_EXT_OS)
149 #define ARM_AEXT_V5TExP (ARM_AEXT_V5T | ARM_EXT_V5ExP)
150 #define ARM_AEXT_V5TE (ARM_AEXT_V5TExP | ARM_EXT_V5E)
151 #define ARM_AEXT_V5TEJ (ARM_AEXT_V5TE | ARM_EXT_V5J)
152 #define ARM_AEXT_V6 (ARM_AEXT_V5TEJ | ARM_EXT_V6)
153 #define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K)
154 #define ARM_AEXT_V6Z (ARM_AEXT_V6K | ARM_EXT_SEC)
155 #define ARM_AEXT_V6KZ (ARM_AEXT_V6K | ARM_EXT_SEC)
156 #define ARM_AEXT_V6T2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM \
157 | ARM_EXT_THUMB_MSR \
158 | ARM_EXT_V6_DSP )
159 #define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K)
160 #define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_SEC)
161 #define ARM_AEXT_V6KZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC)
162 #define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
163 #define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
164 #define ARM_AEXT_V7VE (ARM_AEXT_V7A | ARM_EXT_DIV | ARM_EXT_ADIV \
165 | ARM_EXT_VIRT | ARM_EXT_SEC \
166 | ARM_EXT_MP)
167 #define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
168 #define ARM_AEXT_NOTM (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J \
169 | ARM_EXT_V6_DSP \
170 | ARM_EXT_V6_NOTM)
171 #define ARM_AEXT_V6M ((ARM_AEXT_V6K | ARM_EXT_V6M | ARM_EXT_BARRIER \
172 | ARM_EXT_THUMB_MSR) \
173 & ~(ARM_AEXT_NOTM | ARM_EXT_OS))
174 #define ARM_AEXT_V6SM (ARM_AEXT_V6M | ARM_EXT_OS)
175 #define ARM_AEXT_V7M ((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M \
176 | ARM_EXT_DIV) \
177 & ~ARM_AEXT_NOTM)
178 #define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
179 #define ARM_AEXT_V7EM (ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
180 #define ARM_AEXT_V8A (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC \
181 | ARM_EXT_DIV | ARM_EXT_ADIV \
182 | ARM_EXT_VIRT | ARM_EXT_V8)
183 #define ARM_AEXT2_V8AR (ARM_EXT2_V6T2_V8M | ARM_EXT2_ATOMICS)
184 #define ARM_AEXT2_V8A (ARM_AEXT2_V8AR | ARM_EXT2_V8A)
185 #define ARM_AEXT2_V8_1A (ARM_AEXT2_V8A | ARM_EXT2_PAN)
186 #define ARM_AEXT2_V8_2A (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A | ARM_EXT2_RAS)
187 #define ARM_AEXT2_V8_3A (ARM_AEXT2_V8_2A | ARM_EXT2_V8_3A)
188 #define ARM_AEXT2_V8_4A (ARM_AEXT2_V8_3A | ARM_EXT2_FP16_FML \
189 | ARM_EXT2_V8_4A)
190 #define ARM_AEXT2_V8_5A (ARM_AEXT2_V8_4A | ARM_EXT2_V8_5A | ARM_EXT2_SB \
191 | ARM_EXT2_PREDRES)
192 #define ARM_AEXT2_V8_6A (ARM_AEXT2_V8_5A | ARM_EXT2_V8_6A | ARM_EXT2_BF16)
193 #define ARM_AEXT_V8M_BASE (ARM_AEXT_V6SM | ARM_EXT_DIV)
194 #define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M
195 #define ARM_AEXT_V8M_MAIN_DSP ARM_AEXT_V7EM
196 #define ARM_AEXT2_V8M_BASE (ARM_EXT2_V8M | ARM_EXT2_ATOMICS \
197 | ARM_EXT2_V6T2_V8M)
198 #define ARM_AEXT2_V8M_MAIN (ARM_AEXT2_V8M_BASE | ARM_EXT2_V8M_MAIN)
199 #define ARM_AEXT2_V8M_MAIN_DSP ARM_AEXT2_V8M_MAIN
200 #define ARM_AEXT_V8R ARM_AEXT_V8A
201 #define ARM_AEXT2_V8R (ARM_EXT2_V8R | ARM_AEXT2_V8AR)
202 #define ARM_AEXT_V8_1M_MAIN ARM_AEXT_V8M_MAIN
203 #define ARM_AEXT2_V8_1M_MAIN (ARM_AEXT2_V8M_MAIN | ARM_EXT2_V8_1M_MAIN \
204 | ARM_EXT2_FP16_INST)
205
206 #define ARM_AEXT3_V8_1M_MAIN_PACBTI (ARM_AEXT2_V8M_MAIN | ARM_EXT3_PACBTI)
207
208 /* Processors with specific extensions in the co-processor space. */
209 #define ARM_ARCH_XSCALE ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
210 #define ARM_ARCH_IWMMXT \
211 ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
212 #define ARM_ARCH_IWMMXT2 \
213 ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT \
214 | ARM_CEXT_IWMMXT2)
215
216 #define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
217 #define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
218 #define FPU_VFP_V2 (FPU_VFP_V1 | FPU_VFP_EXT_V2)
219 #define FPU_VFP_V3D16 (FPU_VFP_V2 | FPU_VFP_EXT_V3xD \
220 | FPU_VFP_EXT_V3)
221 #define FPU_VFP_V3 (FPU_VFP_V3D16 | FPU_VFP_EXT_D32)
222 #define FPU_VFP_V3xD (FPU_VFP_V1xD | FPU_VFP_EXT_V2 \
223 | FPU_VFP_EXT_V3xD)
224 #define FPU_VFP_V4D16 (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 \
225 | FPU_VFP_EXT_FMA)
226 #define FPU_VFP_V4 (FPU_VFP_V3 | FPU_VFP_EXT_FP16 \
227 | FPU_VFP_EXT_FMA)
228 #define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 \
229 | FPU_VFP_EXT_FMA)
230 #define FPU_VFP_V5D16 (FPU_VFP_V4D16 | FPU_VFP_EXT_ARMV8xD \
231 | FPU_VFP_EXT_ARMV8)
232 #define FPU_VFP_V5_SP_D16 (FPU_VFP_V4_SP_D16 | FPU_VFP_EXT_ARMV8xD)
233 #define FPU_VFP_ARMV8 (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8 \
234 | FPU_VFP_EXT_ARMV8xD)
235 #define FPU_NEON_ARMV8 (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA \
236 | FPU_NEON_EXT_ARMV8)
237 #define FPU_NEON_ARMV8_1 (FPU_NEON_ARMV8 | FPU_NEON_EXT_RDMA)
238 #define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8)
239 #define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 \
240 | FPU_VFP_EXT_V2 \
241 | FPU_VFP_EXT_V3xD \
242 | FPU_VFP_EXT_FMA \
243 | FPU_NEON_EXT_FMA \
244 | FPU_VFP_EXT_V3 \
245 | FPU_NEON_EXT_V1 \
246 | FPU_VFP_EXT_D32)
247 #define FPU_FPA (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
248
249 /* Deprecated. */
250 #define FPU_ARCH_VFP ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
251
252 #define FPU_ARCH_FPE ARM_FEATURE_COPROC (FPU_FPA_EXT_V1)
253 #define FPU_ARCH_FPA ARM_FEATURE_COPROC (FPU_FPA)
254
255 #define FPU_ARCH_VFP_V1xD ARM_FEATURE_COPROC (FPU_VFP_V1xD)
256 #define FPU_ARCH_VFP_V1 ARM_FEATURE_COPROC (FPU_VFP_V1)
257 #define FPU_ARCH_VFP_V2 ARM_FEATURE_COPROC (FPU_VFP_V2)
258 #define FPU_ARCH_VFP_V3D16 ARM_FEATURE_COPROC (FPU_VFP_V3D16)
259 #define FPU_ARCH_VFP_V3D16_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3D16 \
260 | FPU_VFP_EXT_FP16)
261 #define FPU_ARCH_VFP_V3 ARM_FEATURE_COPROC (FPU_VFP_V3)
262 #define FPU_ARCH_VFP_V3_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3 \
263 | FPU_VFP_EXT_FP16)
264 #define FPU_ARCH_VFP_V3xD ARM_FEATURE_COPROC (FPU_VFP_V3xD)
265 #define FPU_ARCH_VFP_V3xD_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3xD \
266 | FPU_VFP_EXT_FP16)
267 #define FPU_ARCH_NEON_V1 ARM_FEATURE_COPROC (FPU_NEON_EXT_V1)
268 #define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
269 ARM_FEATURE_COPROC (FPU_VFP_V3 \
270 | FPU_NEON_EXT_V1)
271 #define FPU_ARCH_NEON_FP16 ARM_FEATURE_COPROC (FPU_VFP_V3 \
272 | FPU_NEON_EXT_V1 \
273 | FPU_VFP_EXT_FP16)
274 #define FPU_ARCH_VFP_HARD ARM_FEATURE_COPROC (FPU_VFP_HARD)
275 #define FPU_ARCH_VFP_V4 ARM_FEATURE_COPROC (FPU_VFP_V4)
276 #define FPU_ARCH_VFP_V4D16 ARM_FEATURE_COPROC (FPU_VFP_V4D16)
277 #define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V4_SP_D16)
278 #define FPU_ARCH_VFP_V5D16 ARM_FEATURE_COPROC (FPU_VFP_V5D16)
279 #define FPU_ARCH_VFP_V5_SP_D16 ARM_FEATURE_COPROC (FPU_VFP_V5_SP_D16)
280 #define FPU_ARCH_NEON_VFP_V4 ARM_FEATURE_COPROC (FPU_VFP_V4 \
281 | FPU_NEON_EXT_V1 \
282 | FPU_NEON_EXT_FMA)
283 #define FPU_ARCH_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_VFP_ARMV8)
284 #define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \
285 | FPU_VFP_ARMV8)
286 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \
287 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 \
288 | FPU_NEON_ARMV8 \
289 | FPU_VFP_ARMV8)
290 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD \
291 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 \
292 | FPU_NEON_ARMV8 \
293 | FPU_VFP_ARMV8 \
294 | FPU_NEON_EXT_DOTPROD)
295 #define FPU_ARCH_NEON_VFP_ARMV8_1 \
296 ARM_FEATURE_COPROC (FPU_NEON_ARMV8_1 \
297 | FPU_VFP_ARMV8)
298 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1 \
299 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 \
300 | FPU_NEON_ARMV8_1 \
301 | FPU_VFP_ARMV8)
302
303 #define FPU_ARCH_DOTPROD_NEON_VFP_ARMV8 \
304 ARM_FEATURE_COPROC (FPU_NEON_EXT_DOTPROD \
305 | FPU_NEON_ARMV8_1 \
306 | FPU_VFP_ARMV8)
307
308 #define FPU_ARCH_NEON_VFP_ARMV8_2_FP16 \
309 ARM_FEATURE (0, ARM_EXT2_FP16_INST, \
310 FPU_NEON_ARMV8_1 | FPU_VFP_ARMV8)
311
312 #define FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML \
313 ARM_FEATURE (0, ARM_EXT2_FP16_INST | ARM_EXT2_FP16_FML, \
314 FPU_NEON_ARMV8_1 | FPU_VFP_ARMV8)
315
316 #define FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML \
317 ARM_FEATURE (0, ARM_EXT2_FP16_INST | ARM_EXT2_FP16_FML, \
318 FPU_NEON_ARMV8_1 | FPU_VFP_ARMV8 | FPU_NEON_EXT_DOTPROD)
319
320 #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4 \
321 ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 \
322 | FPU_NEON_ARMV8_1 \
323 | FPU_VFP_ARMV8 \
324 | FPU_NEON_EXT_DOTPROD)
325
326 #define FPU_ARCH_ENDIAN_PURE ARM_FEATURE_COPROC (FPU_ENDIAN_PURE)
327
328 #define FPU_ARCH_MAVERICK ARM_FEATURE_COPROC (FPU_MAVERICK)
329
330 #define ARM_ARCH_V1 ARM_FEATURE_CORE_LOW (ARM_AEXT_V1)
331 #define ARM_ARCH_V2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V2)
332 #define ARM_ARCH_V2S ARM_FEATURE_CORE_LOW (ARM_AEXT_V2S)
333 #define ARM_ARCH_V3 ARM_FEATURE_CORE_LOW (ARM_AEXT_V3)
334 #define ARM_ARCH_V3M ARM_FEATURE_CORE_LOW (ARM_AEXT_V3M)
335 #define ARM_ARCH_V4xM ARM_FEATURE_CORE_LOW (ARM_AEXT_V4xM)
336 #define ARM_ARCH_V4 ARM_FEATURE_CORE_LOW (ARM_AEXT_V4)
337 #define ARM_ARCH_V4TxM ARM_FEATURE_CORE_LOW (ARM_AEXT_V4TxM)
338 #define ARM_ARCH_V4T ARM_FEATURE_CORE_LOW (ARM_AEXT_V4T)
339 #define ARM_ARCH_V5xM ARM_FEATURE_CORE_LOW (ARM_AEXT_V5xM)
340 #define ARM_ARCH_V5 ARM_FEATURE_CORE_LOW (ARM_AEXT_V5)
341 #define ARM_ARCH_V5TxM ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TxM)
342 #define ARM_ARCH_V5T ARM_FEATURE_CORE_LOW (ARM_AEXT_V5T)
343 #define ARM_ARCH_V5TExP ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TExP)
344 #define ARM_ARCH_V5TE ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TE)
345 #define ARM_ARCH_V5TEJ ARM_FEATURE_CORE_LOW (ARM_AEXT_V5TEJ)
346 #define ARM_ARCH_V6 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6)
347 #define ARM_ARCH_V6K ARM_FEATURE_CORE_LOW (ARM_AEXT_V6K)
348 #define ARM_ARCH_V6Z ARM_FEATURE_CORE_LOW (ARM_AEXT_V6Z)
349 #define ARM_ARCH_V6KZ ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZ)
350 #define ARM_ARCH_V6T2 ARM_FEATURE_CORE (ARM_AEXT_V6T2, ARM_EXT2_V6T2_V8M)
351 #define ARM_ARCH_V6KT2 ARM_FEATURE_CORE (ARM_AEXT_V6KT2, ARM_EXT2_V6T2_V8M)
352 #define ARM_ARCH_V6ZT2 ARM_FEATURE_CORE (ARM_AEXT_V6ZT2, ARM_EXT2_V6T2_V8M)
353 #define ARM_ARCH_V6KZT2 ARM_FEATURE_CORE (ARM_AEXT_V6KZT2, ARM_EXT2_V6T2_V8M)
354 #define ARM_ARCH_V6M ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M)
355 #define ARM_ARCH_V6SM ARM_FEATURE_CORE_LOW (ARM_AEXT_V6SM)
356 #define ARM_ARCH_V7 ARM_FEATURE_CORE (ARM_AEXT_V7, ARM_EXT2_V6T2_V8M)
357 #define ARM_ARCH_V7A ARM_FEATURE_CORE (ARM_AEXT_V7A, ARM_EXT2_V6T2_V8M)
358 #define ARM_ARCH_V7VE ARM_FEATURE_CORE (ARM_AEXT_V7VE, ARM_EXT2_V6T2_V8M)
359 #define ARM_ARCH_V7R ARM_FEATURE_CORE (ARM_AEXT_V7R, ARM_EXT2_V6T2_V8M)
360 #define ARM_ARCH_V7M ARM_FEATURE_CORE (ARM_AEXT_V7M, ARM_EXT2_V6T2_V8M)
361 #define ARM_ARCH_V7EM ARM_FEATURE_CORE (ARM_AEXT_V7EM, ARM_EXT2_V6T2_V8M)
362 #define ARM_ARCH_V8A ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_AEXT2_V8A)
363 #define ARM_ARCH_V8A_CRC ARM_FEATURE (ARM_AEXT_V8A, \
364 ARM_AEXT2_V8A | ARM_EXT2_CRC)
365 #define ARM_ARCH_V8_1A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A \
366 | ARM_EXT2_CRC, FPU_NEON_EXT_RDMA)
367 #define ARM_ARCH_V8_2A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A \
368 | ARM_EXT2_CRC, FPU_NEON_EXT_RDMA)
369 #define ARM_ARCH_V8_3A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_3A \
370 | ARM_EXT2_CRC, FPU_NEON_EXT_RDMA)
371 #define ARM_ARCH_V8_4A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_4A \
372 | ARM_EXT2_CRC, FPU_NEON_EXT_RDMA \
373 | FPU_NEON_EXT_DOTPROD)
374 #define ARM_ARCH_V8_5A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_5A \
375 | ARM_EXT2_CRC, FPU_NEON_EXT_RDMA \
376 | FPU_NEON_EXT_DOTPROD)
377 #define ARM_ARCH_V8_6A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_6A \
378 | ARM_EXT2_CRC, FPU_NEON_EXT_RDMA \
379 | FPU_NEON_EXT_DOTPROD)
380 #define ARM_ARCH_V8_7A ARM_ARCH_V8_6A
381 #define ARM_ARCH_V8_8A ARM_ARCH_V8_7A
382 #define ARM_ARCH_V8M_BASE ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE, \
383 ARM_AEXT2_V8M_BASE)
384 #define ARM_ARCH_V8M_MAIN ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN, \
385 ARM_AEXT2_V8M_MAIN)
386 #define ARM_ARCH_V8M_MAIN_DSP ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN_DSP, \
387 ARM_AEXT2_V8M_MAIN_DSP)
388 #define ARM_ARCH_V8R ARM_FEATURE_CORE (ARM_AEXT_V8R, ARM_AEXT2_V8R)
389 #define ARM_ARCH_V8_1M_MAIN ARM_FEATURE_CORE (ARM_AEXT_V8_1M_MAIN, \
390 ARM_AEXT2_V8_1M_MAIN)
391 #define ARM_ARCH_V9A ARM_FEATURE_ALL(ARM_AEXT_V8A, \
392 ARM_AEXT2_V8_5A | ARM_EXT2_CRC, \
393 ARM_EXT3_V9A, \
394 FPU_NEON_EXT_RDMA | FPU_NEON_EXT_DOTPROD)
395 #define ARM_ARCH_V9_1A ARM_FEATURE_ALL (ARM_AEXT_V8A, \
396 ARM_AEXT2_V8_6A | ARM_EXT2_CRC, \
397 ARM_EXT3_V9A, \
398 FPU_NEON_EXT_RDMA \
399 | FPU_NEON_EXT_DOTPROD)
400 #define ARM_ARCH_V9_2A ARM_ARCH_V9_1A
401 #define ARM_ARCH_V9_3A ARM_ARCH_V9_2A
402
403 /* Some useful combinations: */
404 #define ARM_ARCH_NONE ARM_FEATURE_ALL (0, 0, 0, 0)
405 #define FPU_NONE ARM_FEATURE_ALL (0, 0, 0, 0)
406 #define ARM_ARCH_UNKNOWN ARM_FEATURE_ALL (-1, -1 & ~(ARM_EXT2_MVE | ARM_EXT2_MVE_FP), -1, -1) /* Machine type is unknown. */
407 #define ARM_ANY ARM_FEATURE_ALL (-1, -1 & ~(ARM_EXT2_MVE | ARM_EXT2_MVE_FP), -1, 0) /* Any basic core. */
408 #define FPU_ANY ARM_FEATURE_COPROC (-1 & ~(ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)) /* Any FPU. */
409 #define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
410 /* Extensions containing some Thumb-2 instructions. If any is present, Thumb
411 ISA is Thumb-2. */
412 #define ARM_ARCH_THUMB2 ARM_FEATURE_CORE (ARM_EXT_V6T2 | ARM_EXT_V7 \
413 | ARM_EXT_DIV | ARM_EXT_V8, \
414 ARM_EXT2_ATOMICS | ARM_EXT2_V6T2_V8M)
415 /* v7-a+sec. */
416 #define ARM_ARCH_V7A_SEC \
417 ARM_FEATURE_CORE (ARM_AEXT_V7A | ARM_EXT_SEC, ARM_EXT2_V6T2_V8M)
418 /* v7-a+mp+sec. */
419 #define ARM_ARCH_V7A_MP_SEC \
420 ARM_FEATURE_CORE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC, ARM_EXT2_V6T2_V8M)
421 /* v7-r+idiv. */
422 #define ARM_ARCH_V7R_IDIV \
423 ARM_FEATURE_CORE (ARM_AEXT_V7R | ARM_EXT_ADIV, ARM_EXT2_V6T2_V8M)
424 /* v8-a+fp. */
425 #define ARM_ARCH_V8A_FP \
426 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_VFP_ARMV8)
427 /* v8-a+simd (implies fp). */
428 #define ARM_ARCH_V8A_SIMD \
429 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_NEON_VFP_ARMV8)
430 /* v8-a+crypto (implies simd+fp). */
431 #define ARM_ARCH_V8A_CRYPTOV1 \
432 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8)
433
434 /* v8.1-a+fp. */
435 #define ARM_ARCH_V8_1A_FP \
436 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_VFP_ARMV8)
437 /* v8.1-a+simd (implies fp). */
438 #define ARM_ARCH_V8_1A_SIMD \
439 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_NEON_VFP_ARMV8_1)
440 /* v8.1-a+crypto (implies simd+fp). */
441 #define ARM_ARCH_V8_1A_CRYPTOV1 \
442 ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1)
443
444
445 /* There are too many feature bits to fit in a single word, so use a
446 structure. For simplicity we put all core features in array CORE
447 and everything else in the other. All the bits in element core[0:1]
448 have been occupied, so new feature should use bit in element core[2]
449 and use macro ARM_FEATURE to initialize the feature set variable. */
450 typedef struct
451 {
452 unsigned long core[3];
453 unsigned long coproc;
454 } arm_feature_set;
455
456 /* Test whether CPU and FEAT have any features in common. */
457 #define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
458 (((CPU).core[0] & (FEAT).core[0]) != 0 \
459 || ((CPU).core[1] & (FEAT).core[1]) != 0 \
460 || ((CPU).core[2] & (FEAT).core[2]) != 0 \
461 || ((CPU).coproc & (FEAT).coproc) != 0)
462
463 /* Tests whether the features of A are a subset of B. */
464 #define ARM_FSET_CPU_SUBSET(A,B) \
465 (((A).core[0] & (B).core[0]) == (A).core[0] \
466 && ((A).core[1] & (B).core[1]) == (A).core[1] \
467 && ((A).core[2] & (B).core[2]) == (A).core[2] \
468 && ((A).coproc & (B).coproc) == (A).coproc)
469
470 #define ARM_CPU_IS_ANY(CPU) \
471 ((CPU).core[0] == ((arm_feature_set)ARM_ANY).core[0] \
472 && (CPU).core[1] == ((arm_feature_set)ARM_ANY).core[1] \
473 && (CPU).core[2] == ((arm_feature_set)ARM_ANY).core[2])
474
475 #define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \
476 do \
477 { \
478 (TARG).core[0] = (F1).core[0] | (F2).core[0]; \
479 (TARG).core[1] = (F1).core[1] | (F2).core[1]; \
480 (TARG).core[2] = (F1).core[2] | (F2).core[2]; \
481 (TARG).coproc = (F1).coproc | (F2).coproc; \
482 } \
483 while (0)
484
485 #define ARM_CLEAR_FEATURE(TARG,F1,F2) \
486 do \
487 { \
488 (TARG).core[0] = (F1).core[0] &~ (F2).core[0]; \
489 (TARG).core[1] = (F1).core[1] &~ (F2).core[1]; \
490 (TARG).core[2] = (F1).core[2] &~ (F2).core[2]; \
491 (TARG).coproc = (F1).coproc &~ (F2).coproc; \
492 } \
493 while (0)
494
495 #define ARM_FEATURE_EQUAL(T1,T2) \
496 ( (T1).core[0] == (T2).core[0] \
497 && (T1).core[1] == (T2).core[1] \
498 && (T1).core[2] == (T2).core[2] \
499 && (T1).coproc == (T2).coproc)
500
501 #define ARM_FEATURE_ZERO(T) \
502 ((T).core[0] == 0 \
503 && (T).core[1] == 0 \
504 && (T).core[2] == 0 \
505 && (T).coproc == 0)
506
507 #define ARM_FEATURE_CORE_EQUAL(T1, T2) \
508 ((T1).core[0] == (T2).core[0] \
509 && (T1).core[1] == (T2).core[1] \
510 && (T1).core[2] == (T2).core[2])
511
512 #define ARM_FEATURE_LOW(core, coproc) {{(core), 0, 0}, (coproc)}
513 #define ARM_FEATURE_CORE(core1, core2) {{(core1), (core2), 0}, 0}
514 #define ARM_FEATURE_CORE_LOW(core) {{(core), 0, 0}, 0}
515 #define ARM_FEATURE_CORE_HIGH(core) {{0, (core), 0}, 0}
516 #define ARM_FEATURE_CORE_HIGH_HIGH(core) {{0, 0, (core)}, 0}
517 #define ARM_FEATURE_COPROC(coproc) {{0, 0, 0}, (coproc)}
518 #define ARM_FEATURE(core1, core2, coproc) {{(core1), (core2), 0}, (coproc)}
519 /* Below macro is used to set all fields in arm_feature_set struct.
520 */
521 #define ARM_FEATURE_ALL(core1, core2, core3, coproc) {{(core1), (core2), (core3)}, (coproc)}
SDCC git mirror