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The simple DMA is OK. The width of the data is set to be 16 bits. The
[simple-dma.git]
/
sdram_master_defines.v
blob
a05d5cd9378bfb9ee50c4335853e2068f753dcb7
1
`define SDRAM_U1_BASE 0x02000000
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`define SDRAM_U2_BASE 0x04000000
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//ADDR defines
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`define S_ADDR 0
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`define D_ADDR 1
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`define LONGTH 2
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`define START_ADDR 3
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`define STATUS_ADDR 4