hw/ppc_newworld.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "mac_dbdma.h"
  29 #include "nvram.h"
  30 #include "pc.h"
  31 #include "pci.h"
  32 #include "net.h"
  33 #include "sysemu.h"
  34 #include "boards.h"
  35 #include "fw_cfg.h"
  36 #include "escc.h"
  37
  38 #define MAX_IDE_BUS 2
  39 #define VGA_BIOS_SIZE 65536
  40 #define CFG_ADDR 0xf0000510
  41
  42 /* debug UniNorth */
  43 //#define DEBUG_UNIN
  44
  45 #ifdef DEBUG_UNIN
  46 #define UNIN_DPRINTF(fmt, args...) \
  47 do { printf("UNIN: " fmt , ##args); } while (0)
  48 #else
  49 #define UNIN_DPRINTF(fmt, args...)
  50 #endif
  51
  52 /* UniN device */
  53 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  54 {
  55     UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
  56 }
  57
  58 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  59 {
  60     uint32_t value;
  61
  62     value = 0;
  63     UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  64
  65     return value;
  66 }
  67
  68 static CPUWriteMemoryFunc *unin_write[] = {
  69     &unin_writel,
  70     &unin_writel,
  71     &unin_writel,
  72 };
  73
  74 static CPUReadMemoryFunc *unin_read[] = {
  75     &unin_readl,
  76     &unin_readl,
  77     &unin_readl,
  78 };
  79
  80 /* PowerPC Mac99 hardware initialisation */
  81 static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
  82                              const char *boot_device,
  83                              const char *kernel_filename,
  84                              const char *kernel_cmdline,
  85                              const char *initrd_filename,
  86                              const char *cpu_model)
  87 {
  88     CPUState *env = NULL, *envs[MAX_CPUS];
  89     char buf[1024];
  90     qemu_irq *pic, **openpic_irqs;
  91     int unin_memory;
  92     int linux_boot, i;
  93     ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
  94     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
  95     PCIBus *pci_bus;
  96     MacIONVRAMState *nvr;
  97     int nvram_mem_index;
  98     int vga_bios_size, bios_size;
  99     qemu_irq *dummy_irq;
 100     int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
 101     int ppc_boot_device;
 102     int index;
 103     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 104     void *fw_cfg;
 105     void *dbdma;
 106
 107     linux_boot = (kernel_filename != NULL);
 108
 109     /* init CPUs */
 110     if (cpu_model == NULL)
 111         cpu_model = "G4";
 112     for (i = 0; i < smp_cpus; i++) {
 113         env = cpu_init(cpu_model);
 114         if (!env) {
 115             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 116             exit(1);
 117         }
 118         /* Set time-base frequency to 100 Mhz */
 119         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 120 #if 0
 121         env->osi_call = vga_osi_call;
 122 #endif
 123         qemu_register_reset(&cpu_ppc_reset, env);
 124         envs[i] = env;
 125     }
 126
 127     /* allocate RAM */
 128     ram_offset = qemu_ram_alloc(ram_size);
 129     cpu_register_physical_memory(0, ram_size, ram_offset);
 130
 131     /* allocate VGA RAM */
 132     vga_ram_offset = qemu_ram_alloc(vga_ram_size);
 133
 134     /* allocate and load BIOS */
 135     bios_offset = qemu_ram_alloc(BIOS_SIZE);
 136     if (bios_name == NULL)
 137         bios_name = PROM_FILENAME;
 138     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 139     cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
 140
 141     /* Load OpenBIOS (ELF) */
 142     bios_size = load_elf(buf, 0, NULL, NULL, NULL);
 143     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 144         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 145         exit(1);
 146     }
 147
 148     /* allocate and load VGA BIOS */
 149     vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
 150     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 151     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 152     if (vga_bios_size < 0) {
 153         /* if no bios is present, we can still work */
 154         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 155         vga_bios_size = 0;
 156     } else {
 157         /* set a specific header (XXX: find real Apple format for NDRV
 158            drivers) */
 159         phys_ram_base[vga_bios_offset] = 'N';
 160         phys_ram_base[vga_bios_offset + 1] = 'D';
 161         phys_ram_base[vga_bios_offset + 2] = 'R';
 162         phys_ram_base[vga_bios_offset + 3] = 'V';
 163         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 164                      vga_bios_size);
 165         vga_bios_size += 8;
 166     }
 167
 168     if (linux_boot) {
 169         kernel_base = KERNEL_LOAD_ADDR;
 170         /* now we can load the kernel */
 171         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 172         if (kernel_size < 0) {
 173             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 174                       kernel_filename);
 175             exit(1);
 176         }
 177         /* load initrd */
 178         if (initrd_filename) {
 179             initrd_base = INITRD_LOAD_ADDR;
 180             initrd_size = load_image(initrd_filename,
 181                                      phys_ram_base + initrd_base);
 182             if (initrd_size < 0) {
 183                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 184                           initrd_filename);
 185                 exit(1);
 186             }
 187         } else {
 188             initrd_base = 0;
 189             initrd_size = 0;
 190         }
 191         ppc_boot_device = 'm';
 192     } else {
 193         kernel_base = 0;
 194         kernel_size = 0;
 195         initrd_base = 0;
 196         initrd_size = 0;
 197         ppc_boot_device = '\0';
 198         /* We consider that NewWorld PowerMac never have any floppy drive
 199          * For now, OHW cannot boot from the network.
 200          */
 201         for (i = 0; boot_device[i] != '\0'; i++) {
 202             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 203                 ppc_boot_device = boot_device[i];
 204                 break;
 205             }
 206         }
 207         if (ppc_boot_device == '\0') {
 208             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 209             exit(1);
 210         }
 211     }
 212
 213     isa_mem_base = 0x80000000;
 214
 215     /* Register 8 MB of ISA IO space */
 216     isa_mmio_init(0xf2000000, 0x00800000);
 217
 218     /* UniN init */
 219     unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
 220     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 221
 222     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 223     openpic_irqs[0] =
 224         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 225     for (i = 0; i < smp_cpus; i++) {
 226         /* Mac99 IRQ connection between OpenPIC outputs pins
 227          * and PowerPC input pins
 228          */
 229         switch (PPC_INPUT(env)) {
 230         case PPC_FLAGS_INPUT_6xx:
 231             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 232             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 233                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 234             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 235                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 236             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 237                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 238             /* Not connected ? */
 239             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 240             /* Check this */
 241             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 242                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 243             break;
 244 #if defined(TARGET_PPC64)
 245         case PPC_FLAGS_INPUT_970:
 246             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 247             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 248                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 249             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 250                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 251             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 252                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 253             /* Not connected ? */
 254             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 255             /* Check this */
 256             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 257                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 258             break;
 259 #endif /* defined(TARGET_PPC64) */
 260         default:
 261             cpu_abort(env, "Bus model not supported on mac99 machine\n");
 262             exit(1);
 263         }
 264     }
 265     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 266     pci_bus = pci_pmac_init(pic);
 267     /* init basic PC hardware */
 268     pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
 269                  vga_ram_offset, vga_ram_size,
 270                  vga_bios_offset, vga_bios_size);
 271
 272     /* XXX: suppress that */
 273     dummy_irq = i8259_init(NULL);
 274
 275     escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
 276                                serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 277
 278     for(i = 0; i < nb_nics; i++)
 279         pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
 280
 281     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 282         fprintf(stderr, "qemu: too many IDE bus\n");
 283         exit(1);
 284     }
 285     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 286         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 287         if (index != -1)
 288             hd[i] = drives_table[index].bdrv;
 289         else
 290             hd[i] = NULL;
 291     }
 292     dbdma = DBDMA_init(&dbdma_mem_index);
 293     pci_cmd646_ide_init(pci_bus, hd, 0);
 294
 295     /* cuda also initialize ADB */
 296     cuda_init(&cuda_mem_index, pic[0x19]);
 297
 298     adb_kbd_init(&adb_bus);
 299     adb_mouse_init(&adb_bus);
 300
 301
 302     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
 303                dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
 304                escc_mem_index);
 305
 306     if (usb_enabled) {
 307         usb_ohci_init_pci(pci_bus, 3, -1);
 308     }
 309
 310     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 311         graphic_depth = 15;
 312
 313     /* The NewWorld NVRAM is not located in the MacIO device */
 314     nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
 315     pmac_format_nvram_partition(nvr, 0x2000);
 316     macio_nvram_map(nvr, 0xFFF04000);
 317     /* No PCI init: the BIOS will do it */
 318
 319     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 320     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 321     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 322     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
 323 }
 324
 325 QEMUMachine core99_machine = {
 326     .name = "mac99",
 327     .desc = "Mac99 based PowerMAC",
 328     .init = ppc_core99_init,
 329     .ram_require = BIOS_SIZE + VGA_BIOS_SIZE + VGA_RAM_SIZE,
 330     .max_cpus = MAX_CPUS,
 331 };