hw/ppc_newworld.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "mac_dbdma.h"
  29 #include "nvram.h"
  30 #include "pc.h"
  31 #include "pci.h"
  32 #include "net.h"
  33 #include "sysemu.h"
  34 #include "boards.h"
  35 #include "fw_cfg.h"
  36 #include "escc.h"
  37 #include "openpic.h"
  38
  39 #define MAX_IDE_BUS 2
  40 #define VGA_BIOS_SIZE 65536
  41 #define CFG_ADDR 0xf0000510
  42
  43 /* debug UniNorth */
  44 //#define DEBUG_UNIN
  45
  46 #ifdef DEBUG_UNIN
  47 #define UNIN_DPRINTF(fmt, args...) \
  48 do { printf("UNIN: " fmt , ##args); } while (0)
  49 #else
  50 #define UNIN_DPRINTF(fmt, args...)
  51 #endif
  52
  53 /* UniN device */
  54 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  55 {
  56     UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
  57 }
  58
  59 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  60 {
  61     uint32_t value;
  62
  63     value = 0;
  64     UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
  65
  66     return value;
  67 }
  68
  69 static CPUWriteMemoryFunc *unin_write[] = {
  70     &unin_writel,
  71     &unin_writel,
  72     &unin_writel,
  73 };
  74
  75 static CPUReadMemoryFunc *unin_read[] = {
  76     &unin_readl,
  77     &unin_readl,
  78     &unin_readl,
  79 };
  80
  81 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
  82 {
  83     fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  84     return 0;
  85 }
  86
  87 /* PowerPC Mac99 hardware initialisation */
  88 static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
  89                              const char *boot_device,
  90                              const char *kernel_filename,
  91                              const char *kernel_cmdline,
  92                              const char *initrd_filename,
  93                              const char *cpu_model)
  94 {
  95     CPUState *env = NULL, *envs[MAX_CPUS];
  96     char buf[1024];
  97     qemu_irq *pic, **openpic_irqs;
  98     int unin_memory;
  99     int linux_boot, i;
 100     ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
 101     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
 102     PCIBus *pci_bus;
 103     MacIONVRAMState *nvr;
 104     int nvram_mem_index;
 105     int vga_bios_size, bios_size;
 106     qemu_irq *dummy_irq;
 107     int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
 108     int ppc_boot_device;
 109     int index;
 110     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 111     void *fw_cfg;
 112     void *dbdma;
 113
 114     linux_boot = (kernel_filename != NULL);
 115
 116     /* init CPUs */
 117     if (cpu_model == NULL)
 118         cpu_model = "G4";
 119     for (i = 0; i < smp_cpus; i++) {
 120         env = cpu_init(cpu_model);
 121         if (!env) {
 122             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 123             exit(1);
 124         }
 125         /* Set time-base frequency to 100 Mhz */
 126         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 127 #if 0
 128         env->osi_call = vga_osi_call;
 129 #endif
 130         qemu_register_reset(&cpu_ppc_reset, env);
 131         envs[i] = env;
 132     }
 133
 134     /* allocate RAM */
 135     ram_offset = qemu_ram_alloc(ram_size);
 136     cpu_register_physical_memory(0, ram_size, ram_offset);
 137
 138     /* allocate VGA RAM */
 139     vga_ram_offset = qemu_ram_alloc(vga_ram_size);
 140
 141     /* allocate and load BIOS */
 142     bios_offset = qemu_ram_alloc(BIOS_SIZE);
 143     if (bios_name == NULL)
 144         bios_name = PROM_FILENAME;
 145     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 146     cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
 147
 148     /* Load OpenBIOS (ELF) */
 149     bios_size = load_elf(buf, 0, NULL, NULL, NULL);
 150     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 151         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 152         exit(1);
 153     }
 154
 155     /* allocate and load VGA BIOS */
 156     vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
 157     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 158     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 159     if (vga_bios_size < 0) {
 160         /* if no bios is present, we can still work */
 161         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 162         vga_bios_size = 0;
 163     } else {
 164         /* set a specific header (XXX: find real Apple format for NDRV
 165            drivers) */
 166         phys_ram_base[vga_bios_offset] = 'N';
 167         phys_ram_base[vga_bios_offset + 1] = 'D';
 168         phys_ram_base[vga_bios_offset + 2] = 'R';
 169         phys_ram_base[vga_bios_offset + 3] = 'V';
 170         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 171                      vga_bios_size);
 172         vga_bios_size += 8;
 173     }
 174
 175     if (linux_boot) {
 176         uint64_t lowaddr = 0;
 177         kernel_base = KERNEL_LOAD_ADDR;
 178
 179         /* Now we can load the kernel. The first step tries to load the kernel
 180            supposing PhysAddr = 0x00000000. If that was wrong the kernel is
 181            loaded again, the new PhysAddr being computed from lowaddr. */
 182         kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL);
 183         if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
 184             kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
 185                                    NULL, 0, NULL);
 186         }
 187         if (kernel_size < 0)
 188             kernel_size = load_aout(kernel_filename, kernel_base,
 189                                     ram_size - kernel_base);
 190         if (kernel_size < 0)
 191             kernel_size = load_image_targphys(kernel_filename,
 192                                               kernel_base,
 193                                               ram_size - kernel_base);
 194         if (kernel_size < 0) {
 195             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 196                       kernel_filename);
 197             exit(1);
 198         }
 199         /* load initrd */
 200         if (initrd_filename) {
 201             initrd_base = INITRD_LOAD_ADDR;
 202             initrd_size = load_image(initrd_filename,
 203                                      phys_ram_base + initrd_base);
 204             if (initrd_size < 0) {
 205                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 206                           initrd_filename);
 207                 exit(1);
 208             }
 209         } else {
 210             initrd_base = 0;
 211             initrd_size = 0;
 212         }
 213         ppc_boot_device = 'm';
 214     } else {
 215         kernel_base = 0;
 216         kernel_size = 0;
 217         initrd_base = 0;
 218         initrd_size = 0;
 219         ppc_boot_device = '\0';
 220         /* We consider that NewWorld PowerMac never have any floppy drive
 221          * For now, OHW cannot boot from the network.
 222          */
 223         for (i = 0; boot_device[i] != '\0'; i++) {
 224             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 225                 ppc_boot_device = boot_device[i];
 226                 break;
 227             }
 228         }
 229         if (ppc_boot_device == '\0') {
 230             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 231             exit(1);
 232         }
 233     }
 234
 235     isa_mem_base = 0x80000000;
 236
 237     /* Register 8 MB of ISA IO space */
 238     isa_mmio_init(0xf2000000, 0x00800000);
 239
 240     /* UniN init */
 241     unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
 242     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 243
 244     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 245     openpic_irqs[0] =
 246         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 247     for (i = 0; i < smp_cpus; i++) {
 248         /* Mac99 IRQ connection between OpenPIC outputs pins
 249          * and PowerPC input pins
 250          */
 251         switch (PPC_INPUT(env)) {
 252         case PPC_FLAGS_INPUT_6xx:
 253             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 254             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 255                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 256             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 257                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 258             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 259                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 260             /* Not connected ? */
 261             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 262             /* Check this */
 263             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 264                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 265             break;
 266 #if defined(TARGET_PPC64)
 267         case PPC_FLAGS_INPUT_970:
 268             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 269             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 270                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 271             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 272                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 273             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 274                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 275             /* Not connected ? */
 276             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 277             /* Check this */
 278             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 279                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 280             break;
 281 #endif /* defined(TARGET_PPC64) */
 282         default:
 283             cpu_abort(env, "Bus model not supported on mac99 machine\n");
 284             exit(1);
 285         }
 286     }
 287     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 288     pci_bus = pci_pmac_init(pic);
 289     /* init basic PC hardware */
 290     pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
 291                  vga_ram_offset, vga_ram_size,
 292                  vga_bios_offset, vga_bios_size);
 293
 294     /* XXX: suppress that */
 295     dummy_irq = i8259_init(NULL);
 296
 297     escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
 298                                serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 299
 300     for(i = 0; i < nb_nics; i++)
 301         pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
 302
 303     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 304         fprintf(stderr, "qemu: too many IDE bus\n");
 305         exit(1);
 306     }
 307     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 308         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 309         if (index != -1)
 310             hd[i] = drives_table[index].bdrv;
 311         else
 312             hd[i] = NULL;
 313     }
 314     dbdma = DBDMA_init(&dbdma_mem_index);
 315     pci_cmd646_ide_init(pci_bus, hd, 0);
 316
 317     /* cuda also initialize ADB */
 318     cuda_init(&cuda_mem_index, pic[0x19]);
 319
 320     adb_kbd_init(&adb_bus);
 321     adb_mouse_init(&adb_bus);
 322
 323
 324     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
 325                dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
 326                escc_mem_index);
 327
 328     if (usb_enabled) {
 329         usb_ohci_init_pci(pci_bus, 3, -1);
 330     }
 331
 332     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 333         graphic_depth = 15;
 334
 335     /* The NewWorld NVRAM is not located in the MacIO device */
 336     nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
 337     pmac_format_nvram_partition(nvr, 0x2000);
 338     macio_nvram_map(nvr, 0xFFF04000);
 339     /* No PCI init: the BIOS will do it */
 340
 341     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 342     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 343     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 344     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
 345     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 346     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 347     if (kernel_cmdline) {
 348         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
 349         pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
 350     } else {
 351         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 352     }
 353     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 354     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 355     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 356     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 357 }
 358
 359 QEMUMachine core99_machine = {
 360     .name = "mac99",
 361     .desc = "Mac99 based PowerMAC",
 362     .init = ppc_core99_init,
 363     .ram_require = BIOS_SIZE + VGA_BIOS_SIZE + VGA_RAM_SIZE,
 364     .max_cpus = MAX_CPUS,
 365 };