sources/cpu/os_cpu_a.s

   1 ;********************************************************************************************************
   2 ;                                               uC/OS-II
   3 ;                                         The Real-Time Kernel
   4 ;
   5 ;                         (c) Copyright 2002, Jean J. Labrosse, Weston, FL
   6 ;                                          All Rights Reserved
   7 ;
   8 ;
   9 ;                                       PAGED S12X Specific code
  10 ;                                            (CODEWARRIOR)
  11 ;
  12 ; File         : OS_CPU_A.S
  13 ; By           : Eric Shufro
  14 ;
  15 ; Notes        : THIS FILE *MUST* BE LINKED INTO NON_BANKED MEMORY!
  16 ;********************************************************************************************************
  17
  18 NON_BANKED:       section
  19
  20 ;********************************************************************************************************
  21 ;                                           I/O PORT ADDRESSES
  22 ;********************************************************************************************************
  23
  24 PPAGE:            equ    $0015         ; Addres of PPAGE register (assuming MC9S12XEP100 part)
  25 RPAGE:            equ    $0016         ; Addres of RPAGE register (assuming MC9S12XEP100 part)
  26 EPAGE:            equ    $0017         ; Addres of EPAGE register (assuming MC9S12XEP100 part)
  27 GPAGE:            equ    $0010         ; Addres of GPAGE register (assuming MC9S12XEP100 part)
  28
  29 CRGFLG:           equ    $0037         ; Address of CRGFLG add by cha0s
  30 PIFJ:             equ    $026f         ; Address of CRGFLG add by cha0s
  31
  32 ;********************************************************************************************************
  33 ;                                          PUBLIC DECLARATIONS
  34 ;********************************************************************************************************
  35
  36     xdef   OS_CPU_SR_Save
  37     xdef   OS_CPU_SR_Restore
  38     xdef   OSStartHighRdy
  39     xdef   OSCtxSw
  40     xdef   OSIntCtxSw
  41     xdef   OSTickISR
  42
  43 ;********************************************************************************************************
  44 ;                                         EXTERNAL DECLARATIONS
  45 ;********************************************************************************************************
  46
  47     xref   OSIntExit
  48     xref   OSIntNesting
  49     xref   OSPrioCur
  50     xref   OSPrioHighRdy
  51     xref   OSRunning
  52     xref   OSTaskSwHook
  53     xref   OSTCBCur
  54     xref   OSTCBHighRdy
  55     xref   OSTickISR_Handler
  56     xref   OSTimeTick
  57
  58 ;********************************************************************************************************
  59 ;                                  SAVE THE CCR AND DISABLE INTERRUPTS
  60 ;                                                  &
  61 ;                                              RESTORE CCR
  62 ;
  63 ; Description : These function implements OS_CRITICAL_METHOD #3
  64 ;
  65 ; Arguments   : The function prototypes for the two functions are:
  66 ;               1) OS_CPU_SR  OSCPUSaveSR(void)
  67 ;                             where OS_CPU_SR is the contents of the CCR register prior to disabling
  68 ;                             interrupts.
  69 ;               2) void       OSCPURestoreSR(OS_CPU_SR os_cpu_sr);
  70 ;                             'os_cpu_sr' the the value of the CCR to restore.
  71 ;
  72 ; Note(s)     : 1) It's assumed that the compiler uses the D register to pass a single 16-bit argument
  73 ;                  to and from an assembly language function.
  74 ;********************************************************************************************************
  75
  76 OS_CPU_SR_Save:
  77     tfr  ccrw, d                       ; It's assumed that the 16-bit return value is in register D
  78     sei                                ; Disable interrupts
  79     rtc                                ; Return to caller with D containing the previous CCR
  80
  81 OS_CPU_SR_Restore:
  82     tfr  d,ccrw                        ; D contains the CCR word value to restore, move to CCRW
  83     rtc
  84
  85 ;********************************************************************************************************
  86 ;                               START HIGHEST PRIORITY TASK READY-TO-RUN
  87 ;
  88 ; Description : This function is called by OSStart() to start the highest priority task that was created
  89 ;               by your application before calling OSStart().
  90 ;
  91 ; Arguments   : none
  92 ;
  93 ; Note(s)     : 1) The stack frame is assumed to look as follows:
  94 ;
  95 ;                  OSTCBHighRdy->OSTCBStkPtr +  0  -->  gPAGE
  96 ;                                            +  1       ePAGE
  97 ;                                            +  2       rPAGE
  98 ;                                            +  3       pPAGE
  99 ;                                            +  1       CCRW
 100 ;                                            +  2       B
 101 ;                                            +  3       A
 102 ;                                            +  4       X (H)
 103 ;                                            +  5       X (L)
 104 ;                                            +  6       Y (H)
 105 ;                                            +  7       Y (L)
 106 ;                                            +  8       PC(H)
 107 ;                                            +  9       PC(L)
 108 ;
 109 ;               2) OSStartHighRdy() MUST:
 110 ;                      a) Call OSTaskSwHook() then,
 111 ;                      b) Set OSRunning to TRUE,
 112 ;                      c) Switch to the highest priority task by loading the stack pointer of the
 113 ;                         highest priority task into the SP register and execute an RTI instruction.
 114 ;********************************************************************************************************
 115
 116 OSStartHighRdy:
 117     call   OSTaskSwHook                ; Invoke user defined context switch hook
 118
 119     ldab   #$01                        ; Indicate that we are multitasking
 120     stab   OSRunning
 121
 122     ldx    OSTCBHighRdy                ; Point to TCB of highest priority task ready to run
 123     lds    0,x                         ; Load SP into 68HC12
 124
 125     pula                               ; Get value of PPAGE register
 126     staa   PPAGE                       ; Store into CPU's PPAGE register
 127
 128     pula                               ; Get value of RPAGE register
 129     staa   RPAGE                       ; Store into CPU's RPAGE register
 130
 131     pula                               ; Get value of EPAGE register
 132     staa   EPAGE                       ; Store into CPU's EPAGE register
 133
 134     pula                               ; Get value of GPAGE register
 135     staa   GPAGE                       ; Store into CPU's GPAGE register
 136
 137     rti                                ; Run task
 138
 139 ;********************************************************************************************************
 140 ;                                       TASK LEVEL CONTEXT SWITCH
 141 ;
 142 ; Description : This function is called when a task makes a higher priority task ready-to-run.
 143 ;
 144 ; Arguments   : none
 145 ;
 146 ; Note(s)     : 1) Upon entry,
 147 ;                  OSTCBCur     points to the OS_TCB of the task to suspend
 148 ;                  OSTCBHighRdy points to the OS_TCB of the task to resume
 149 ;
 150 ;               2) The stack frame of the task to suspend looks as follows:
 151 ;
 152 ;                  SP            CCR
 153 ;                     +  2       B
 154 ;                     +  3       A
 155 ;                     +  4       X (H)
 156 ;                     +  5       X (L)
 157 ;                     +  6       Y (H)
 158 ;                     +  7       Y (L)
 159 ;                     +  8       PC(H)
 160 ;                     +  9       PC(L)
 161 ;
 162 ;               3) The stack frame of the task to resume looks as follows:
 163 ;
 164 ;                  OSTCBHighRdy->OSTCBStkPtr +  0  -->  gPAGE
 165 ;                                            +  1       ePAGE
 166 ;                                            +  2       rPAGE
 167 ;                                            +  3       pPAGE
 168 ;                                            +  4       CCR
 169 ;                                            +  6       B
 170 ;                                            +  7       A
 171 ;                                            +  8       X (H)
 172 ;                                            +  9       X (L)
 173 ;                                            + 10       Y (H)
 174 ;                                            + 11       Y (L)
 175 ;                                            + 12       PC(H)
 176 ;                                            + 13       PC(L)
 177 ;********************************************************************************************************
 178
 179 OSCtxSw:
 180     ldaa   GPAGE                       ; Get current value of GPAGE register
 181     psha                               ; Push GPAGE register onto current task's stack
 182
 183     ldaa   EPAGE                       ; Get current value of EPAGE register
 184     psha                               ; Push EPAGE register onto current task's stack
 185
 186     ldaa   RPAGE                       ; Get current value of RPAGE register
 187     psha                               ; Push RPAGE register onto current task's stack
 188
 189     ldaa   PPAGE                       ; Get current value of PPAGE register
 190     psha                               ; Push PPAGE register onto current task's stack
 191
 192     ldy    OSTCBCur                    ; OSTCBCur->OSTCBStkPtr = Stack Pointer
 193     sts    0,y
 194
 195     call   OSTaskSwHook                ; Call user task switch hook
 196
 197     ldx    OSTCBHighRdy                ; OSTCBCur  = OSTCBHighRdy
 198     stx    OSTCBCur
 199
 200     ldab   OSPrioHighRdy               ; OSPrioCur = OSPrioHighRdy
 201     stab   OSPrioCur
 202
 203     lds    0,x                         ; Load SP into 68HC12
 204
 205     pula                               ; Get value of PPAGE register
 206     staa   PPAGE                       ; Store into CPU's PPAGE register
 207
 208     pula                               ; Get value of RPAGE register
 209     staa   RPAGE                       ; Store into CPU's RPAGE register
 210
 211     pula                               ; Get value of EPAGE register
 212     staa   EPAGE                       ; Store into CPU's EPAGE register
 213
 214     pula                               ; Get value of GPAGE register
 215     staa   GPAGE                       ; Store into CPU's GPAGE register
 216
 217     rti                                ; Run task
 218
 219 ;********************************************************************************************************
 220 ;                                    INTERRUPT LEVEL CONTEXT SWITCH
 221 ;
 222 ; Description : This function is called by OSIntExit() to perform a context switch to a task that has
 223 ;               been made ready-to-run by an ISR. The GPAGE, EPAGE, RPAGE and PPAGE CPU registers of the
 224 ;               preempted task have already been stacked during the start of the ISR that is currently
 225 ;               running.
 226 ;
 227 ; Arguments   : none
 228 ;********************************************************************************************************
 229
 230 OSIntCtxSw:
 231     call   OSTaskSwHook                ; Call user task switch hook
 232
 233     ldx    OSTCBHighRdy                ; OSTCBCur  = OSTCBHighRdy
 234     stx    OSTCBCur
 235
 236     ldab   OSPrioHighRdy               ; OSPrioCur = OSPrioHighRdy
 237     stab   OSPrioCur
 238
 239     lds    0,x                         ; Load the SP of the next task
 240
 241     pula                               ; Get value of PPAGE register
 242     staa   PPAGE                       ; Store into CPU's PPAGE register
 243
 244     pula                               ; Get value of RPAGE register
 245     staa   RPAGE                       ; Store into CPU's RPAGE register
 246
 247     pula                               ; Get value of EPAGE register
 248     staa   EPAGE                       ; Store into CPU's EPAGE register
 249
 250     pula                               ; Get value of GPAGE register
 251     staa   GPAGE                       ; Store into CPU's GPAGE register
 252
 253     rti                                ; Run task
 254
 255 ;********************************************************************************************************
 256 ;                                           SYSTEM TICK ISR
 257 ;
 258 ; Description : This function is the ISR used to notify uC/OS-II that a system tick has occurred.  You
 259 ;               must setup the S12XE's interrupt vector table so that an OUTPUT COMPARE interrupt
 260 ;               vectors to this function.
 261 ;
 262 ; Arguments   : none
 263 ;
 264 ; Notes       :  1) The 'tick ISR' assumes the we are using the Output Compare specified by OS_TICK_OC
 265 ;                   (see APP_CFG.H and this file) to generate a tick that occurs every OS_TICK_OC_CNTS
 266 ;                   (see APP_CFG.H) which corresponds to the number of FRT (Free Running Timer)
 267 ;                   counts to the next interrupt.
 268 ;
 269 ;                2) All USER interrupts should be modeled EXACTLY like this where the only
 270 ;                   line to be modified is the call to your ISR_Handler and perhaps the call to
 271 ;                   the label name OSTickISR1.
 272 ;********************************************************************************************************
 273
 274 OSTickISR:
 275     ldaa   GPAGE                       ; Get current value of GPAGE register
 276     psha                               ; Push GPAGE register onto current task's stack
 277
 278     ldaa   EPAGE                       ; Get current value of EPAGE register
 279     psha                               ; Push EPAGE register onto current task's stack
 280
 281     ldaa   RPAGE                       ; Get current value of RPAGE register
 282     psha                               ; Push RPAGE register onto current task's stack
 283
 284     ldaa   PPAGE                       ; Get current value of PPAGE register
 285     psha                               ; Push PPAGE register onto current task's stack
 286
 287     ;bset   CRGFLG,#128                            ;CRGFLG |= 0x80, Clean CRG model Flag    add by cha0s
 288     bset   PIFJ,#64                                ;PIFJ=#64, Clean PTJ model Flag    add by cha0s
 289
 290     inc    OSIntNesting                ; Notify uC/OS-II about ISR
 291
 292     ldab   OSIntNesting                ; if (OSIntNesting == 1) {
 293     cmpb   #$01
 294     bne    OSTickISR1
 295
 296     ldy    OSTCBCur                    ;     OSTCBCur->OSTCBStkPtr = Stack Pointer
 297     sts    0,y                         ; }
 298
 299 OSTickISR1:
 300 ;   call   OSTickISR_Handler
 301     call    OSTimeTick
 302
 303 ;   cli                                ; Optionally enable interrupts to allow interrupt nesting
 304
 305     call   OSIntExit                   ; Notify uC/OS-II about end of ISR
 306
 307     pula                               ; Get value of PPAGE register
 308     staa   PPAGE                       ; Store into CPU's PPAGE register
 309
 310     pula                               ; Get value of RPAGE register
 311     staa   RPAGE                       ; Store into CPU's RPAGE register
 312
 313     pula                               ; Get value of EPAGE register
 314     staa   EPAGE                       ; Store into CPU's EPAGE register
 315
 316     pula                               ; Get value of GPAGE register
 317     staa   GPAGE                       ; Store into CPU's GPAGE register
 318
 319     rti                                ; Return from interrupt, no higher priority tasks ready.
 320