common: prevent buffer overflow
[supercollider.git] / include / common / MsgFifo.h
blob414a146045f5ab4e29055232fa22881ae3befb6a
1 /*
2 SuperCollider real time audio synthesis system
3 Copyright (c) 2002 James McCartney. All rights reserved.
4 http://www.audiosynth.com
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
21 #ifndef _MsgFifo_
22 #define _MsgFifo_
24 #ifdef __APPLE__
25 # include <libkern/OSAtomic.h>
26 #endif
28 #ifdef _WIN32
29 # include <windows.h>
30 #endif
32 /////////////////////////////////////////////////////////////////////
34 template <class MsgType, int N>
35 class MsgFifo
37 public:
38 MsgFifo()
39 : mReadHead(0), mWriteHead(0), mFreeHead(0)
42 void MakeEmpty() { mFreeHead = mReadHead = mWriteHead; }
43 bool IsEmpty() { return mReadHead == mWriteHead; }
44 bool HasData() { return mReadHead != mWriteHead; }
45 bool NeedsFree() { return mFreeHead != mReadHead; }
47 bool Write(MsgType& data)
49 unsigned int next = NextPos(mWriteHead);
50 if (next == mFreeHead) return false; // fifo is full
51 mItems[next] = data;
52 #ifdef __APPLE__
53 // we don't really need a compare and swap, but this happens to call
54 // the PowerPC memory barrier instruction lwsync.
55 OSAtomicCompareAndSwap32Barrier(mWriteHead, next, &mWriteHead);
56 #elif defined(_WIN32)
57 InterlockedExchange(reinterpret_cast<volatile LONG*>(&mWriteHead),next);
58 #else
59 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) && ( !defined(__INTEL_COMPILER) || defined(__ia64) )
60 __sync_synchronize();
61 #endif
62 mWriteHead = next;
63 #endif
64 return true;
67 void Perform() // get next and advance
69 while (HasData()) {
70 unsigned int next = NextPos(mReadHead);
71 mItems[next].Perform();
72 #ifdef __APPLE__
73 // we don't really need a compare and swap, but this happens to call
74 // the PowerPC memory barrier instruction lwsync.
75 OSAtomicCompareAndSwap32Barrier(mReadHead, next, &mReadHead);
76 #elif defined(_WIN32)
77 InterlockedExchange(reinterpret_cast<volatile LONG*>(&mReadHead),next);
78 #else
79 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) && ( !defined(__INTEL_COMPILER) || defined(__ia64) )
80 __sync_synchronize();
81 #endif
82 mReadHead = next;
83 #endif
86 void Free() // reclaim messages
88 while (NeedsFree()) {
89 unsigned int next = NextPos(mFreeHead);
90 mItems[next].Free();
91 #ifdef __APPLE__
92 // we don't really need a compare and swap, but this happens to call
93 // the PowerPC memory barrier instruction lwsync.
94 OSAtomicCompareAndSwap32Barrier(mFreeHead, next, &mFreeHead);
95 #elif defined(_WIN32)
96 InterlockedExchange(reinterpret_cast<volatile LONG*>(&mFreeHead),next);
97 #else
98 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) && ( !defined(__INTEL_COMPILER) || defined(__ia64) )
99 __sync_synchronize();
100 #endif
101 mFreeHead = next;
102 #endif
106 private:
107 int NextPos(int inPos) { return (inPos + 1) & (N - 1); }
109 #ifdef __APPLE__
110 int32_t mReadHead, mWriteHead, mFreeHead;
111 #else
112 volatile int mReadHead, mWriteHead, mFreeHead;
113 #endif
114 MsgType mItems[N];
117 /////////////////////////////////////////////////////////////////////
119 template <class MsgType, int N>
120 class MsgFifoNoFree
122 public:
123 MsgFifoNoFree()
124 : mReadHead(0), mWriteHead(0)
128 void MakeEmpty() { mReadHead = mWriteHead; }
129 bool IsEmpty() { return mReadHead == mWriteHead; }
130 bool HasData() { return mReadHead != mWriteHead; }
132 bool Write(MsgType& data)
134 unsigned int next = NextPos(mWriteHead);
135 if (next == mReadHead) return false; // fifo is full
136 mItems[next] = data;
137 #ifdef __APPLE__
138 // we don't really need a compare and swap, but this happens to call
139 // the PowerPC memory barrier instruction lwsync.
140 OSAtomicCompareAndSwap32Barrier(mWriteHead, next, &mWriteHead);
141 #elif defined(_WIN32)
142 InterlockedExchange(reinterpret_cast<volatile LONG*>(&mWriteHead),next);
143 #else
144 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) && ( !defined(__INTEL_COMPILER) || defined(__ia64) )
145 __sync_synchronize();
146 #endif
147 mWriteHead = next;
148 #endif
149 return true;
152 void Perform() // get next and advance
154 while (HasData()) {
155 unsigned int next = NextPos(mReadHead);
156 mItems[next].Perform();
157 #ifdef __APPLE__
158 // we don't really need a compare and swap, but this happens to call
159 // the PowerPC memory barrier instruction lwsync.
160 OSAtomicCompareAndSwap32Barrier(mReadHead, next, &mReadHead);
161 #elif defined(_WIN32)
162 InterlockedExchange(reinterpret_cast<volatile LONG*>(&mReadHead),next);
163 #else
164 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 1) && ( !defined(__INTEL_COMPILER) || defined(__ia64) )
165 __sync_synchronize();
166 #endif
167 mReadHead = next;
168 #endif
172 private:
173 int NextPos(int inPos) { return (inPos + 1) & (N - 1); }
174 #ifdef __APPLE__
175 int32_t mReadHead, mWriteHead;
176 #else
177 volatile int mReadHead, mWriteHead;
178 #endif
179 MsgType mItems[N];
182 /////////////////////////////////////////////////////////////////////
185 #endif