Merge branch 'master' into verilog-ams
[sverilog.git] / LineInfo.cc
blob5b43d95fd8ac6ce77a529f26a40a3b77052c898c
1 /*
2 * Copyright (c) 2000 Stephen Williams (steve@icarus.com)
4 * This source code is free software; you can redistribute it
5 * and/or modify it in source code form under the terms of the GNU
6 * General Public License as published by the Free Software
7 * Foundation; either version 2 of the License, or (at your option)
8 * any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
20 # include "config.h"
22 # include "LineInfo.h"
23 # include <sstream>
25 LineInfo::LineInfo()
26 : lineno_(0)
30 LineInfo::~LineInfo()
34 string LineInfo::get_fileline() const
36 ostringstream buf;
37 buf << (file_.str()? file_.str() : "") << ":" << lineno_;
39 string res = buf.str();
40 return res;
43 void LineInfo::set_line(const LineInfo&that)
45 file_ = that.file_;
46 lineno_ = that.lineno_;
49 void LineInfo::set_file(perm_string f)
51 file_ = f;
54 void LineInfo::set_lineno(unsigned n)
56 lineno_ = n;