Merge branch 'master' into verilog-ams
[sverilog.git] / PGenerate.h
blob842e0c49a8432b0116e5a4e9492dbf8b17a8bda3
1 #ifndef __PGenerate_H
2 #define __PGenerate_H
3 /*
4 * Copyright (c) 2006 Stephen Williams (steve@icarus.com)
6 * This source code is free software; you can redistribute it
7 * and/or modify it in source code form under the terms of the GNU
8 * General Public License as published by the Free Software
9 * Foundation; either version 2 of the License, or (at your option)
10 * any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
21 #ifdef HAVE_CVS_IDENT
22 #ident "$Id: PGenerate.h,v 1.4 2007/06/02 03:42:12 steve Exp $"
23 #endif
25 # include "LineInfo.h"
26 # include "StringHeap.h"
27 # include "HName.h"
28 # include <list>
29 # include <map>
30 # include "pform_types.h"
32 class Design;
33 class NetScope;
34 class PExpr;
35 class PProcess;
36 class PGate;
37 class PWire;
40 * This represents a generate scheme. The interpretation of the
41 * members depends on the scheme_type.
43 * GS_LOOP
45 * GS_CASE
46 * loop_test is the expression to be compared.
47 * generates contains only GS_CASE_ITEM schemes.
48 * GS_CASE_ITEM
49 * The parent points to the GS_CASE that contains this item.
50 * the loop_test is compared with the parent->loop_test expression.
52 class PGenerate : public LineInfo {
54 public:
55 PGenerate(unsigned id_number);
56 ~PGenerate();
58 // Generate schemes have an ID number, for when the scope is
59 // implicit.
60 const unsigned id_number;
61 perm_string scope_name;
63 enum scheme_t {GS_NONE, GS_LOOP, GS_CONDIT, GS_ELSE,
64 GS_CASE, GS_CASE_ITEM};
65 scheme_t scheme_type;
67 // generate loops have an index variable and three
68 // expressions: for (index = <init>; <test>; index=<step>)
69 perm_string loop_index;
70 PExpr*loop_init;
71 PExpr*loop_test;
72 PExpr*loop_step;
74 map<perm_string,PWire*>wires;
75 PWire* get_wire(perm_string name) const;
77 list<PGate*> gates;
78 void add_gate(PGate*);
80 list<PProcess*> behaviors;
81 void add_behavior(PProcess*behave);
83 list<PGenerate*> generates;
84 PGenerate*parent;
86 // This method is called by the elaboration of a module to
87 // generate scopes. the container is the scope that is to
88 // contain the generated scope.
89 bool generate_scope(Design*des, NetScope*container);
91 // Elaborate signals within any of the generated scopes that
92 // were made by this generate block within the given container scope.
93 bool elaborate_sig(Design*des, NetScope*container) const;
94 bool elaborate(Design*des, NetScope*container) const;
96 void dump(ostream&out, unsigned indent) const;
98 private:
99 bool generate_scope_loop_(Design*des, NetScope*container);
100 bool generate_scope_condit_(Design*des, NetScope*container, bool else_flag);
101 bool generate_scope_case_(Design*des, NetScope*container);
103 // Elaborate_scope within a generated scope.
104 void elaborate_subscope_(Design*des, NetScope*scope);
106 // These are the scopes created by generate_scope.
107 list<NetScope*>scope_list_;
108 // internal function called on each scope generated by this scheme.
109 bool elaborate_sig_(Design*des, NetScope*scope) const;
110 bool elaborate_(Design*des, NetScope*scope) const;
112 private: // not implemented
113 PGenerate(const PGenerate&);
114 PGenerate& operator= (const PGenerate&);
117 #endif