4 * Copyright (c) 2008 Stephen Williams (steve@icarus.com)
6 * This source code is free software; you can redistribute it
7 * and/or modify it in source code form under the terms of the GNU
8 * General Public License as published by the Free Software
9 * Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
22 # include "StringHeap.h"
23 # include "pform_types.h"
34 * The PScope class is a base representation of an object that
35 * represents lexical scope. For example, a module, a function/task, a
36 * named block is derived from a PScope.
38 * NOTE: This is note the same concept as the "scope" of an elaborated
39 * hierarchy. That is represented by NetScope objects after elaboration.
44 // When created, a scope has a name and a parent. The name is
45 // the name of the definition. For example, if this is a
46 // module declaration, the name is the name after the "module"
47 // keyword, and if this is a task scope, the name is the task
48 // name. The parent is the lexical parent of this scope. Since
49 // modules do not nest in Verilog, the parent must be nil for
50 // modules. Scopes for tasks and functions point to their
52 PScope(perm_string name
, PScope
*parent
);
55 perm_string
pscope_name() const { return name_
; }
56 PScope
* pscope_parent() { return parent_
; }
58 // Nets an variables (wires) in the scope
59 map
<perm_string
,PWire
*>wires
;
60 PWire
* wires_find(perm_string name
);
62 // Named events in the scope.
63 map
<perm_string
,PEvent
*>events
;
65 // Behaviors (processes) in this scope
66 list
<PProcess
*> behaviors
;
69 void dump_wires_(ostream
&out
, unsigned indent
) const;
71 bool elaborate_sig_wires_(Design
*des
, NetScope
*scope
) const;
73 bool elaborate_behaviors_(Design
*des
, NetScope
*scope
) const;