4 * Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
6 * This source code is free software; you can redistribute it
7 * and/or modify it in source code form under the terms of the GNU
8 * General Public License as published by the Free Software
9 * Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
26 # include "Statement.h"
33 # include "discipline.h"
40 * These classes implement the parsed form (P-form for short) of the
41 * original Verilog source. the parser generates the pform for the
42 * convenience of later processing steps.
47 * Wire objects represent the named wires (of various flavor) declared
50 * Gate objects are the functional modules that are connected together
53 * Wires and gates, connected by joints, represent a netlist. The
54 * netlist is therefore a representation of the desired circuit.
62 * The min:typ:max expression s selected at parse time using the
63 * enumeration. When the compiler makes a choice, it also prints a
64 * warning if min_typ_max_warn > 0.
66 extern enum MIN_TYP_MAX
{ MIN
, TYP
, MAX
} min_typ_max_flag
;
67 extern unsigned min_typ_max_warn
;
68 PExpr
* pform_select_mtm_expr(PExpr
*min
, PExpr
*typ
, PExpr
*max
);
71 * This flag is true if the lexor thinks we are in a library source
74 extern bool pform_library_flag
;
77 * These type are lexical types -- that is, types that are used as
78 * lexical values to decorate the parse tree during parsing. They are
79 * not in any way preserved once parsing is done.
82 /* This is information about port name information for named port
85 //typedef struct named<PExpr*> named_pexpr_t;
86 typedef named
<PExpr
*> named_pexpr_t
;
89 svector
<PExpr
*>*by_order
;
90 svector
<named_pexpr_t
*>*by_name
;
93 struct str_pair_t
{ PGate::strength_t str0
, str1
; };
95 struct net_decl_assign_t
{
98 struct net_decl_assign_t
*next
;
101 /* The lgate is gate instantiation information. */
104 : parms(0), parms_by_name(0), lineno(0)
110 svector
<PExpr
*>*parms
;
111 svector
<named_pexpr_t
*>*parms_by_name
;
120 /* The lexor calls this function to change the default nettype. */
121 extern void pform_set_default_nettype(NetNet::Type net
,
126 * Look for the given wire in the current lexical scope. If the wire
127 * (including variables of any type) cannot be found in the current
128 * scope, then return 0.
130 extern PWire
* pform_get_wire_in_scope(perm_string name
);
133 * The parser uses startmodule and endmodule together to build up a
134 * module as it parses it. The startmodule tells the pform code that a
135 * module has been noticed in the source file and the following events
136 * are to apply to the scope of that module. The endmodule causes the
137 * pform to close up and finish the named module.
139 extern void pform_startmodule(const char*, const char*file
, unsigned lineno
,
140 svector
<named_pexpr_t
*>*attr
);
141 extern void pform_module_set_ports(svector
<Module::port_t
*>*);
143 /* This function is used to support the port definition in a
144 port_definition_list. In this case, we have everything needed to
145 define the port, all in one place. */
146 extern void pform_module_define_port(const struct vlltype
&li
,
151 svector
<PExpr
*>*range
,
152 svector
<named_pexpr_t
*>*attr
);
154 extern Module::port_t
* pform_module_port_reference(perm_string name
,
157 extern void pform_endmodule(const char*);
159 extern void pform_make_udp(perm_string name
, list
<perm_string
>*parms
,
160 svector
<PWire
*>*decl
, list
<string
>*table
,
162 const char*file
, unsigned lineno
);
164 extern void pform_make_udp(perm_string name
,
165 bool sync_flag
, perm_string out_name
,
167 list
<perm_string
>*parms
,
169 const char*file
, unsigned lineno
);
172 * Enter/exit name scopes. The push_scope function pushes the scope
173 * name string onto the scope hierarchy. The pop pulls it off and
174 * deletes it. Thus, the string pushed must be allocated.
176 extern void pform_pop_scope();
178 extern PTask
*pform_push_task_scope(char*name
);
179 extern PFunction
*pform_push_function_scope(char*name
);
180 extern PBlock
*pform_push_block_scope(char*name
, PBlock::BL_TYPE tt
);
183 extern verinum
* pform_verinum_with_size(verinum
*s
, verinum
*val
,
184 const char*file
, unsigned lineno
);
187 * This function takes the list of names as new genvars to declare in
188 * the current module scope.
190 extern void pform_genvars(const struct vlltype
&li
, list
<perm_string
>*names
);
192 extern void pform_start_generate_for(const struct vlltype
&li
,
198 extern void pform_start_generate_if(const struct vlltype
&li
, PExpr
*test
);
199 extern void pform_start_generate_else(const struct vlltype
&li
);
200 extern void pform_start_generate_case(const struct vlltype
&lp
, PExpr
*test
);
201 extern void pform_generate_case_item(const struct vlltype
&lp
, PExpr
*test
);
202 extern void pform_generate_block_name(char*name
);
203 extern void pform_endgenerate();
207 * The makewire functions announce to the pform code new wires. These
208 * go into a module that is currently opened.
210 extern void pform_makewire(const struct vlltype
&li
, perm_string name
,
214 svector
<named_pexpr_t
*>*attr
);
216 /* This form handles simple declarations */
217 extern void pform_makewire(const struct vlltype
&li
,
218 svector
<PExpr
*>*range
,
220 list
<perm_string
>*names
,
224 svector
<named_pexpr_t
*>*attr
,
225 PWSRType rt
= SR_NET
);
227 /* This form handles assignment declarations. */
228 extern void pform_makewire(const struct vlltype
&li
,
229 svector
<PExpr
*>*range
,
231 svector
<PExpr
*>*delay
,
233 net_decl_assign_t
*assign_list
,
235 ivl_variable_type_t
);
237 extern void pform_make_reginit(const struct vlltype
&li
,
238 perm_string name
, PExpr
*expr
);
240 /* Look up the names of the wires, and set the port type,
241 i.e. input, output or inout. If the wire does not exist, create
242 it. The second form takes a single name. */
243 extern void pform_set_port_type(const struct vlltype
&li
,
244 list
<perm_string
>*names
,
245 svector
<PExpr
*>*range
,
248 extern void pform_set_port_type(perm_string nm
, NetNet::PortType pt
,
249 const char*file
, unsigned lineno
);
251 extern void pform_set_net_range(list
<perm_string
>*names
,
255 PWSRType rt
= SR_NET
);
256 extern void pform_set_reg_idx(perm_string name
, PExpr
*l
, PExpr
*r
);
257 extern void pform_set_reg_integer(list
<perm_string
>*names
);
258 extern void pform_set_reg_time(list
<perm_string
>*names
);
260 /* pform_set_attrib and pform_set_type_attrib exist to support the
261 $attribute syntax, which can only set string values to
262 attributes. The functions keep the value strings that are
264 extern void pform_set_attrib(perm_string name
, perm_string key
,
266 extern void pform_set_type_attrib(perm_string name
, const string
&key
,
269 extern Module::range_t
* pform_parameter_value_range(bool exclude_flag
,
270 bool low_open
, PExpr
*low_expr
,
271 bool hig_open
, PExpr
*hig_expr
);
273 extern void pform_set_parameter(const struct vlltype
&loc
,
275 ivl_variable_type_t type
,
277 svector
<PExpr
*>*range
,
278 PExpr
*expr
, Module::range_t
*value_range
);
279 extern void pform_set_localparam(const struct vlltype
&loc
,
281 ivl_variable_type_t type
,
283 svector
<PExpr
*>*range
,
285 extern void pform_set_defparam(const pform_name_t
&name
, PExpr
*expr
);
288 * Functions related to specify blocks.
290 extern void pform_set_specparam(perm_string name
, PExpr
*expr
);
292 extern PSpecPath
*pform_make_specify_path(const struct vlltype
&li
,
293 list
<perm_string
>*src
, char pol
,
294 bool full_flag
, list
<perm_string
>*dst
);
295 extern PSpecPath
*pform_make_specify_edge_path(const struct vlltype
&li
,
296 int edge_flag
, /*posedge==true */
297 list
<perm_string
>*src
, char pol
,
298 bool full_flag
, list
<perm_string
>*dst
,
299 PExpr
*data_source_expression
);
300 extern PSpecPath
*pform_assign_path_delay(PSpecPath
*obj
, svector
<PExpr
*>*delays
);
302 extern void pform_module_specify_path(PSpecPath
*obj
);
305 * pform_make_behavior creates processes that are declared with always
308 extern PProcess
* pform_make_behavior(PProcess::Type
, Statement
*,
309 svector
<named_pexpr_t
*>*attr
);
311 extern svector
<PWire
*>* pform_make_udp_input_ports(list
<perm_string
>*);
313 extern bool pform_expression_is_constant(const PExpr
*);
315 extern void pform_make_events(list
<perm_string
>*names
,
316 const char*file
, unsigned lineno
);
318 * Make real datum objects.
320 extern void pform_make_reals(list
<perm_string
>*names
,
321 const char*file
, unsigned lineno
);
324 * The makegate function creates a new gate (which need not have a
325 * name) and connects it to the specified wires.
327 extern void pform_makegates(PGBuiltin::Type type
,
328 struct str_pair_t str
,
329 svector
<PExpr
*>*delay
,
330 svector
<lgate
>*gates
,
331 svector
<named_pexpr_t
*>*attr
);
333 extern void pform_make_modgates(perm_string type
,
334 struct parmvalue_t
*overrides
,
335 svector
<lgate
>*gates
);
337 /* Make a continuous assignment node, with optional bit- or part- select. */
338 extern void pform_make_pgassign_list(svector
<PExpr
*>*alist
,
340 struct str_pair_t str
,
341 const char* fn
, unsigned lineno
);
343 /* Given a port type and a list of names, make a list of wires that
344 can be used as task port information. */
345 extern svector
<PWire
*>*pform_make_task_ports(NetNet::PortType pt
,
346 ivl_variable_type_t vtype
,
348 svector
<PExpr
*>*range
,
349 list
<perm_string
>*names
,
355 * These are functions that the outside-the-parser code uses the do
356 * interesting things to the Verilog. The parse function reads and
357 * parses the source file and places all the modules it finds into the
358 * mod list. The dump function dumps a module to the output stream.
360 extern void pform_dump(ostream
&out
, Module
*mod
);
363 * Used to report the original module location when a nested module
364 * (missing endmodule) is found by the parser.
366 extern void pform_error_nested_modules();
368 /* ** pform_discipline.cc
369 * Functions for handling the parse of natures and disciplines. These
370 * functions are in pform_disciplines.cc
374 extern void pform_start_nature(const char*name
);
375 extern void pform_end_nature(const struct vlltype
&loc
);
377 extern void pform_nature_access(const struct vlltype
&loc
, const char*name
);
379 extern void pform_start_discipline(const char*name
);
380 extern void pform_end_discipline(const struct vlltype
&loc
);
382 extern void pform_discipline_domain(const struct vlltype
&loc
, ddomain_t use_domain
);
383 extern void pform_discipline_potential(const struct vlltype
&loc
, const char*name
);
384 extern void pform_discipline_flow(const struct vlltype
&loc
, const char*name
);
386 extern void pform_attach_discipline(const struct vlltype
&loc
,
387 discipline_t
*discipline
, list
<perm_string
>*names
);
389 extern void pform_dump(ostream
&out
, const nature_t
*);
390 extern void pform_dump(ostream
&out
, const discipline_t
*);