Merge branch 'master' into verilog-ams
[sverilog.git] / pform_dump.cc
blobc3e709ad484e099d8e8e4ef28479a526d74699eb
1 /*
2 * Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
4 * This source code is free software; you can redistribute it
5 * and/or modify it in source code form under the terms of the GNU
6 * General Public License as published by the Free Software
7 * Foundation; either version 2 of the License, or (at your option)
8 * any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
20 # include "config.h"
23 * This file provides the pform_dump function, that dumps the module
24 * passed as a parameter. The dump is as much as possible in Verilog
25 * syntax, so that a human can tell that it really does describe the
26 * module in question.
28 # include "pform.h"
29 # include "PEvent.h"
30 # include "PGenerate.h"
31 # include "PSpec.h"
32 # include "discipline.h"
33 # include <iostream>
34 # include <iomanip>
35 # include <typeinfo>
37 ostream& operator << (ostream&out, const PExpr&obj)
39 obj.dump(out);
40 return out;
43 ostream& operator << (ostream&o, const PDelays&d)
45 d.dump_delays(o);
46 return o;
49 ostream& operator<< (ostream&o, PGate::strength_t str)
51 switch (str) {
52 case PGate::HIGHZ:
53 o << "highz";
54 break;
55 case PGate::WEAK:
56 o << "weak";
57 break;
58 case PGate::PULL:
59 o << "pull";
60 break;
61 case PGate::STRONG:
62 o << "strong";
63 break;
64 case PGate::SUPPLY:
65 o << "supply";
66 break;
67 default:
68 assert(0);
70 return o;
73 ostream& operator<< (ostream&out, perm_string that)
75 out << that.str();
76 return out;
79 ostream& operator<< (ostream&out, const index_component_t&that)
81 out << "[";
82 switch (that.sel) {
83 case index_component_t::SEL_BIT:
84 out << *that.msb;
85 break;
86 case index_component_t::SEL_PART:
87 out << *that.msb << ":" << *that.lsb;
88 break;
89 case index_component_t::SEL_IDX_UP:
90 out << *that.msb << "+:" << *that.lsb;
91 break;
92 case index_component_t::SEL_IDX_DO:
93 out << *that.msb << "-:" << *that.lsb;
94 break;
95 default:
96 out << "???";
97 break;
99 out << "]";
100 return out;
103 ostream& operator<< (ostream&out, const name_component_t&that)
105 out << that.name.str();
107 typedef std::list<index_component_t>::const_iterator index_it_t;
108 for (index_it_t idx = that.index.begin()
109 ; idx != that.index.end() ; idx++) {
111 out << *idx;
113 return out;
116 ostream& operator<< (ostream&o, const pform_name_t&that)
118 pform_name_t::const_iterator cur;
120 cur = that.begin();
121 o << *cur;
123 cur++;
124 while (cur != that.end()) {
125 o << "." << *cur;
126 cur++;
129 return o;
133 std::ostream& operator << (std::ostream&out, ddomain_t dom)
135 switch (dom) {
136 case DD_NONE:
137 out << "no-domain";
138 break;
139 case DD_DISCRETE:
140 out << "discrete";
141 break;
142 case DD_CONTINUOUS:
143 out << "continuous";
144 break;
145 default:
146 assert(0);
147 break;
149 return out;
152 void PExpr::dump(ostream&out) const
154 out << typeid(*this).name();
157 void PEConcat::dump(ostream&out) const
159 if (repeat_)
160 out << "{" << *repeat_;
162 if (parms_.count() == 0) {
163 out << "{}";
164 return;
167 out << "{";
168 if (parms_[0]) out << *parms_[0];
169 for (unsigned idx = 1 ; idx < parms_.count() ; idx += 1) {
170 out << ", ";
171 if (parms_[idx]) out << *parms_[idx];
174 out << "}";
176 if (repeat_) out << "}";
179 void PECallFunction::dump(ostream &out) const
181 out << path_ << "(";
183 if (parms_.count() > 0) {
184 if (parms_[0]) parms_[0]->dump(out);
185 for (unsigned idx = 1; idx < parms_.count(); ++idx) {
186 out << ", ";
187 if (parms_[idx]) parms_[idx]->dump(out);
190 out << ")";
193 void PEEvent::dump(ostream&out) const
195 switch (type_) {
196 case PEEvent::ANYEDGE:
197 break;
198 case PEEvent::POSEDGE:
199 out << "posedge ";
200 break;
201 case PEEvent::NEGEDGE:
202 out << "negedge ";
203 break;
204 case PEEvent::POSITIVE:
205 out << "positive ";
206 break;
208 out << *expr_;
212 void PEFNumber::dump(ostream &out) const
214 out << value();
217 void PENumber::dump(ostream&out) const
219 out << value();
222 void PEIdent::dump(ostream&out) const
224 out << path_;
227 void PEString::dump(ostream&out) const
229 out << "\"" << text_ << "\"";
232 void PETernary::dump(ostream&out) const
234 out << "(" << *expr_ << ")?(" << *tru_ << "):(" << *fal_ << ")";
237 void PEUnary::dump(ostream&out) const
239 switch (op_) {
240 case 'm':
241 out << "abs";
242 break;
243 default:
244 out << op_;
245 break;
247 out << "(" << *expr_ << ")";
250 void PEBinary::dump(ostream&out) const
252 /* Handle some special cases, where the operators are written
253 in function notation. */
254 if (op_ == 'm') {
255 out << "min(" << *left_ << "," << *right_ << ")";
256 return;
258 if (op_ == 'M') {
259 out << "min(" << *left_ << "," << *right_ << ")";
260 return;
263 out << "(" << *left_ << ")";
264 switch (op_) {
265 case 'a':
266 out << "&&";
267 break;
268 case 'e':
269 out << "==";
270 break;
271 case 'E':
272 out << "===";
273 break;
274 case 'l':
275 out << "<<";
276 break;
277 case 'n':
278 out << "!=";
279 break;
280 case 'N':
281 out << "!==";
282 break;
283 case 'R':
284 out << ">>>";
285 break;
286 case 'r':
287 out << ">>";
288 break;
289 default:
290 out << op_;
291 break;
293 out << "(" << *right_ << ")";
297 void PWire::dump(ostream&out, unsigned ind) const
299 out << setw(ind) << "" << type_;
301 switch (port_type_) {
302 case NetNet::PIMPLICIT:
303 out << " implicit input";
304 break;
305 case NetNet::PINPUT:
306 out << " input";
307 break;
308 case NetNet::POUTPUT:
309 out << " output";
310 break;
311 case NetNet::PINOUT:
312 out << " inout";
313 break;
314 case NetNet::NOT_A_PORT:
315 break;
318 out << " " << data_type_;
320 if (signed_) {
321 out << " signed";
324 if (discipline_) {
325 out << " discipline<" << discipline_->name() << ">";
328 if (port_set_) {
329 if (port_msb_ == 0) {
330 out << " port<scalar>";
331 } else {
332 out << " port[" << *port_msb_ << ":" << *port_lsb_ << "]";
335 if (net_set_) {
336 if (net_msb_ == 0) {
337 out << " net<scalar>";
338 } else {
339 out << " net[" << *net_msb_ << ":" << *net_lsb_ << "]";
343 out << " " << name_;
345 // If the wire has indices, dump them.
346 if (lidx_ || ridx_) {
347 out << "[";
348 if (lidx_) out << *lidx_;
349 if (ridx_) out << ":" << *ridx_;
350 out << "]";
353 out << ";" << endl;
354 for (map<perm_string,PExpr*>::const_iterator idx = attributes.begin()
355 ; idx != attributes.end()
356 ; idx ++) {
357 out << " " << (*idx).first;
358 if ((*idx).second)
359 out << " = " << *(*idx).second;
360 out << endl;
364 void PGate::dump_pins(ostream&out) const
366 if (pin_count()) {
367 if (pin(0)) out << *pin(0);
369 for (unsigned idx = 1 ; idx < pin_count() ; idx += 1) {
370 out << ", ";
371 if (pin(idx)) out << *pin(idx);
376 void PDelays::dump_delays(ostream&out) const
378 if (delay_[0] && delay_[1] && delay_[2])
379 out << "#(" << *delay_[0] << "," << *delay_[1] << "," <<
380 *delay_[2] << ")";
381 else if (delay_[0])
382 out << "#" << *delay_[0];
383 else
384 out << "#0";
388 void PGate::dump_delays(ostream&out) const
390 delay_.dump_delays(out);
393 void PGate::dump(ostream&out, unsigned ind) const
395 out << setw(ind) << "" << typeid(*this).name() << " ";
396 delay_.dump_delays(out);
397 out << " " << get_name() << "(";
398 dump_pins(out);
399 out << ");" << endl;
403 void PGAssign::dump(ostream&out, unsigned ind) const
405 out << setw(ind) << "";
406 out << "assign (" << strength0() << "0 " << strength1() << "1) ";
407 dump_delays(out);
408 out << " " << *pin(0) << " = " << *pin(1) << ";" << endl;
411 void PGBuiltin::dump(ostream&out, unsigned ind) const
413 out << setw(ind) << "";
414 switch (type()) {
415 case PGBuiltin::BUFIF0:
416 out << "bufif0 ";
417 break;
418 case PGBuiltin::BUFIF1:
419 out << "bufif1 ";
420 break;
421 case PGBuiltin::NOTIF0:
422 out << "bufif0 ";
423 break;
424 case PGBuiltin::NOTIF1:
425 out << "bufif1 ";
426 break;
427 case PGBuiltin::NAND:
428 out << "nand ";
429 break;
430 case PGBuiltin::NMOS:
431 out << "nmos ";
432 break;
433 case PGBuiltin::RNMOS:
434 out << "rnmos ";
435 break;
436 case PGBuiltin::RPMOS:
437 out << "rpmos ";
438 break;
439 case PGBuiltin::PMOS:
440 out << "pmos ";
441 break;
442 case PGBuiltin::RCMOS:
443 out << "rcmos ";
444 break;
445 case PGBuiltin::CMOS:
446 out << "cmos ";
447 break;
448 default:
449 out << "builtin gate ";
452 out << "(" << strength0() << "0 " << strength1() << "1) ";
453 dump_delays(out);
454 out << " " << get_name();
456 if (msb_) {
457 out << " [" << *msb_ << ":" << *lsb_ << "]";
460 out << "(";
461 dump_pins(out);
462 out << ");" << endl;
465 void PGModule::dump(ostream&out, unsigned ind) const
467 out << setw(ind) << "" << type_ << " ";
469 // If parameters are overridden by order, dump them.
470 if (overrides_ && overrides_->count() > 0) {
471 assert(parms_ == 0);
472 out << "#(";
474 if ((*overrides_)[0] == 0)
475 out << "<nil>";
476 else
477 out << *((*overrides_)[0]);
478 for (unsigned idx = 1 ; idx < overrides_->count() ; idx += 1) {
479 out << "," << *((*overrides_)[idx]);
481 out << ") ";
484 // If parameters are overridden by name, dump them.
485 if (parms_) {
486 assert(overrides_ == 0);
487 out << "#(";
488 out << "." << parms_[0].name << "(" << *parms_[0].parm << ")";
489 for (unsigned idx = 1 ; idx < nparms_ ; idx += 1) {
490 out << ", ." << parms_[idx].name << "(" <<
491 *parms_[idx].parm << ")";
493 out << ") ";
496 out << get_name();
498 // If the module is arrayed, print the index expressions.
499 if (msb_ || lsb_) {
500 out << "[";
501 if (msb_) out << *msb_;
502 out << ":";
503 if (lsb_) out << *lsb_;
504 out << "]";
507 out << "(";
508 if (pins_) {
509 out << "." << pins_[0].name << "(";
510 if (pins_[0].parm) out << *pins_[0].parm;
511 out << ")";
512 for (unsigned idx = 1 ; idx < npins_ ; idx += 1) {
513 out << ", ." << pins_[idx].name << "(";
514 if (pins_[idx].parm)
515 out << *pins_[idx].parm;
516 out << ")";
518 } else {
519 dump_pins(out);
521 out << ");" << endl;
524 void Statement::dump(ostream&out, unsigned ind) const
526 /* I give up. I don't know what type this statement is,
527 so just print the C++ typeid and let the user figure
528 it out. */
529 out << setw(ind) << "";
530 out << "/* " << get_fileline() << ": " << typeid(*this).name()
531 << " */ ;" << endl;
534 void PAssign::dump(ostream&out, unsigned ind) const
536 out << setw(ind) << "";
537 out << *lval() << " = " << delay_ << " " << *rval() << ";";
538 out << " /* " << get_fileline() << " */" << endl;
541 void PAssignNB::dump(ostream&out, unsigned ind) const
543 out << setw(ind) << "";
544 out << *lval() << " <= " << delay_ << " " << *rval() << ";";
545 out << " /* " << get_fileline() << " */" << endl;
548 void PBlock::dump(ostream&out, unsigned ind) const
550 out << setw(ind) << "" << "begin";
551 if (pscope_name() != 0)
552 out << " : " << pscope_name();
553 out << endl;
555 if (pscope_name() != 0)
556 dump_wires_(out, ind+2);
558 for (unsigned idx = 0 ; idx < list_.count() ; idx += 1) {
559 if (list_[idx])
560 list_[idx]->dump(out, ind+2);
561 else
562 out << setw(ind+2) << "" << "/* NOOP */ ;" << endl;
565 out << setw(ind) << "" << "end" << endl;
568 void PCallTask::dump(ostream&out, unsigned ind) const
570 out << setw(ind) << "" << path_;
572 if (parms_.count() > 0) {
573 out << "(";
574 if (parms_[0])
575 out << *parms_[0];
577 for (unsigned idx = 1 ; idx < parms_.count() ; idx += 1) {
578 out << ", ";
579 if (parms_[idx])
580 out << *parms_[idx];
582 out << ")";
585 out << "; /* " << get_fileline() << " */" << endl;
588 void PCase::dump(ostream&out, unsigned ind) const
590 out << setw(ind) << "";
591 switch (type_) {
592 case NetCase::EQ:
593 out << "case";
594 break;
595 case NetCase::EQX:
596 out << "casex";
597 break;
598 case NetCase::EQZ:
599 out << "casez";
600 break;
602 out << " (" << *expr_ << ") /* " << get_fileline() << " */" << endl;
604 for (unsigned idx = 0 ; idx < items_->count() ; idx += 1) {
605 PCase::Item*cur = (*items_)[idx];
607 if (cur->expr.count() == 0) {
608 out << setw(ind+2) << "" << "default:";
610 } else {
611 out << setw(ind+2) << "" << *cur->expr[0];
613 for(unsigned e = 1 ; e < cur->expr.count() ; e += 1)
614 out << ", " << *cur->expr[e];
616 out << ":";
619 if (cur->stat) {
620 out << endl;
621 cur->stat->dump(out, ind+6);
622 } else {
623 out << " ;" << endl;
627 out << setw(ind) << "" << "endcase" << endl;
630 void PCondit::dump(ostream&out, unsigned ind) const
632 out << setw(ind) << "" << "if (" << *expr_ << ")" << endl;
633 if (if_)
634 if_->dump(out, ind+3);
635 else
636 out << setw(ind) << ";" << endl;
637 if (else_) {
638 out << setw(ind) << "" << "else" << endl;
639 else_->dump(out, ind+3);
643 void PCAssign::dump(ostream&out, unsigned ind) const
645 out << setw(ind) << "" << "assign " << *lval_ << " = " << *expr_
646 << "; /* " << get_fileline() << " */" << endl;
649 void PDeassign::dump(ostream&out, unsigned ind) const
651 out << setw(ind) << "" << "deassign " << *lval_ << "; /* "
652 << get_fileline() << " */" << endl;
655 void PDelayStatement::dump(ostream&out, unsigned ind) const
657 out << setw(ind) << "" << "#" << *delay_ << " /* " <<
658 get_fileline() << " */";
659 if (statement_) {
660 out << endl;
661 statement_->dump(out, ind+2);
662 } else {
663 out << " /* noop */;" << endl;
667 void PDisable::dump(ostream&out, unsigned ind) const
669 out << setw(ind) << "" << "disable " << scope_ << "; /* "
670 << get_fileline() << " */" << endl;
673 void PEventStatement::dump(ostream&out, unsigned ind) const
675 if (expr_.count() == 0) {
676 out << setw(ind) << "" << "@* ";
678 } else {
679 out << setw(ind) << "" << "@(" << *(expr_[0]);
680 if (expr_.count() > 1)
681 for (unsigned idx = 1 ; idx < expr_.count() ; idx += 1)
682 out << " or " << *(expr_[idx]);
684 out << ")";
687 if (statement_) {
688 out << endl;
689 statement_->dump(out, ind+2);
690 } else {
691 out << " ;" << endl;
695 void PForce::dump(ostream&out, unsigned ind) const
697 out << setw(ind) << "" << "force " << *lval_ << " = " << *expr_
698 << "; /* " << get_fileline() << " */" << endl;
701 void PForever::dump(ostream&out, unsigned ind) const
703 out << setw(ind) << "" << "forever /* " << get_fileline() << " */" << endl;
704 statement_->dump(out, ind+3);
707 void PForStatement::dump(ostream&out, unsigned ind) const
709 out << setw(ind) << "" << "for (" << *name1_ << " = " << *expr1_
710 << "; " << *cond_ << "; " << *name2_ << " = " << *expr2_ <<
711 ")" << endl;
712 statement_->dump(out, ind+3);
715 void PFunction::dump(ostream&out, unsigned ind) const
717 out << setw(ind) << "" << "function ";
718 switch (return_type_.type) {
719 case PTF_NONE:
720 out << "?none? ";
721 break;
722 case PTF_REG:
723 out << "reg ";
724 break;
725 case PTF_REG_S:
726 out << "reg_s ";
727 break;
728 case PTF_INTEGER:
729 out << "integer ";
730 break;
731 case PTF_REAL:
732 out << "real ";
733 break;
734 case PTF_REALTIME:
735 out << "realtime ";
736 break;
737 case PTF_TIME:
738 out << "time ";
739 break;
742 if (return_type_.range) {
743 out << "[";
744 out << "] ";
747 out << pscope_name() << ";" << endl;
749 if (ports_)
750 for (unsigned idx = 0 ; idx < ports_->count() ; idx += 1) {
751 out << setw(ind) << "";
752 out << "input ";
753 out << (*ports_)[idx]->basename() << ";" << endl;
756 dump_wires_(out, ind);
758 if (statement_)
759 statement_->dump(out, ind);
760 else
761 out << setw(ind) << "" << "/* NOOP */" << endl;
764 void PRelease::dump(ostream&out, unsigned ind) const
766 out << setw(ind) << "" << "release " << *lval_ << "; /* "
767 << get_fileline() << " */" << endl;
770 void PRepeat::dump(ostream&out, unsigned ind) const
772 out << setw(ind) << "" << "repeat (" << *expr_ << ")" << endl;
773 statement_->dump(out, ind+3);
776 void PTask::dump(ostream&out, unsigned ind) const
778 if (ports_)
779 for (unsigned idx = 0 ; idx < ports_->count() ; idx += 1) {
780 out << setw(ind) << "";
781 switch ((*ports_)[idx]->get_port_type()) {
782 case NetNet::PINPUT:
783 out << "input ";
784 break;
785 case NetNet::POUTPUT:
786 out << "output ";
787 break;
788 case NetNet::PINOUT:
789 out << "inout ";
790 break;
791 default:
792 assert(0);
793 break;
795 out << (*ports_)[idx]->basename() << ";" << endl;
798 dump_wires_(out, ind);
800 if (statement_)
801 statement_->dump(out, ind);
802 else
803 out << setw(ind) << "" << "/* NOOP */" << endl;
806 void PTrigger::dump(ostream&out, unsigned ind) const
808 out << setw(ind) << "" << "-> " << event_ << ";" << endl;
811 void PWhile::dump(ostream&out, unsigned ind) const
813 out << setw(ind) << "" << "while (" << *cond_ << ")" << endl;
814 statement_->dump(out, ind+3);
817 void PProcess::dump(ostream&out, unsigned ind) const
819 switch (type_) {
820 case PProcess::PR_INITIAL:
821 out << setw(ind) << "" << "initial";
822 break;
823 case PProcess::PR_ALWAYS:
824 out << setw(ind) << "" << "always";
825 break;
828 out << " /* " << get_fileline() << " */" << endl;
830 for (map<perm_string,PExpr*>::const_iterator idx = attributes.begin()
831 ; idx != attributes.end() ; idx++ ) {
833 out << setw(ind+2) << "" << "(* " << (*idx).first;
834 if ((*idx).second) {
835 out << " = " << *(*idx).second;
837 out << " *)" << endl;
840 statement_->dump(out, ind+2);
843 void PSpecPath::dump(std::ostream&out, unsigned ind) const
845 out << setw(ind) << "" << "specify path ";
847 if (condition)
848 out << "if (" << *condition << ") ";
850 out << "(";
851 if (edge) {
852 if (edge > 0)
853 out << "posedge ";
854 else
855 out << "negedge ";
858 for (unsigned idx = 0 ; idx < src.size() ; idx += 1) {
859 if (idx > 0) out << ", ";
860 assert(src[idx]);
861 out << src[idx];
864 out << " => ";
866 if (data_source_expression)
867 out << "(";
869 for (unsigned idx = 0 ; idx < dst.size() ; idx += 1) {
870 if (idx > 0) out << ", ";
871 assert(dst[idx]);
872 out << dst[idx];
875 if (data_source_expression)
876 out << " : " << *data_source_expression << ")";
878 out << ") = (";
879 for (unsigned idx = 0 ; idx < delays.size() ; idx += 1) {
880 if (idx > 0) out << ", ";
881 assert(delays[idx]);
882 out << *delays[idx];
884 out << ");" << endl;
887 void PGenerate::dump(ostream&out, unsigned indent) const
889 out << setw(indent) << "" << "generate(" << id_number << ")";
891 switch (scheme_type) {
892 case GS_NONE:
893 break;
894 case GS_LOOP:
895 out << " for ("
896 << loop_index
897 << "=" << *loop_init
898 << "; " << *loop_test
899 << "; " << loop_index
900 << "=" << *loop_step << ")";
901 break;
902 case GS_CONDIT:
903 out << " if (" << *loop_test << ")";
904 break;
905 case GS_ELSE:
906 out << " else !(" << *loop_test << ")";
907 break;
908 case GS_CASE:
909 out << " case (" << *loop_test << ")";
910 break;
911 case GS_CASE_ITEM:
912 if (loop_test)
913 out << " (" << *loop_test << ") == (" << *parent->loop_test << ")";
914 else
915 out << " default:";
916 break;
919 if (scope_name)
920 out << " : " << scope_name;
922 out << endl;
924 for (map<perm_string,PWire*>::const_iterator idx = wires.begin()
925 ; idx != wires.end() ; idx++) {
927 (*idx).second->dump(out, indent+2);
930 for (list<PGate*>::const_iterator idx = gates.begin()
931 ; idx != gates.end() ; idx++) {
932 (*idx)->dump(out, indent+2);
935 for (list<PProcess*>::const_iterator idx = behaviors.begin()
936 ; idx != behaviors.end() ; idx++) {
937 (*idx)->dump(out, indent+2);
940 for (list<PGenerate*>::const_iterator idx = generates.begin()
941 ; idx != generates.end() ; idx++) {
942 (*idx)->dump(out, indent+2);
945 out << setw(indent) << "" << "endgenerate" << endl;
948 void PScope::dump_wires_(ostream&out, unsigned indent) const
950 // Iterate through and display all the wires.
951 for (map<perm_string,PWire*>::const_iterator wire = wires.begin()
952 ; wire != wires.end() ; wire ++ ) {
954 (*wire).second->dump(out, indent);
958 void Module::dump(ostream&out) const
960 if (attributes.begin() != attributes.end()) {
961 out << "(* ";
962 for (map<perm_string,PExpr*>::const_iterator idx = attributes.begin()
963 ; idx != attributes.end() ; idx++ ) {
964 if (idx != attributes.begin()) {
965 out << " , ";
967 out << (*idx).first;
968 if ((*idx).second) {
969 out << " = " << *(*idx).second;
972 out << " *) ";
975 out << "module " << mod_name() << ";" << endl;
977 for (unsigned idx = 0 ; idx < ports.count() ; idx += 1) {
978 port_t*cur = ports[idx];
980 if (cur == 0) {
981 out << " unconnected" << endl;
982 continue;
985 out << " ." << cur->name << "(" << *cur->expr[0];
986 for (unsigned wdx = 1 ; wdx < cur->expr.count() ; wdx += 1) {
987 out << ", " << *cur->expr[wdx];
990 out << ")" << endl;
993 typedef map<perm_string,param_expr_t>::const_iterator parm_iter_t;
994 typedef map<pform_name_t,PExpr*>::const_iterator parm_hiter_t;
995 for (parm_iter_t cur = parameters.begin()
996 ; cur != parameters.end() ; cur ++) {
997 out << " parameter " << (*cur).second.type << " ";
998 if ((*cur).second.signed_flag)
999 out << "signed ";
1000 if ((*cur).second.msb)
1001 out << "[" << *(*cur).second.msb << ":"
1002 << *(*cur).second.lsb << "] ";
1003 out << (*cur).first << " = ";
1004 if ((*cur).second.expr)
1005 out << *(*cur).second.expr;
1006 else
1007 out << "/* ERROR */";
1008 for (Module::range_t*tmp = (*cur).second.range
1009 ; tmp ; tmp = tmp->next) {
1010 if (tmp->exclude_flag)
1011 out << " exclude ";
1012 else
1013 out << " from ";
1014 if (tmp->low_open_flag)
1015 out << "(";
1016 else
1017 out << "[";
1018 if (tmp->low_expr)
1019 out << *(tmp->low_expr);
1020 else if (tmp->low_open_flag==false)
1021 out << "-inf";
1022 else
1023 out << "<nil>";
1024 out << ":";
1025 if (tmp->high_expr)
1026 out << *(tmp->high_expr);
1027 else if (tmp->high_open_flag==false)
1028 out << "inf";
1029 else
1030 out << "<nil>";
1031 if (tmp->high_open_flag)
1032 out << ")";
1033 else
1034 out << "]";
1036 out << ";" << endl;
1039 for (parm_iter_t cur = localparams.begin()
1040 ; cur != localparams.end() ; cur ++) {
1041 out << " localparam ";
1042 if ((*cur).second.msb)
1043 out << "[" << *(*cur).second.msb << ":"
1044 << *(*cur).second.lsb << "] ";
1045 out << (*cur).first << " = ";
1046 if ((*cur).second.expr)
1047 out << *(*cur).second.expr << ";" << endl;
1048 else
1049 out << "/* ERROR */;" << endl;
1052 typedef map<perm_string,LineInfo*>::const_iterator genvar_iter_t;
1053 for (genvar_iter_t cur = genvars.begin()
1054 ; cur != genvars.end() ; cur++) {
1055 out << " genvar " << ((*cur).first) << ";" << endl;
1058 typedef list<PGenerate*>::const_iterator genscheme_iter_t;
1059 for (genscheme_iter_t cur = generate_schemes.begin()
1060 ; cur != generate_schemes.end() ; cur++) {
1061 (*cur)->dump(out, 4);
1064 typedef map<perm_string,PExpr*>::const_iterator specparm_iter_t;
1065 for (specparm_iter_t cur = specparams.begin()
1066 ; cur != specparams.end() ; cur ++) {
1067 out << " specparam " << (*cur).first << " = "
1068 << *(*cur).second << ";" << endl;
1071 for (parm_hiter_t cur = defparms.begin()
1072 ; cur != defparms.end() ; cur ++) {
1073 out << " defparam " << (*cur).first << " = ";
1074 if ((*cur).second)
1075 out << *(*cur).second << ";" << endl;
1076 else
1077 out << "/* ERROR */;" << endl;
1080 for (map<perm_string,PEvent*>::const_iterator cur = events.begin()
1081 ; cur != events.end() ; cur ++ ) {
1082 PEvent*ev = (*cur).second;
1083 out << " event " << ev->name() << "; // "
1084 << ev->get_fileline() << endl;
1087 // Iterate through and display all the wires.
1088 dump_wires_(out, 4);
1090 // Dump the task definitions.
1091 typedef map<perm_string,PTask*>::const_iterator task_iter_t;
1092 for (task_iter_t cur = tasks_.begin()
1093 ; cur != tasks_.end() ; cur ++) {
1094 out << " task " << (*cur).first << ";" << endl;
1095 (*cur).second->dump(out, 6);
1096 out << " endtask;" << endl;
1099 // Dump the function definitions.
1100 typedef map<perm_string,PFunction*>::const_iterator func_iter_t;
1101 for (func_iter_t cur = funcs_.begin()
1102 ; cur != funcs_.end() ; cur ++) {
1103 out << " function " << (*cur).first << ";" << endl;
1104 (*cur).second->dump(out, 6);
1105 out << " endfunction;" << endl;
1109 // Iterate through and display all the gates
1110 for (list<PGate*>::const_iterator gate = gates_.begin()
1111 ; gate != gates_.end()
1112 ; gate ++ ) {
1114 (*gate)->dump(out);
1118 for (list<PProcess*>::const_iterator behav = behaviors.begin()
1119 ; behav != behaviors.end()
1120 ; behav ++ ) {
1122 (*behav)->dump(out, 4);
1125 for (list<PSpecPath*>::const_iterator spec = specify_paths.begin()
1126 ; spec != specify_paths.end()
1127 ; spec ++ ) {
1129 (*spec)->dump(out, 4);
1132 out << "endmodule" << endl;
1135 void pform_dump(ostream&out, Module*mod)
1137 mod->dump(out);
1140 void PUdp::dump(ostream&out) const
1142 out << "primitive " << name_ << "(" << ports[0];
1143 for (unsigned idx = 1 ; idx < ports.count() ; idx += 1)
1144 out << ", " << ports[idx];
1145 out << ");" << endl;
1147 if (sequential)
1148 out << " reg " << ports[0] << ";" << endl;
1150 out << " table" << endl;
1151 for (unsigned idx = 0 ; idx < tinput.count() ; idx += 1) {
1152 out << " ";
1153 for (unsigned chr = 0 ; chr < tinput[idx].length() ; chr += 1)
1154 out << " " << tinput[idx][chr];
1156 if (sequential)
1157 out << " : " << tcurrent[idx];
1159 out << " : " << toutput[idx] << " ;" << endl;
1161 out << " endtable" << endl;
1163 if (sequential)
1164 out << " initial " << ports[0] << " = 1'b" << initial
1165 << ";" << endl;
1167 // Dump the attributes for the primitive as attribute
1168 // statements.
1169 for (map<string,PExpr*>::const_iterator idx = attributes.begin()
1170 ; idx != attributes.end()
1171 ; idx ++) {
1172 out << " attribute " << (*idx).first;
1173 if ((*idx).second)
1174 out << " = " << *(*idx).second;
1175 out << endl;
1178 out << "endprimitive" << endl;
1181 void pform_dump(std::ostream&out, const nature_t*nat)
1183 out << "nature " << nat->name() << endl;
1184 out << " access " << nat->access() << ";" << endl;
1185 out << "endnature" << endl;
1188 void pform_dump(std::ostream&out, const discipline_t*dis)
1190 out << "discipline " << dis->name() << endl;
1191 out << " domain " << dis->domain() << ";" << endl;
1192 if (const nature_t*tmp = dis->potential())
1193 out << " potential " << tmp->name() << ";" << endl;
1194 if (const nature_t*tmp = dis->flow())
1195 out << " flow " << tmp->name() << ";" << endl;
1196 out << "enddiscipline" << endl;