Merge branch 'master' into verilog-ams
[sverilog.git] / tgt-pal / imain.c
blob1bc1c84e226f93d402fbc7aa2fd7a424a76789b1
1 /*
2 * Copyright (c) 2000 Stephen Williams (steve@icarus.com)
4 * This source code is free software; you can redistribute it
5 * and/or modify it in source code form under the terms of the GNU
6 * General Public License as published by the Free Software
7 * Foundation; either version 2 of the License, or (at your option)
8 * any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
19 #ifdef HAVE_CVS_IDENT
20 #ident "$Id: imain.c,v 1.11 2002/08/12 01:35:03 steve Exp $"
21 #endif
23 # include "config.h"
26 * This module generates a PAL that implements the design.
29 # include "priv.h"
31 #ifdef HAVE_MALLOC_H
32 # include <malloc.h>
33 #endif
34 # include <stdio.h>
35 # include <stdlib.h>
36 # include <assert.h>
38 extern void dump_final_design(FILE*out);
41 * As processing proceeds, this variable is incremented as errors are
42 * encountered. This allows the code generator to give up if it
43 * detects errors deep within recursive functions.
45 unsigned pal_errors = 0;
48 * This is the pal device that the user asked for.
50 pal_t pal = 0;
53 * These variables are the global pin assignment array. Everything
54 * operates to build this up.
56 unsigned pins = 0;
57 struct pal_bind_s* bind_pin = 0;
61 * This is the main entry point that Icarus Verilog calls to generate
62 * code for a pal.
64 int target_design(ivl_design_t des)
66 unsigned idx;
67 const char*part;
68 ivl_scope_t root;
70 /* Get the part type from the design, using the "part"
71 key. Given the part type, try to open the pal description
72 so that we can figure out the device. */
73 part = ivl_design_flag(des, "part");
74 if ((part == 0) || (*part == 0)) {
75 fprintf(stderr, "error: part must be specified. Specify a\n");
76 fprintf(stderr, " : type with the -fpart=<type> option.\n");
77 return -1;
80 pal = pal_alloc(part);
81 if (pal == 0) {
82 fprintf(stderr, "error: %s is not a valid part type.\n", part);
83 return -1;
86 assert(pal);
88 pins = pal_pins(pal);
89 assert(pins > 0);
91 /* Allocate the pin array, ready to start assigning resources. */
92 bind_pin = calloc(pins, sizeof (struct pal_bind_s));
93 assert(bind_pin);
95 /* Connect all the macrocells that drive pins to the pin that
96 they drive. This doesn't yet look at the design, but is
97 initializing the bind_pin array with part information. */
98 for (idx = 0 ; idx < pal_sops(pal) ; idx += 1) {
99 pal_sop_t sop = pal_sop(pal, idx);
100 int spin = pal_sop_pin(sop);
102 if (spin == 0)
103 continue;
105 assert(spin > 0);
106 bind_pin[spin-1].sop = sop;
110 /* Get pin assignments from the user. This is the first and
111 most constrained step. Everything else must work around the
112 results of these bindings. */
113 root = ivl_design_root(des);
114 get_pad_bindings(root, 0);
116 if (pal_errors) {
117 fprintf(stderr, "PAD assignment failed.\n");
118 pal_free(pal);
119 return -1;
122 /* Run through the assigned output pins and absorb the output
123 enables that are connected to them. */
124 absorb_pad_enables();
126 /* Scan all the registers, and assign them to
127 macro-cells. */
128 root = ivl_design_root(des);
129 fit_registers(root, 0);
130 if (pal_errors) {
131 fprintf(stderr, "Register fitting failed.\n");
132 pal_free(pal);
133 return -1;
136 fit_logic();
137 if (pal_errors) {
138 fprintf(stderr, "Logic fitting failed.\n");
139 pal_free(pal);
140 return -1;
143 dump_final_design(stdout);
144 emit_jedec(ivl_design_flag(des, "-o"));
146 pal_free(pal);
147 return 0;
151 * $Log: imain.c,v $
152 * Revision 1.11 2002/08/12 01:35:03 steve
153 * conditional ident string using autoconfig.
155 * Revision 1.10 2001/09/30 16:45:10 steve
156 * Fix some Cygwin DLL handling. (Venkat Iyer)
158 * Revision 1.9 2001/09/15 18:27:04 steve
159 * Make configure detect malloc.h
161 * Revision 1.8 2001/07/25 03:10:50 steve
162 * Create a config.h.in file to hold all the config
163 * junk, and support gcc 3.0. (Stephan Boettcher)
165 * Revision 1.7 2001/05/20 15:09:40 steve
166 * Mingw32 support (Venkat Iyer)
168 * Revision 1.6 2001/01/15 00:05:39 steve
169 * Add client data pointer for scope and process scanners.
171 * Revision 1.5 2001/01/09 03:10:48 steve
172 * Generate the jedec to configure the macrocells.
174 * Revision 1.4 2000/12/14 23:37:47 steve
175 * Start support for fitting the logic.
177 * Revision 1.3 2000/12/09 05:40:42 steve
178 * documentation...
180 * Revision 1.2 2000/12/09 03:42:52 steve
181 * Stuff registers into macrocells.
183 * Revision 1.1 2000/12/09 01:17:38 steve
184 * Add the pal loadable target.
186 * Revision 1.1 2000/12/02 04:50:32 steve
187 * Make the null target into a loadable target.