gpxe/src/drivers/infiniband/hermon.h

   1 #ifndef _HERMON_H
   2 #define _HERMON_H
   3
   4 /** @file
   5  *
   6  * Mellanox Hermon Infiniband HCA driver
   7  *
   8  */
   9
  10 #include <stdint.h>
  11 #include <gpxe/uaccess.h>
  12 #include "mlx_bitops.h"
  13 #include "MT25408_PRM.h"
  14
  15 /*
  16  * Hardware constants
  17  *
  18  */
  19
  20 /* Ports in existence */
  21 #define HERMON_NUM_PORTS                1
  22 #define HERMON_PORT_BASE                1
  23
  24 /* PCI BARs */
  25 #define HERMON_PCI_CONFIG_BAR           PCI_BASE_ADDRESS_0
  26 #define HERMON_PCI_CONFIG_BAR_SIZE      0x100000
  27 #define HERMON_PCI_UAR_BAR              PCI_BASE_ADDRESS_2
  28
  29 /* Work queue entry and completion queue entry opcodes */
  30 #define HERMON_OPCODE_SEND              0x0a
  31 #define HERMON_OPCODE_RECV_ERROR        0xfe
  32 #define HERMON_OPCODE_SEND_ERROR        0xff
  33
  34 /* HCA command register opcodes */
  35 #define HERMON_HCR_QUERY_DEV_CAP        0x0003
  36 #define HERMON_HCR_QUERY_FW             0x0004
  37 #define HERMON_HCR_INIT_HCA             0x0007
  38 #define HERMON_HCR_CLOSE_HCA            0x0008
  39 #define HERMON_HCR_INIT_PORT            0x0009
  40 #define HERMON_HCR_CLOSE_PORT           0x000a
  41 #define HERMON_HCR_SW2HW_MPT            0x000d
  42 #define HERMON_HCR_WRITE_MTT            0x0011
  43 #define HERMON_HCR_MAP_EQ               0x0012
  44 #define HERMON_HCR_SW2HW_EQ             0x0013
  45 #define HERMON_HCR_HW2SW_EQ             0x0014
  46 #define HERMON_HCR_SW2HW_CQ             0x0016
  47 #define HERMON_HCR_HW2SW_CQ             0x0017
  48 #define HERMON_HCR_RST2INIT_QP          0x0019
  49 #define HERMON_HCR_INIT2RTR_QP          0x001a
  50 #define HERMON_HCR_RTR2RTS_QP           0x001b
  51 #define HERMON_HCR_2RST_QP              0x0021
  52 #define HERMON_HCR_MAD_IFC              0x0024
  53 #define HERMON_HCR_READ_MCG             0x0025
  54 #define HERMON_HCR_WRITE_MCG            0x0026
  55 #define HERMON_HCR_MGID_HASH            0x0027
  56 #define HERMON_HCR_RUN_FW               0x0ff6
  57 #define HERMON_HCR_DISABLE_LAM          0x0ff7
  58 #define HERMON_HCR_ENABLE_LAM           0x0ff8
  59 #define HERMON_HCR_UNMAP_ICM            0x0ff9
  60 #define HERMON_HCR_MAP_ICM              0x0ffa
  61 #define HERMON_HCR_UNMAP_ICM_AUX        0x0ffb
  62 #define HERMON_HCR_MAP_ICM_AUX          0x0ffc
  63 #define HERMON_HCR_SET_ICM_SIZE         0x0ffd
  64 #define HERMON_HCR_UNMAP_FA             0x0ffe
  65 #define HERMON_HCR_MAP_FA               0x0fff
  66
  67 /* Service types */
  68 #define HERMON_ST_UD                    0x03
  69
  70 /* MTUs */
  71 #define HERMON_MTU_2048                 0x04
  72
  73 #define HERMON_INVALID_LKEY             0x00000100UL
  74
  75 #define HERMON_PAGE_SIZE                4096
  76
  77 #define HERMON_DB_POST_SND_OFFSET       0x14
  78
  79 /*
  80  * Datatypes that seem to be missing from the autogenerated documentation
  81  *
  82  */
  83 struct hermonprm_mgm_hash_st {
  84         pseudo_bit_t reserved0[0x00020];
  85 /* -------------- */
  86         pseudo_bit_t hash[0x00010];
  87         pseudo_bit_t reserved1[0x00010];
  88 } __attribute__ (( packed ));
  89
  90 struct hermonprm_mcg_entry_st {
  91         struct hermonprm_mcg_hdr_st hdr;
  92         struct hermonprm_mcg_qp_dw_st qp[8];
  93 } __attribute__ (( packed ));
  94
  95 struct hermonprm_cq_db_record_st {
  96         pseudo_bit_t update_ci[0x00018];
  97         pseudo_bit_t reserved0[0x00008];
  98 /* -------------- */
  99         pseudo_bit_t arm_ci[0x00018];
 100         pseudo_bit_t cmd[0x00003];
 101         pseudo_bit_t reserved1[0x00001];
 102         pseudo_bit_t cmd_sn[0x00002];
 103         pseudo_bit_t reserved2[0x00002];
 104 } __attribute__ (( packed ));
 105
 106 struct hermonprm_send_db_register_st {
 107         pseudo_bit_t reserved[0x00008];
 108         pseudo_bit_t qn[0x00018];
 109 } __attribute__ (( packed ));
 110
 111 struct hermonprm_scalar_parameter_st {
 112         pseudo_bit_t value_hi[0x00020];
 113 /* -------------- */
 114         pseudo_bit_t value[0x00020];
 115 } __attribute__ (( packed ));
 116
 117 /*
 118  * Wrapper structures for hardware datatypes
 119  *
 120  */
 121
 122 struct MLX_DECLARE_STRUCT ( hermonprm_completion_queue_context );
 123 struct MLX_DECLARE_STRUCT ( hermonprm_completion_queue_entry );
 124 struct MLX_DECLARE_STRUCT ( hermonprm_completion_with_error );
 125 struct MLX_DECLARE_STRUCT ( hermonprm_cq_db_record );
 126 struct MLX_DECLARE_STRUCT ( hermonprm_eqc );
 127 struct MLX_DECLARE_STRUCT ( hermonprm_hca_command_register );
 128 struct MLX_DECLARE_STRUCT ( hermonprm_init_hca );
 129 struct MLX_DECLARE_STRUCT ( hermonprm_init_port );
 130 struct MLX_DECLARE_STRUCT ( hermonprm_mad_ifc );
 131 struct MLX_DECLARE_STRUCT ( hermonprm_mcg_entry );
 132 struct MLX_DECLARE_STRUCT ( hermonprm_mgm_hash );
 133 struct MLX_DECLARE_STRUCT ( hermonprm_mpt );
 134 struct MLX_DECLARE_STRUCT ( hermonprm_mtt );
 135 struct MLX_DECLARE_STRUCT ( hermonprm_qp_db_record );
 136 struct MLX_DECLARE_STRUCT ( hermonprm_qp_ee_state_transitions );
 137 struct MLX_DECLARE_STRUCT ( hermonprm_query_dev_cap );
 138 struct MLX_DECLARE_STRUCT ( hermonprm_query_fw );
 139 struct MLX_DECLARE_STRUCT ( hermonprm_queue_pair_ee_context_entry );
 140 struct MLX_DECLARE_STRUCT ( hermonprm_scalar_parameter );
 141 struct MLX_DECLARE_STRUCT ( hermonprm_send_db_register );
 142 struct MLX_DECLARE_STRUCT ( hermonprm_ud_address_vector );
 143 struct MLX_DECLARE_STRUCT ( hermonprm_virtual_physical_mapping );
 144 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ctrl_send );
 145 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_data_ptr );
 146 struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ud );
 147
 148 /*
 149  * Composite hardware datatypes
 150  *
 151  */
 152
 153 struct hermonprm_write_mtt {
 154         struct hermonprm_scalar_parameter mtt_base_addr;
 155         struct hermonprm_scalar_parameter reserved;
 156         struct hermonprm_mtt mtt;
 157 } __attribute__ (( packed ));
 158
 159 #define HERMON_MAX_GATHER 1
 160
 161 struct hermonprm_ud_send_wqe {
 162         struct hermonprm_wqe_segment_ctrl_send ctrl;
 163         struct hermonprm_wqe_segment_ud ud;
 164         struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER];
 165 } __attribute__ (( packed ));
 166
 167 #define HERMON_MAX_SCATTER 1
 168
 169 struct hermonprm_recv_wqe {
 170         struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_SCATTER];
 171 } __attribute__ (( packed ));
 172
 173 union hermonprm_completion_entry {
 174         struct hermonprm_completion_queue_entry normal;
 175         struct hermonprm_completion_with_error error;
 176 } __attribute__ (( packed ));
 177
 178 union hermonprm_doorbell_register {
 179         struct hermonprm_send_db_register send;
 180         uint32_t dword[1];
 181 } __attribute__ (( packed ));
 182
 183 union hermonprm_mad {
 184         struct hermonprm_mad_ifc ifc;
 185         union ib_mad mad;
 186 } __attribute__ (( packed ));
 187
 188 /*
 189  * gPXE-specific definitions
 190  *
 191  */
 192
 193 /** Hermon device capabilitiess */
 194 struct hermon_dev_cap {
 195         /** CMPT entry size */
 196         size_t cmpt_entry_size;
 197         /** Number of reserved QPs */
 198         unsigned int reserved_qps;
 199         /** QP context entry size */
 200         size_t qpc_entry_size;
 201         /** Alternate path context entry size */
 202         size_t altc_entry_size;
 203         /** Auxiliary context entry size */
 204         size_t auxc_entry_size;
 205         /** Number of reserved SRQs */
 206         unsigned int reserved_srqs;
 207         /** SRQ context entry size */
 208         size_t srqc_entry_size;
 209         /** Number of reserved CQs */
 210         unsigned int reserved_cqs;
 211         /** CQ context entry size */
 212         size_t cqc_entry_size;
 213         /** Number of reserved EQs */
 214         unsigned int reserved_eqs;
 215         /** EQ context entry size */
 216         size_t eqc_entry_size;
 217         /** Number of reserved MTTs */
 218         unsigned int reserved_mtts;
 219         /** MTT entry size */
 220         size_t mtt_entry_size;
 221         /** Number of reserved MRWs */
 222         unsigned int reserved_mrws;
 223         /** DMPT entry size */
 224         size_t dmpt_entry_size;
 225         /** Number of reserved UARs */
 226         unsigned int reserved_uars;
 227 };
 228
 229 /** Number of cMPT entries of each type */
 230 #define HERMON_CMPT_MAX_ENTRIES ( 1 << 24 )
 231
 232 /** Hermon ICM memory map entry */
 233 struct hermon_icm_map {
 234         /** Offset (virtual address within ICM) */
 235         uint64_t offset;
 236         /** Length */
 237         size_t len;
 238 };
 239
 240 /** Discontiguous regions within Hermon ICM */
 241 enum hermon_icm_map_regions {
 242         HERMON_ICM_QP_CMPT = 0,
 243         HERMON_ICM_SRQ_CMPT,
 244         HERMON_ICM_CQ_CMPT,
 245         HERMON_ICM_EQ_CMPT,
 246         HERMON_ICM_OTHER,
 247         HERMON_ICM_NUM_REGIONS
 248 };
 249
 250 /** UAR page for doorbell accesses
 251  *
 252  * Pages 0-127 are reserved for event queue doorbells only, so we use
 253  * page 128.
 254  */
 255 #define HERMON_UAR_PAGE         128
 256
 257 /** Maximum number of allocatable MTT entries
 258  *
 259  * This is a policy decision, not a device limit.
 260  */
 261 #define HERMON_MAX_MTTS         64
 262
 263 /** A Hermon MTT descriptor */
 264 struct hermon_mtt {
 265         /** MTT offset */
 266         unsigned int mtt_offset;
 267         /** Number of pages */
 268         unsigned int num_pages;
 269         /** MTT base address */
 270         unsigned int mtt_base_addr;
 271         /** Offset within page */
 272         unsigned int page_offset;
 273 };
 274
 275 /** Alignment of Hermon send work queue entries */
 276 #define HERMON_SEND_WQE_ALIGN 128
 277
 278 /** A Hermon send work queue entry */
 279 union hermon_send_wqe {
 280         struct hermonprm_ud_send_wqe ud;
 281         uint8_t force_align[HERMON_SEND_WQE_ALIGN];
 282 } __attribute__ (( packed ));
 283
 284 /** A Hermon send work queue */
 285 struct hermon_send_work_queue {
 286         /** Number of work queue entries, including headroom
 287          *
 288          * Hermon requires us to leave unused space within the send
 289          * WQ, so we create a send WQ with more entries than are
 290          * requested in the create_qp() call.
 291          */
 292         unsigned int num_wqes;
 293         /** Work queue entries */
 294         union hermon_send_wqe *wqe;
 295         /** Size of work queue */
 296         size_t wqe_size;
 297 };
 298
 299 /** Alignment of Hermon receive work queue entries */
 300 #define HERMON_RECV_WQE_ALIGN 16
 301
 302 /** A Hermon receive work queue entry */
 303 union hermon_recv_wqe {
 304         struct hermonprm_recv_wqe recv;
 305         uint8_t force_align[HERMON_RECV_WQE_ALIGN];
 306 } __attribute__ (( packed ));
 307
 308 /** A Hermon receive work queue */
 309 struct hermon_recv_work_queue {
 310         /** Work queue entries */
 311         union hermon_recv_wqe *wqe;
 312         /** Size of work queue */
 313         size_t wqe_size;
 314         /** Doorbell */
 315         struct hermonprm_qp_db_record doorbell __attribute__ (( aligned (4) ));
 316 };
 317
 318 /** Maximum number of allocatable queue pairs
 319  *
 320  * This is a policy decision, not a device limit.
 321  */
 322 #define HERMON_MAX_QPS          8
 323
 324 /** Base queue pair number */
 325 #define HERMON_QPN_BASE 0x550000
 326
 327 /** A Hermon queue pair */
 328 struct hermon_queue_pair {
 329         /** Work queue buffer */
 330         void *wqe;
 331         /** Size of work queue buffer */
 332         size_t wqe_size;
 333         /** MTT descriptor */
 334         struct hermon_mtt mtt;
 335         /** Send work queue */
 336         struct hermon_send_work_queue send;
 337         /** Receive work queue */
 338         struct hermon_recv_work_queue recv;
 339 };
 340
 341 /** Maximum number of allocatable completion queues
 342  *
 343  * This is a policy decision, not a device limit.
 344  */
 345 #define HERMON_MAX_CQS          8
 346
 347 /** A Hermon completion queue */
 348 struct hermon_completion_queue {
 349         /** Completion queue entries */
 350         union hermonprm_completion_entry *cqe;
 351         /** Size of completion queue */
 352         size_t cqe_size;
 353         /** MTT descriptor */
 354         struct hermon_mtt mtt;
 355         /** Doorbell */
 356         struct hermonprm_cq_db_record doorbell __attribute__ (( aligned (8) ));
 357 };
 358
 359 /** Maximum number of allocatable event queues
 360  *
 361  * This is a policy decision, not a device limit.
 362  */
 363 #define HERMON_MAX_EQS          4
 364
 365 /** A Hermon resource bitmask */
 366 typedef uint32_t hermon_bitmask_t;
 367
 368 /** Size of a hermon resource bitmask */
 369 #define HERMON_BITMASK_SIZE(max_entries)                                     \
 370         ( ( (max_entries) + ( 8 * sizeof ( hermon_bitmask_t ) ) - 1 ) /      \
 371           ( 8 * sizeof ( hermon_bitmask_t ) ) )
 372
 373 /** A Hermon device */
 374 struct hermon {
 375         /** PCI configuration registers */
 376         void *config;
 377         /** PCI user Access Region */
 378         void *uar;
 379
 380         /** Command toggle */
 381         unsigned int toggle;
 382         /** Command input mailbox */
 383         void *mailbox_in;
 384         /** Command output mailbox */
 385         void *mailbox_out;
 386
 387         /** Firmware area in external memory */
 388         userptr_t firmware_area;
 389         /** ICM map */
 390         struct hermon_icm_map icm_map[HERMON_ICM_NUM_REGIONS];
 391         /** ICM area */
 392         userptr_t icm;
 393
 394         /** Reserved LKey
 395          *
 396          * Used to get unrestricted memory access.
 397          */
 398         unsigned long reserved_lkey;
 399
 400         /** Completion queue in-use bitmask */
 401         hermon_bitmask_t cq_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_CQS ) ];
 402         /** Queue pair in-use bitmask */
 403         hermon_bitmask_t qp_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_QPS ) ];
 404         /** MTT entry in-use bitmask */
 405         hermon_bitmask_t mtt_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_MTTS ) ];
 406
 407         /** Device capabilities */
 408         struct hermon_dev_cap cap;
 409
 410         /** Infiniband devices */
 411         struct ib_device *ibdev[HERMON_NUM_PORTS];
 412 };
 413
 414 /** Global protection domain */
 415 #define HERMON_GLOBAL_PD                0x123456
 416
 417 /** Memory key prefix */
 418 #define HERMON_MKEY_PREFIX              0x77000000UL
 419
 420 /*
 421  * HCA commands
 422  *
 423  */
 424
 425 #define HERMON_HCR_BASE                 0x80680
 426 #define HERMON_HCR_REG(x)               ( HERMON_HCR_BASE + 4 * (x) )
 427 #define HERMON_HCR_MAX_WAIT_MS          2000
 428 #define HERMON_MBOX_ALIGN               4096
 429 #define HERMON_MBOX_SIZE                512
 430
 431 /* HCA command is split into
 432  *
 433  * bits  11:0   Opcode
 434  * bit     12   Input uses mailbox
 435  * bit     13   Output uses mailbox
 436  * bits 22:14   Input parameter length (in dwords)
 437  * bits 31:23   Output parameter length (in dwords)
 438  *
 439  * Encoding the information in this way allows us to cut out several
 440  * parameters to the hermon_command() call.
 441  */
 442 #define HERMON_HCR_IN_MBOX              0x00001000UL
 443 #define HERMON_HCR_OUT_MBOX             0x00002000UL
 444 #define HERMON_HCR_OPCODE( _command )   ( (_command) & 0xfff )
 445 #define HERMON_HCR_IN_LEN( _command )   ( ( (_command) >> 12 ) & 0x7fc )
 446 #define HERMON_HCR_OUT_LEN( _command )  ( ( (_command) >> 21 ) & 0x7fc )
 447
 448 /** Build HCR command from component parts */
 449 #define HERMON_HCR_INOUT_CMD( _opcode, _in_mbox, _in_len,                    \
 450                              _out_mbox, _out_len )                           \
 451         ( (_opcode) |                                                        \
 452           ( (_in_mbox) ? HERMON_HCR_IN_MBOX : 0 ) |                          \
 453           ( ( (_in_len) / 4 ) << 14 ) |                                      \
 454           ( (_out_mbox) ? HERMON_HCR_OUT_MBOX : 0 ) |                        \
 455           ( ( (_out_len) / 4 ) << 23 ) )
 456
 457 #define HERMON_HCR_IN_CMD( _opcode, _in_mbox, _in_len )                      \
 458         HERMON_HCR_INOUT_CMD ( _opcode, _in_mbox, _in_len, 0, 0 )
 459
 460 #define HERMON_HCR_OUT_CMD( _opcode, _out_mbox, _out_len )                   \
 461         HERMON_HCR_INOUT_CMD ( _opcode, 0, 0, _out_mbox, _out_len )
 462
 463 #define HERMON_HCR_VOID_CMD( _opcode )                                       \
 464         HERMON_HCR_INOUT_CMD ( _opcode, 0, 0, 0, 0 )
 465
 466 #endif /* _HERMON_H */