Adding upstream version 6.02~pre8+dfsg.
[syslinux-debian/hramrach.git] / com32 / include / hw / vga.h
blob0ebd2e2554a1483e24dc8d9a1192c5f50038eddc
1 /* ----------------------------------------------------------------------- *
3 * Copyright 2012 Intel Corporation; author: H. Peter Anvin
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without
8 * restriction, including without limitation the rights to use,
9 * copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom
11 * the Software is furnished to do so, subject to the following
12 * conditions:
14 * The above copyright notice and this permission notice shall
15 * be included in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
19 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
21 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
22 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24 * OTHER DEALINGS IN THE SOFTWARE.
26 * ----------------------------------------------------------------------- */
28 #ifndef _HW_VGA_H
29 #define _HW_VGA_H 1
31 #include <sys/io.h>
33 /* These are relative to the CRTC base address */
34 #define VGA_CRTC_ADDR 0x4
35 #define VGA_CRTC_DATA 0x5
36 #define VGA_CRTC_IX_HORIZ_TOTAL 0x00
37 #define VGA_CRTC_IX_END_HORIZ_DISPLAY 0x01
38 #define VGA_CRTC_IX_START_HORIZ_BLANK 0x02
39 #define VGA_CRTC_IX_END_HORIZ_BLANK 0x03
40 #define VGA_CRTC_IX_START_HORIZ_RETR 0x04
41 #define VGA_CRTC_IX_END_HORIZ_RETR 0x05
42 #define VGA_CRTC_IX_VERT_TOTAL 0x06
43 #define VGA_CRTC_IX_OVERFLOW 0x07
44 #define VGA_CRTC_IX_PRESET_ROW_SCAN 0x08
45 #define VGA_CRTC_IX_MAX_SCAN_LINE 0x09
46 #define VGA_CRTC_IX_CURSOR_START 0x0a
47 #define VGA_CRTC_IX_CURSOR_END 0x0b
48 #define VGA_CRTC_IX_START_ADDR_HIGH 0x0c
49 #define VGA_CRTC_IX_START_ADDR_LOW 0x0d
50 #define VGA_CRTC_IX_CURSOR_POS_HIGH 0x0e
51 #define VGA_CRTC_IX_CURSOR_POS_LOW 0x0f
52 #define VGA_CRTC_IX_START_VERT_RETR 0x10
53 #define VGA_CRTC_IX_END_VERT_RETR 0x11
54 #define VGA_CRTC_IX_END_VERT_DISPLAY 0x12
55 #define VGA_CRTC_IX_OFFSET 0x13
56 #define VGA_CRTC_IX_UNDERLINE 0x14
57 #define VGA_CRTC_IX_START_VERT_BLANK 0x15
58 #define VGA_CRTC_IX_END_VERT_BLANK 0x16
59 #define VGA_CRTC_IX_MODE_CONTROL 0x17
60 #define VGA_CRTC_IX_LINE_COMPARE 0x18
61 #define VGA_CRTC_INPUT_STATUS_1 0xa
62 #define VGA_CRTC_FEATURE_CONTROL_WRITE 0xa
64 #define VGA_ATTR_ADDR_DATA 0x3c0
65 #define VGA_ATTR_DATA_READ 0x3c1
66 /* 0x00-0x0f are 16->64 palette registers */
67 #define VGA_ATTR_IX_MODE_CONTROL 0x10
68 #define VGA_ATTR_IX_OVERSCAN 0x11
69 #define VGA_ATTR_IX_COLOR_PLANE_ENABLE 0x12
70 #define VGA_ATTR_IX_HORIZ_PIXEL_PAN 0x13
71 #define VGA_ADDR_IX_COLOR_SELECT 0x14
72 #define VGA_INPUT_STATUS_0 0x3c2
73 #define VGA_MISC_OUTPUT_WRITE 0x3c2
74 #define VGA_SEQ_ADDR 0x3c4
75 #define VGA_SEQ_DATA 0x3c5
76 #define VGA_SEQ_IX_RESET 0
77 #define VGA_SEQ_IX_CLOCKMODE 1
78 #define VGA_SEQ_IX_MAP_MASK 2
79 #define VGA_SEQ_IX_CHAR_MAP 3
80 #define VGA_SEQ_IX_SEQ_MEM_MODE 4
81 #define VGA_DAC_STATE 0x3c7
82 #define VGA_DAC_ADDR_READ_MODE 0x3c7
83 #define VGA_DAC_ADDR_WRITE_MODE 0x3c8
84 #define VGA_DAC_DATA 0x3c9
85 #define VGA_FEATURE_CONTROL_READ 0x3ca
86 #define VGA_MISC_OUTPUT_READ 0x3cc
87 #define VGA_GC_ADDR 0x3ce
88 #define VGA_GC_DATA 0x3cf
89 #define VGA_GC_IX_SET_RESET 0
90 #define VGA_GC_IX_ENABLE_SET_RESET 1
91 #define VGA_GC_IX_COLOR_COMPARE 2
92 #define VGA_GC_IX_DATA_ROTATE 3
93 #define VGA_GC_IX_READ_MAP_SELECT 4
94 #define VGA_GC_IX_GRAPHICS_MODE 5
95 #define VGA_GC_IX_MISC_GRAPHICS 6
96 #define VGA_GC_IX_COLOR_DONT_CARE 7
97 #define VGA_GC_IX_BIT_MASK 8
99 static inline uint16_t vga_crtc_base(void)
101 return 0x3b0 + ((inb(VGA_MISC_OUTPUT_READ) & 1) << 5);
104 #endif /* _HW_VGA_H */