Adding upstream version 3.31.
[syslinux-debian/hramrach.git] / com32 / include / dmi / dmi_processor.h
blob341772024d6804a03d792aad3c54e50f1c8304bd
1 /* ----------------------------------------------------------------------- *
3 * Copyright 2006 Erwan Velu - All Rights Reserved
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
8 * Boston MA 02111-1307, USA; either version 2 of the License, or
9 * (at your option) any later version; incorporated herein by reference.
11 * ----------------------------------------------------------------------- */
13 #ifndef DMI_PROCESSOR_H
14 #define DMI_PROCESSOR_H
16 #include "stdbool.h"
17 #define PROCESSOR_SOCKET_DESIGNATION_SIZE 32
18 #define PROCESSOR_TYPE_SIZE 32
19 #define PROCESSOR_FAMILY_SIZE 32
20 #define PROCESSOR_MANUFACTURER_SIZE 64
21 #define PROCESSOR_VERSION_SIZE 32
22 #define PROCESSOR_VOLTAGE_SIZE 16
23 #define PROCESSOR_STATUS_SIZE 16
24 #define PROCESSOR_UPGRADE_SIZE 16
25 #define PROCESSOR_CACHE_SIZE 16
26 #define PROCESSOR_SERIAL_SIZE 32
27 #define PROCESSOR_ASSET_TAG_SIZE 32
28 #define PROCESSOR_PART_NUMBER_SIZE 32
29 #define PROCESSOR_ID_SIZE 32
31 #define PROCESSOR_FLAGS_ELEMENTS 32
32 /* Intel AP-485 revision 28, table 5 */
33 static const char *cpu_flags_strings[32]={
34 "FPU (Floating-point unit on-chip)", /* 0 */
35 "VME (Virtual mode extension)",
36 "DE (Debugging extension)",
37 "PSE (Page size extension)",
38 "TSC (Time stamp counter)",
39 "MSR (Model specific registers)",
40 "PAE (Physical address extension)",
41 "MCE (Machine check exception)",
42 "CX8 (CMPXCHG8 instruction supported)",
43 "APIC (On-chip APIC hardware supported)",
44 NULL, /* 10 */
45 "SEP (Fast system call)",
46 "MTRR (Memory type range registers)",
47 "PGE (Page global enable)",
48 "MCA (Machine check architecture)",
49 "CMOV (Conditional move instruction supported)",
50 "PAT (Page attribute table)",
51 "PSE-36 (36-bit page size extension)",
52 "PSN (Processor serial number present and enabled)",
53 "CLFSH (CLFLUSH instruction supported)",
54 NULL, /* 20 */
55 "DS (Debug store)",
56 "ACPI (ACPI supported)",
57 "MMX (MMX technology supported)",
58 "FXSR (Fast floating-point save and restore)",
59 "SSE (Streaming SIMD extensions)",
60 "SSE2 (Streaming SIMD extensions 2)",
61 "SS (Self-snoop)",
62 "HTT (Hyper-threading technology)",
63 "TM (Thermal monitor supported)",
64 NULL, /* 30 */
65 "PBE (Pending break enabled)" /* 31 */
68 /* this struct have PROCESSOR_FLAGS_ELEMENTS */
69 /* each bool is associated to the relevant message above */
70 typedef struct {
71 bool fpu;
72 bool vme;
73 bool de;
74 bool pse;
75 bool tsc;
76 bool msr;
77 bool pae;
78 bool mce;
79 bool cx8;
80 bool apic;
81 bool null_10;
82 bool sep;
83 bool mtrr;
84 bool pge;
85 bool mca;
86 bool cmov;
87 bool pat;
88 bool pse_36;
89 bool psn;
90 bool clfsh;
91 bool null_20;
92 bool ds;
93 bool acpi;
94 bool mmx;
95 bool fxsr;
96 bool sse;
97 bool sse2;
98 bool ss;
99 bool htt;
100 bool tm;
101 bool null_30;
102 bool pbe;
103 } __attribute__((__packed__)) s_cpu_flags;
105 typedef struct {
106 u8 type;
107 u8 family;
108 u8 model;
109 u8 stepping;
110 u8 minor_stepping;
111 } __attribute__((__packed__)) s_signature;
113 typedef struct {
114 char socket_designation[PROCESSOR_SOCKET_DESIGNATION_SIZE];
115 char type[PROCESSOR_TYPE_SIZE];
116 char family[PROCESSOR_FAMILY_SIZE];
117 char manufacturer[PROCESSOR_MANUFACTURER_SIZE];
118 char version[PROCESSOR_VERSION_SIZE];
119 float voltage;
120 u16 external_clock;
121 u16 max_speed;
122 u16 current_speed;
123 char status[PROCESSOR_STATUS_SIZE];
124 char upgrade[PROCESSOR_UPGRADE_SIZE];
125 char cache1[PROCESSOR_CACHE_SIZE];
126 char cache2[PROCESSOR_CACHE_SIZE];
127 char cache3[PROCESSOR_CACHE_SIZE];
128 char serial[PROCESSOR_SERIAL_SIZE];
129 char asset_tag[PROCESSOR_ASSET_TAG_SIZE];
130 char part_number[PROCESSOR_PART_NUMBER_SIZE];
131 char id[PROCESSOR_ID_SIZE];
132 s_cpu_flags cpu_flags;
133 s_signature signature;
134 } s_processor;
136 static const char *dmi_processor_type(u8 code)
138 /* 3.3.5.1 */
139 static const char *type[]={
140 "Other", /* 0x01 */
141 "Unknown",
142 "Central Processor",
143 "Math Processor",
144 "DSP Processor",
145 "Video Processor" /* 0x06 */
148 if(code>=0x01 && code<=0x06)
149 return type[code-0x01];
150 return out_of_spec;
153 static const char *dmi_processor_family(u8 code)
155 /* 3.3.5.2 */
156 static const char *family[]={
157 NULL, /* 0x00 */
158 "Other",
159 "Unknown",
160 "8086",
161 "80286",
162 "80386",
163 "80486",
164 "8087",
165 "80287",
166 "80387",
167 "80487",
168 "Pentium",
169 "Pentium Pro",
170 "Pentium II",
171 "Pentium MMX",
172 "Celeron",
173 "Pentium II Xeon",
174 "Pentium III",
175 "M1",
176 "M2",
177 NULL, /* 0x14 */
178 NULL,
179 NULL,
180 NULL, /* 0x17 */
181 "Duron",
182 "K5",
183 "K6",
184 "K6-2",
185 "K6-3",
186 "Athlon",
187 "AMD2900",
188 "K6-2+",
189 "Power PC",
190 "Power PC 601",
191 "Power PC 603",
192 "Power PC 603+",
193 "Power PC 604",
194 "Power PC 620",
195 "Power PC x704",
196 "Power PC 750",
197 NULL, /* 0x28 */
198 NULL,
199 NULL,
200 NULL,
201 NULL,
202 NULL,
203 NULL,
204 NULL,/* 0x2F */
205 "Alpha",
206 "Alpha 21064",
207 "Alpha 21066",
208 "Alpha 21164",
209 "Alpha 21164PC",
210 "Alpha 21164a",
211 "Alpha 21264",
212 "Alpha 21364",
213 NULL, /* 0x38 */
214 NULL,
215 NULL,
216 NULL,
217 NULL,
218 NULL,
219 NULL,
220 NULL, /* 0x3F */
221 "MIPS",
222 "MIPS R4000",
223 "MIPS R4200",
224 "MIPS R4400",
225 "MIPS R4600",
226 "MIPS R10000",
227 NULL, /* 0x46 */
228 NULL,
229 NULL,
230 NULL,
231 NULL,
232 NULL,
233 NULL,
234 NULL,
235 NULL,
236 NULL, /* 0x4F */
237 "SPARC",
238 "SuperSPARC",
239 "MicroSPARC II",
240 "MicroSPARC IIep",
241 "UltraSPARC",
242 "UltraSPARC II",
243 "UltraSPARC IIi",
244 "UltraSPARC III",
245 "UltraSPARC IIIi",
246 NULL, /* 0x59 */
247 NULL,
248 NULL,
249 NULL,
250 NULL,
251 NULL,
252 NULL, /* 0x5F */
253 "68040",
254 "68xxx",
255 "68000",
256 "68010",
257 "68020",
258 "68030",
259 NULL, /* 0x66 */
260 NULL,
261 NULL,
262 NULL,
263 NULL,
264 NULL,
265 NULL,
266 NULL,
267 NULL,
268 NULL, /* 0x6F */
269 "Hobbit",
270 NULL, /* 0x71 */
271 NULL,
272 NULL,
273 NULL,
274 NULL,
275 NULL,
276 NULL, /* 0x77 */
277 "Crusoe TM5000",
278 "Crusoe TM3000",
279 "Efficeon TM8000",
280 NULL, /* 0x7B */
281 NULL,
282 NULL,
283 NULL,
284 NULL, /* 0x7F */
285 "Weitek",
286 NULL, /* 0x81 */
287 "Itanium",
288 "Athlon 64",
289 "Opteron",
290 "Sempron",
291 NULL, /* 0x86 */
292 NULL,
293 NULL,
294 NULL,
295 NULL,
296 NULL,
297 NULL,
298 NULL,
299 NULL,
300 NULL, /* 0x8F */
301 "PA-RISC",
302 "PA-RISC 8500",
303 "PA-RISC 8000",
304 "PA-RISC 7300LC",
305 "PA-RISC 7200",
306 "PA-RISC 7100LC",
307 "PA-RISC 7100",
308 NULL, /* 0x97 */
309 NULL,
310 NULL,
311 NULL,
312 NULL,
313 NULL,
314 NULL,
315 NULL,
316 NULL, /* 0x9F */
317 "V30",
318 NULL, /* 0xA1 */
319 NULL,
320 NULL,
321 NULL,
322 NULL,
323 NULL,
324 NULL,
325 NULL,
326 NULL,
327 NULL,
328 NULL,
329 NULL,
330 NULL,
331 NULL,
332 NULL, /* 0xAF */
333 "Pentium III Xeon",
334 "Pentium III Speedstep",
335 "Pentium 4",
336 "Xeon",
337 "AS400",
338 "Xeon MP",
339 "Athlon XP",
340 "Athlon MP",
341 "Itanium 2",
342 "Pentium M",
343 NULL, /* 0xBA */
344 NULL,
345 NULL,
346 NULL,
347 NULL,
348 NULL,
349 NULL,
350 NULL,
351 NULL,
352 NULL,
353 NULL,
354 NULL,
355 NULL,
356 NULL, /* 0xC7 */
357 "IBM390",
358 "G4",
359 "G5",
360 NULL, /* 0xCB */
361 NULL,
362 NULL,
363 NULL,
364 NULL,
365 NULL,
366 NULL,
367 NULL,
368 NULL,
369 NULL,
370 NULL,
371 NULL,
372 NULL,
373 NULL,
374 NULL,
375 NULL,
376 NULL,
377 NULL,
378 NULL,
379 NULL,
380 NULL,
381 NULL,
382 NULL,
383 NULL,
384 NULL,
385 NULL,
386 NULL,
387 NULL,
388 NULL,
389 NULL,
390 NULL,
391 NULL,
392 NULL,
393 NULL,
394 NULL,
395 NULL,
396 NULL,
397 NULL,
398 NULL,
399 NULL,
400 NULL,
401 NULL,
402 NULL,
403 NULL,
404 NULL,
405 NULL,
406 NULL, /* 0xF9 */
407 "i860",
408 "i960",
409 NULL, /* 0xFC */
410 NULL,
411 NULL,
412 NULL /* 0xFF */
413 /* master.mif has values beyond that, but they can't be used for DMI */
416 if(family[code]!=NULL) {
417 return family[code];
419 return out_of_spec;
422 static const char *dmi_processor_status(u8 code)
424 static const char *status[]={
425 "Unknown", /* 0x00 */
426 "Enabled",
427 "Disabled By User",
428 "Disabled By BIOS",
429 "Idle", /* 0x04 */
430 "Other" /* 0x07 */
433 if(code<=0x04)
434 return status[code];
435 if(code==0x07)
436 return status[0x05];
437 return out_of_spec;
439 static const char *dmi_processor_upgrade(u8 code)
441 /* 3.3.5.5 */
442 static const char *upgrade[]={
443 "Other", /* 0x01 */
444 "Unknown",
445 "Daughter Board",
446 "ZIF Socket",
447 "Replaceable Piggy Back",
448 "None",
449 "LIF Socket",
450 "Slot 1",
451 "Slot 2",
452 "370-pin Socket",
453 "Slot A",
454 "Slot M",
455 "Socket 423",
456 "Socket A (Socket 462)",
457 "Socket 478",
458 "Socket 754",
459 "Socket 940",
460 "Socket 939" /* 0x12 */
463 if(code>=0x01 && code<=0x11)
464 return upgrade[code-0x01];
465 return out_of_spec;
468 static void dmi_processor_cache(u16 code, const char *level, u16 ver, char *cache)
470 if(code==0xFFFF)
472 if(ver>=0x0203)
473 sprintf(cache,"Not Provided");
474 else
475 sprintf(cache,"No %s Cache", level);
477 else
478 sprintf(cache,"0x%04X", code);
482 #endif