1 /* ----------------------------------------------------------------------- *
3 * Copyright 2006 Erwan Velu - All Rights Reserved
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
8 * Boston MA 02111-1307, USA; either version 2 of the License, or
9 * (at your option) any later version; incorporated herein by reference.
11 * ----------------------------------------------------------------------- */
13 #ifndef DMI_PROCESSOR_H
14 #define DMI_PROCESSOR_H
17 #define PROCESSOR_SOCKET_DESIGNATION_SIZE 32
18 #define PROCESSOR_TYPE_SIZE 32
19 #define PROCESSOR_FAMILY_SIZE 32
20 #define PROCESSOR_MANUFACTURER_SIZE 64
21 #define PROCESSOR_VERSION_SIZE 32
22 #define PROCESSOR_VOLTAGE_SIZE 16
23 #define PROCESSOR_STATUS_SIZE 16
24 #define PROCESSOR_UPGRADE_SIZE 16
25 #define PROCESSOR_CACHE_SIZE 16
26 #define PROCESSOR_SERIAL_SIZE 32
27 #define PROCESSOR_ASSET_TAG_SIZE 32
28 #define PROCESSOR_PART_NUMBER_SIZE 32
29 #define PROCESSOR_ID_SIZE 32
31 #define PROCESSOR_FLAGS_ELEMENTS 32
32 /* Intel AP-485 revision 28, table 5 */
33 static const char *cpu_flags_strings
[32]={
34 "FPU (Floating-point unit on-chip)", /* 0 */
35 "VME (Virtual mode extension)",
36 "DE (Debugging extension)",
37 "PSE (Page size extension)",
38 "TSC (Time stamp counter)",
39 "MSR (Model specific registers)",
40 "PAE (Physical address extension)",
41 "MCE (Machine check exception)",
42 "CX8 (CMPXCHG8 instruction supported)",
43 "APIC (On-chip APIC hardware supported)",
45 "SEP (Fast system call)",
46 "MTRR (Memory type range registers)",
47 "PGE (Page global enable)",
48 "MCA (Machine check architecture)",
49 "CMOV (Conditional move instruction supported)",
50 "PAT (Page attribute table)",
51 "PSE-36 (36-bit page size extension)",
52 "PSN (Processor serial number present and enabled)",
53 "CLFSH (CLFLUSH instruction supported)",
56 "ACPI (ACPI supported)",
57 "MMX (MMX technology supported)",
58 "FXSR (Fast floating-point save and restore)",
59 "SSE (Streaming SIMD extensions)",
60 "SSE2 (Streaming SIMD extensions 2)",
62 "HTT (Hyper-threading technology)",
63 "TM (Thermal monitor supported)",
65 "PBE (Pending break enabled)" /* 31 */
68 /* this struct have PROCESSOR_FLAGS_ELEMENTS */
69 /* each bool is associated to the relevant message above */
103 } __attribute__((__packed__
)) s_cpu_flags
;
111 } __attribute__((__packed__
)) s_signature
;
114 char socket_designation
[PROCESSOR_SOCKET_DESIGNATION_SIZE
];
115 char type
[PROCESSOR_TYPE_SIZE
];
116 char family
[PROCESSOR_FAMILY_SIZE
];
117 char manufacturer
[PROCESSOR_MANUFACTURER_SIZE
];
118 char version
[PROCESSOR_VERSION_SIZE
];
123 char status
[PROCESSOR_STATUS_SIZE
];
124 char upgrade
[PROCESSOR_UPGRADE_SIZE
];
125 char cache1
[PROCESSOR_CACHE_SIZE
];
126 char cache2
[PROCESSOR_CACHE_SIZE
];
127 char cache3
[PROCESSOR_CACHE_SIZE
];
128 char serial
[PROCESSOR_SERIAL_SIZE
];
129 char asset_tag
[PROCESSOR_ASSET_TAG_SIZE
];
130 char part_number
[PROCESSOR_PART_NUMBER_SIZE
];
131 char id
[PROCESSOR_ID_SIZE
];
132 s_cpu_flags cpu_flags
;
133 s_signature signature
;
136 static const char *dmi_processor_type(u8 code
)
139 static const char *type
[]={
145 "Video Processor" /* 0x06 */
148 if(code
>=0x01 && code
<=0x06)
149 return type
[code
-0x01];
153 static const char *dmi_processor_family(u8 code
)
156 static const char *family
[]={
334 "Pentium III Speedstep",
413 /* master.mif has values beyond that, but they can't be used for DMI */
416 if(family
[code
]!=NULL
) {
422 static const char *dmi_processor_status(u8 code
)
424 static const char *status
[]={
425 "Unknown", /* 0x00 */
439 static const char *dmi_processor_upgrade(u8 code
)
442 static const char *upgrade
[]={
447 "Replaceable Piggy Back",
456 "Socket A (Socket 462)",
460 "Socket 939" /* 0x12 */
463 if(code
>=0x01 && code
<=0x11)
464 return upgrade
[code
-0x01];
468 static void dmi_processor_cache(u16 code
, const char *level
, u16 ver
, char *cache
)
473 sprintf(cache
,"Not Provided");
475 sprintf(cache
,"No %s Cache", level
);
478 sprintf(cache
,"0x%04X", code
);