architecture/riscv64/package/u-boot/0016-riscv-sifive-unmatched-disable-FDT-and-initrd-reloca.patch

   1 From 1998aacd5faef21c665fa7b4771aeb9193bfd247 Mon Sep 17 00:00:00 2001
   2 From: David Abdurachmanov <david.abdurachmanov@sifive.com>
   3 Date: Mon, 13 Sep 2021 03:22:32 -0700
   4 Subject: [PATCH 16/16] riscv: sifive: unmatched: disable FDT and initrd
   5  relocation
   6
   7 Same as on SiFive Unleashed we need to disable fdt and initrd relocation. Tom
   8 Rini mentined 18 days ago that it's most likely due to RISC-V lacking
   9 `arch_lmb_reserve` implementation.
  10
  11 The patch seems to be submitted now:
  12 [PATCH 09/12] lmb: riscv: Add arch_lmb_reserve()
  13 https://lists.denx.de/pipermail/u-boot/2021-September/460333.html
  14
  15 Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
  16 ---
  17  include/configs/sifive-unmatched.h | 2 ++
  18  1 file changed, 2 insertions(+)
  19
  20 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h
  21 index 7254e06..3b72304 100644
  22 --- a/include/configs/sifive-unmatched.h
  23 +++ b/include/configs/sifive-unmatched.h
  24 @@ -62,6 +62,8 @@
  25         "name=system,size=-,bootable,type=${type_guid_gpt_system};"
  26
  27  #define CONFIG_EXTRA_ENV_SETTINGS \
  28 +       "fdt_high=0xffffffffffffffff\0" \
  29 +       "initrd_high=0xffffffffffffffff\0" \
  30         "kernel_addr_r=0x84000000\0" \
  31         "fdt_addr_r=0x88000000\0" \
  32         "scriptaddr=0x88100000\0" \
  33 --
  34 2.7.4
  35