architecture/riscv64/package/u-boot/9999-hfive-overclock.patch

   1 --- u-boot-2021.07/arch/riscv/dts/fu740-c000-u-boot.dtsi.vanilla        2021-11-14 17:13:35.562301035 +0100
   2 +++ u-boot-2021.07/arch/riscv/dts/fu740-c000-u-boot.dtsi        2021-11-14 17:13:45.414300642 +0100
   3 @@ -8,7 +8,7 @@
   4  / {
   5         cpus {
   6                 assigned-clocks = <&prci PRCI_CLK_COREPLL>;
   7 -               assigned-clock-rates = <1200000000>;
   8 +               assigned-clock-rates = <1400000000>;
   9                 u-boot,dm-spl;
  10                 cpu0: cpu@0 {
  11                         clocks = <&prci PRCI_CLK_COREPLL>;
  12 --- u-boot-2021.07/arch/riscv/dts/fu740-c000-u-boot.dtsi.vanilla        2021-11-14 22:20:08.037567674 +0100
  13 +++ u-boot-2021.07/arch/riscv/dts/fu740-c000-u-boot.dtsi        2021-11-15 10:17:17.083851981 +0100
  14 @@ -77,7 +77,7 @@
  15                                0x0 0x100b2000 0x0 0x2000
  16                                0x0 0x100b8000 0x0 0x1000>;
  17                         clocks = <&prci PRCI_CLK_DDRPLL>;
  18 -                       clock-frequency = <933333324>;
  19 +                       clock-frequency = <933333324>;
  20                         u-boot,dm-spl;
  21                 };
  22         };