package/develop/gcc/g5-cell-not-power7.patch

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  16
  17 Glibc uses .machine to determine assembly optimizations to use, and G5 as well
  18 as cell, and even power4 -maltivec resulted in power7. Mask _ALTIVEC away
  19 as the .machine selection already did for GFX and GPOPT.
  20
  21 Signed-of-by: René Rebe <rene@exactcode.de>
  22
  23 --- gcc-11.1.0-RC-20210423/gcc/config/rs6000/rs6000.c.vanilla   2021-04-25 22:57:16.964223106 +0200
  24 +++ gcc-11.1.0-RC-20210423/gcc/config/rs6000/rs6000.c   2021-04-25 22:57:27.193223841 +0200
  25 @@ -5765,7 +5765,7 @@
  26    HOST_WIDE_INT flags = rs6000_isa_flags;
  27
  28    /* Disable the flags that should never influence the .machine selection.  */
  29 -  flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL);
  30 +  flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ALTIVEC | OPTION_MASK_ISEL);
  31
  32    if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
  33      return "power10";