architecture/riscv64/package/u-boot/0005-riscv-sifive-fu740-Support-i2c-in-spl.patch

   1 From bda688c4b0cda4bd20ccf1d771f1f4285a9adf27 Mon Sep 17 00:00:00 2001
   2 From: Zong Li <zong.li@sifive.com>
   3 Date: Wed, 30 Jun 2021 23:23:47 +0800
   4 Subject: [PATCH 05/16] riscv: sifive: fu740: Support i2c in spl
   5
   6 Enable SPL_I2C_SUPPORT for fu740, and add 'u-boot,dm-spl' property in
   7 i2c node.
   8
   9 Signed-off-by: Zong Li <zong.li@sifive.com>
  10 Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
  11 ---
  12  arch/riscv/cpu/fu740/Kconfig          | 1 +
  13  arch/riscv/dts/fu740-c000-u-boot.dtsi | 4 ++++
  14  2 files changed, 5 insertions(+)
  15
  16 diff --git a/arch/riscv/cpu/fu740/Kconfig b/arch/riscv/cpu/fu740/Kconfig
  17 index 1dc052b..8e54310 100644
  18 --- a/arch/riscv/cpu/fu740/Kconfig
  19 +++ b/arch/riscv/cpu/fu740/Kconfig
  20 @@ -37,3 +37,4 @@ config SIFIVE_FU740
  21         imply PWM_SIFIVE
  22         imply DM_I2C
  23         imply SYS_I2C_OCORES
  24 +       imply SPL_I2C_SUPPORT
  25 diff --git a/arch/riscv/dts/fu740-c000-u-boot.dtsi b/arch/riscv/dts/fu740-c000-u-boot.dtsi
  26 index a5d0688..a6f7a08 100644
  27 --- a/arch/riscv/dts/fu740-c000-u-boot.dtsi
  28 +++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi
  29 @@ -95,6 +95,10 @@
  30         u-boot,dm-spl;
  31  };
  32
  33 +&i2c0 {
  34 +       u-boot,dm-spl;
  35 +};
  36 +
  37  &eth0 {
  38         assigned-clocks = <&prci PRCI_CLK_GEMGXLPLL>;
  39         assigned-clock-rates = <125125000>;
  40 --
  41 2.7.4
  42