arch/.unmaintained/m68k-pp-native/exec/init.c

   1 /*
   2     Copyright © 1995-2001, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6
   7 #define AROS_USE_OOP
   8
   9 #include <aros/config.h>
  10 #include <exec/io.h>
  11 #include <exec/types.h>
  12 #include <exec/nodes.h>
  13 #include <exec/memory.h>
  14 #include <exec/resident.h>
  15 #include <exec/libraries.h>
  16 #include <exec/execbase.h>
  17 #include <proto/oop.h>
  18 #include <proto/exec.h>
  19
  20 #include <devices/keyboard.h>
  21
  22 #define DEBUG 1
  23 #include <aros/debug.h>
  24 #include <aros/core.h>
  25 #include <asm/registers.h>
  26
  27 #include "memory.h"
  28 #include "traps.h"
  29 #include <memory.h>
  30
  31 #include "exec_intern.h"
  32 #include "etask.h"
  33
  34 extern struct ExecBase * PrepareExecBase(struct MemHeader *);
  35 extern void switch_to_user_mode(void *, ULONG *);
  36 extern void main_init_cont(void);
  37 extern struct MemHeader * detect_memory(void);
  38
  39
  40 /*
  41  * Just to be sure all of these modules get linked into the
  42  * final module, this structure should stay here, because
  43  * otherwise the linker might not take it if there is no
  44  * reference to a certain module at all.
  45  */
  46 extern const struct Resident
  47         Expansion_resident,
  48         Exec_resident,
  49         Utility_resident,
  50         Aros_resident,
  51         OOP_resident,
  52         HIDD_resident,
  53         Mathieeesingbas_resident,
  54         irqHidd_resident,
  55         Graphics_resident,
  56         Layers_resident,
  57         Timer_resident,
  58         Misc_resident,
  59         Battclock_resident,
  60         Keyboard_resident,
  61         Gameport_resident,
  62         Keymap_resident,
  63         Input_resident,
  64         Intuition_resident,
  65         hiddgraphics_resident,
  66         displayHidd_resident,
  67         hiddserial_resident,
  68         mouseHidd_resident,
  69         Console_resident,
  70         TrackDisk_resident,
  71         ide_resident,
  72         Workbench_resident,
  73         Mathffp_resident,
  74         boot_resident,
  75         Dos_resident,
  76         LDDemon_resident,
  77         con_handler_resident,
  78         AFS_resident;
  79
  80
  81 /* This list MUST be in the correct order (priority). */
  82 static const struct Resident *romtagList[] =
  83 {
  84         &Expansion_resident,
  85         &Exec_resident,
  86         &Utility_resident,
  87         &Aros_resident,
  88         &Mathieeesingbas_resident,
  89         &OOP_resident,
  90         &HIDD_resident,
  91         &irqHidd_resident,
  92         &Graphics_resident,
  93         &Layers_resident,
  94         &Timer_resident,
  95         &Misc_resident,
  96         &Battclock_resident,
  97         &Keyboard_resident,
  98         &Gameport_resident,
  99         &Keymap_resident,
 100         &Input_resident,
 101         &Intuition_resident,
 102         &hiddgraphics_resident,
 103         &displayHidd_resident,
 104         &hiddserial_resident,
 105         &Console_resident,
 106         &Workbench_resident,
 107         &Mathffp_resident,
 108         &boot_resident,
 109         &Dos_resident,
 110         &LDDemon_resident,
 111         &con_handler_resident
 112 };
 113
 114 /************************************************************************************/
 115
 116 void processor_init(void)
 117 {
 118         /************ CPU setup *******************/
 119         __asm__ __volatile__("oriw #0x0700,%%sr" :: );
 120
 121         /************ LCD Controller **************/
 122         /*
 123          * Turn the LCD controller on
 124          */
 125         WREG_B(PFDATA) = 0x010;
 126
 127         WREG_L(LSSA)  = 0x90000;
 128         WREG_B(LVPW)  = 160/16;
 129         WREG_W(LXMAX) = 160-1;
 130         WREG_W(LYMAX) = 160-1;
 131         WREG_W(LCXP)  = 80;
 132         WREG_W(LCYP)  = 80;
 133         WREG_W(LCWCH) = (10 << 8) | 10;
 134         WREG_B(LBLKC) = 0x80 | 0x10;
 135         WREG_B(LPICF) = 0x4;
 136
 137 #if 0
 138         // DO NOT ACTIVATE THESE! IT STOPS OUTPUT ON XCOPILOT!!
 139         WREG_B(LPOLCF)= 0x0;
 140         WREG_B(LACDRC)= 0x0;
 141         WREG_B(LPXCD) = 0x0;
 142         WREG_B(LCKCON)= 0x0;
 143         WREG_W(LRRA)  = 0x0;
 144 #endif
 145         WREG_B(LPOSR) = 0x0;
 146         WREG_B(LOTCR) = 0x4e; // 0xfffffa2b
 147
 148         /************* Interrupt Controller **********/
 149         WREG_L(IMR) = ~((1 << 1) | (1 << 5));
 150         WREG_B(IVR) = 0x40;
 151 }
 152
 153 /************************************************************************************/
 154 extern ULONG initial_ssp;
 155
 156 void main_init(void)
 157 {
 158         struct ExecBase *SysBase = NULL;
 159         ULONG * m68k_USP;
 160         UWORD * rom_ranges[] = {(UWORD *)0x10c00000 , (UWORD *)0x10c00000 + (1024 * 1024),
 161                                 (UWORD *)~0};
 162 #define MAX_MEM_HEADERS 10
 163         struct MemHeader * mh =  NULL;
 164
 165         processor_init();
 166
 167         /*
 168          * detect memory of the system
 169          */
 170         mh = detect_memory();
 171
 172         /*
 173             We have to put somewhere in this function checking for ColdStart,
 174             CoolStart and many other Exec vectors!
 175          */
 176
 177         /*
 178            It is OK to place ExecBase here. Remember that interrupt table starts
 179            at 0x0100UL address, so 4UL is quite safe.
 180            Even with MP this addr is OK for ExecBase. We may write an int handler
 181            which detects "read from 4UL" commands.
 182          */
 183
 184         SysBase = (struct ExecBase*)PrepareExecBase(mh);
 185         *(APTR *)0x4 = SysBase;
 186
 187         /*
 188           Setup ChkBase (checksum for base ptr), ChkSum (for library)
 189           SysBase+ChkBase should be -1 otherwise somebody has destroyed ExecBase!
 190          */
 191         SysBase->ChkBase=~(ULONG)SysBase;
 192 #warning TODO: SysBase->ChkSum=.....
 193
 194         if (NULL == (m68k_USP =(ULONG *)AllocMem(AROS_STACKSIZE,MEMF_PUBLIC)))  {
 195                 do {} while(1);
 196         }
 197         m68k_USP = (ULONG *)(((ULONG)m68k_USP) + AROS_STACKSIZE);
 198
 199         /*
 200          * Allocate memory for the SSP. The SSP is already set
 201          * but I need to AllocAbs() it so nobody else will step on this
 202          * memory.
 203          */
 204         if (NULL == AllocAbs(AROS_STACKSIZE,
 205                              (APTR)(initial_ssp+sizeof(ULONG)-AROS_STACKSIZE))) {
 206                 D(bug("Alloc for SSP failed!\n"));
 207         }
 208         D(bug("SSP: %x\n",initial_ssp));
 209
 210         SysBase->ResModules=Exec_RomTagScanner(SysBase, rom_ranges);
 211
 212         /*
 213          * Init the core
 214          */
 215         init_core(SysBase);
 216         Init_Traps();
 217         /*
 218          * This is the last place where I am in supervisor mode.
 219          * so let me switch into user mode and continue there.
 220          * The user mode function will then call main_init_cont.
 221          */
 222         switch_to_user_mode(main_init_cont, m68k_USP);
 223 }
 224
 225 /*
 226  * The following function will be executed whan AROS is in user mode
 227  */
 228 void main_init_cont(void)
 229 {
 230         InitCode(RTF_SINGLETASK, 0);
 231
 232         /*
 233            All done. In normal cases CPU should never reach this point
 234          */
 235
 236 *(ULONG *)0xc0debad0 = 0;
 237
 238 }