added concrete implementations of putc(), getc(), getchar() and gets()
[tangerine.git] / arch / i386-pc / include / asm / irq.h
blobfd33dc325c631ed2c2fb8bdf4359695fce153fe1
1 #ifndef ASM_IRQ_H
2 #define ASM_IRQ_H
4 /*
5 Copyright © 1995-2001, The AROS Development Team. All rights reserved.
6 $Id$
8 Desc: Interrupt core, part of kernel.resource
9 Lang: english
12 #include <asm/segments.h>
13 #include <asm/linkage.h>
14 #include <asm/ptrace.h>
16 /* interrupt control.. */
18 #define __sti() __asm__ __volatile__ ("sti": : :"memory")
19 #define __cli() __asm__ __volatile__ ("cli": : :"memory")
21 /*********************************************************************/
23 #define __STR(x) #x
24 #define STR(x) __STR(x)
26 /*********************************************************************/
29 * This is standard macro used to save register frame on the supervisor
30 * stack. Supposes that orig_eax is saved already.
32 #define SAVE_REGS \
33 "cld \n\t" \
34 "pushl %eax \n\t" \
35 "pushl %ecx \n\t" \
36 "pushl %edx \n\t" \
37 "push %ds \n\t" \
38 "push %es \n\t" \
39 "movl $"STR(KERNEL_DS)",%edx\n\t" \
40 "mov %dx,%ds \n\t" \
41 "mov %dx,%es \n\t"
43 #define RESTORE_REGS \
44 "pop %es \n\t" \
45 "pop %ds \n\t" \
46 "popl %edx \n\t" \
47 "popl %ecx \n\t" \
48 "popl %eax \n\t"
50 #define R_es 0x00
51 #define R_ds 0x04
52 #define R_edx 0x08
53 #define R_ecx 0x0c
54 #define R_eax 0x10
55 #define R_param 0x14
58 Save/restore all registers. These macros are used mostly inside Switch
59 procedure.
62 #define SAVE_ALL \
63 "cld \n\t" \
64 "push %es \n\t" \
65 "push %ds \n\t" \
66 "pushl %eax \n\t" \
67 "pushl %ebp \n\t" \
68 "pushl %edi \n\t" \
69 "pushl %esi \n\t" \
70 "pushl %edx \n\t" \
71 "pushl %ecx \n\t" \
72 "pushl %ebx \n\t" \
73 "movl $"STR(KERNEL_DS)",%edx \n\t"\
74 "mov %dx,%ds \n\t" \
75 "mov %dx,%es \n\t"
77 #define RESTORE_ALL \
78 "popl %ebx \n\t" \
79 "popl %ecx \n\t" \
80 "popl %edx \n\t" \
81 "popl %esi \n\t" \
82 "popl %edi \n\t" \
83 "popl %ebp \n\t" \
84 "popl %eax \n\t" \
85 "pop %ds \n\t" \
86 "pop %es \n\t"
88 #define FIRST_EXT_VECTOR 0x20 /* This is exactly what Intel says about */
89 #define SYSTEM_VECTOR 0x80 /* Vector callable from user mode */
91 #define NR_IRQS 16 /* Use all XT-PIC interrupts */
92 #define NR_SYSCALLS 4
95 * Structure used to describe interrupt controler. Sufficient to describe
96 * the low-level hardware
99 struct irqController
101 const char *ic_Name; /* Controller name */
102 void (*ic_startup)(unsigned int); /* All functions here! */
103 void (*ic_shutdown)(unsigned int);
104 void (*ic_handle)(unsigned int, struct pt_regs *);
105 void (*ic_enable)(unsigned int);
106 void (*ic_disable)(unsigned int);
109 struct irqServer
111 void (*is_handler)(int, void *, struct pt_regs *);
112 const char *is_name; /* Server name */
113 void *is_UserData; /* Will be class data or similar */
116 struct irqDescriptor
118 unsigned int id_status; /* IRQ status. See below for details */
119 struct irqController *id_handler; /* how to do emable/disable */
120 struct irqServer *id_server; /* Server pointer */
121 unsigned int id_depth; /* Disable depth for nested IRQs */
122 unsigned int id_count; /* IRQ counter */
123 unsigned int id_unused[3];
126 /* IRQ status */
128 #define IRQ_INPROGRESS 1 /* Handler active - DO NOT enter */
129 #define IRQ_DISABLED 2 /* IRQ disabled - DO NOT enter */
130 #define IRQ_PENDING 4 /* IRQ pending - replay on enable */
131 #define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */
132 #define IRQ_AUTODETECT 16 /* IRQ is beeing autodetected */
133 #define IRQ_WAITING 32 /* IRQ not seen yet - for autodetection */
135 #endif /* ASM_IRQ_H */