compiler/include/hardware/cpu/cpu.h

   1 /*
   2     Copyright © 1995-2001, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: AROS Generic CPU Definitions.
   6     Lang: english
   7 */
   8 #ifndef __AROS_CPU_H__
   9 #define __AROS_CPU_H__
  10
  11 #ifndef EXEC_LISTS_H
  12 #   include <exec/lists.h>
  13 #endif
  14 #ifndef EXEC_SEMAPHORES
  15 #   include <exec/semaphores.h>
  16 #endif
  17
  18 #include <hardware/acpi/acpi.h>
  19 #include <hardware/pic/pic.h>
  20
  21 /* ALL supported processor families should have an entry here (for future compatability - DO NOT CHANGE THE ORDER!) */
  22
  23 enum supported_CPU_families
  24 {
  25     CPU_Family_Undefined    = 0,
  26     CPU_Family_68k          = 1,
  27     CPU_Family_PPC          = 2,
  28     CPU_Family_i386         = 3,
  29 };
  30
  31 /* ALL supported processor chips */
  32
  33 enum supported_CPU_chips
  34 {
  35     CPU_Undefined           = 0,
  36
  37     CPU_68k_68000           = 1,
  38     CPU_68k_68010           = 2,
  39     CPU_68k_68020           = 3,
  40     CPU_68k_68030           = 4,
  41     CPU_68k_68040           = 5,
  42     CPU_68k_68060           = 6,
  43
  44     CPU_PPC_                = 100,
  45
  46     CPU_i386_386            = 200,
  47     CPU_i386_486            = 201,
  48     CPU_i386_586            = 202,
  49     CPU_i386_686            = 203,
  50     CPU_i386_786            = 204,
  51     CPU_i386_886            = 205,
  52 };
  53
  54 enum supported_FPU_chips
  55 {
  56     FPU_68881               = 0,
  57     FPU_68882               = 1,
  58     FPU_68040               = 2,
  59 };
  60
  61 /***********/
  62
  63 struct CPUFam_Definition
  64 {
  65     struct MinList          CPUF_FamilyList;
  66     APTR                    CPUF_Name;
  67     ULONG                   CPUF_FamilyID;
  68     APTR                    CPUF_Resource;
  69 };
  70
  71 struct CPU_Definition       /* each "processor" in the system is allocated one of these blocks */
  72 {
  73     struct MinList          CPU_CPUList;                        /* Is there another CPU in this system?                     */
  74     ULONG                   *CPU_SMPGroup;                      /* Points to this CPUS SMP group (if applicable)            */
  75
  76     ULONG                   CPU_ID;                             /* ID for processor in the system processor list
  77                                                                    ID = 0 = listbase (not a cpu - they start at 1)          */
  78     ULONG                   CPU_Physical;                       /* SMP Physical Processor ID (if applicable)                */
  79                                                                 /* for CPU_ID 0 , this contains the number of processors    */
  80     ULONG                   CPU_Family;
  81     ULONG                   CPU_Model;
  82
  83     BOOL                    CPU_Enabled;                        /* Can this CPU be used?                                    */
  84     BOOL                    CPU_IsOnline;                       /* is this CPU running?                                     */
  85     BOOL                    CPU_BootCPU;                        /* Was this the CPU that booted the system..                */
  86
  87     /* The next 4 pointers are used to store processor specific information */
  88
  89     APTR                    CPU_Private1;                       /* CPU architecture specific control information etc
  90                                                                     i386 stores i386_compat_intern here....                 */
  91     APTR                    CPU_Private2;                       /* CPU architecture specific control information etc        */
  92     APTR                    CPU_Private3;                       /* CPU architecture specific control information etc        */
  93     APTR                    CPU_Private4;                       /* CPU architecture specific control information etc        */
  94 };
  95
  96 struct SMP_Definition       /* each SMP processor group in the system is allocated one of these blocks */
  97 {
  98     struct MinList          SMP_SMPList;                        /*  Are there MORE SMP groups!?!?!?                         */
  99     struct SignalSemaphore  SMP_GrpLock;                        /* Control access to the SMP group..                        */
 100     ULONG                   SMP_ID;                             /* Which SMP Group is this                                  */
 101     ULONG                   SMP_CPUCount;                       /* SMP Physical Processor ID (if applicable)                */
 102     ULONG                   SMP_RecordCount;                    /* No. of records in the SMP config                         */
 103     ULONG                   SMP_PIC_Mode;
 104     ULONG                   *SMP_APIC;                          /* Points to the local APIC address                         */
 105 };
 106
 107 /***********/
 108
 109 struct CPUBase
 110 {
 111     struct  Node                CPUB_Node;
 112     struct  ExecBase            *CPUB_SysBase;
 113     struct  UtilityBase         *CPUB_UtilBase;
 114     struct  ACPIBase            *CPUB_ACPIBase;
 115     struct  PICBase             *CPUB_PICBase;
 116
 117     struct SignalSemaphore      CPUB_ListLock;                   /* Control access to the cpu list..                         */
 118
 119     struct CPUFam_Definition    *CPUB_ProcFamilies;
 120
 121     struct CPU_Definition       *CPUB_Processors;               /* Lists ALL processors in the system                       */
 122     struct SMP_Definition       *CPUB_SMP_Groups;               /* Points to a list of SMP groups                           */
 123
 124     LONG                        CPUB_BOOT_Physical;
 125     LONG                        CPUB_BOOT_Logical;
 126
 127     BOOL                        CPUB_SMP_Enabled;
 128     int                         CPUB_SMP_Config;
 129
 130 };
 131
 132 #endif /* __AROS_CPU_H__ */