Added 400ns delay in ata_WaitBusyTO before read of device status.
[tangerine.git] / arch / common / hidd.nvidia / nv.h
blob9614cac9d394c38d61450e335ec00d7c6b2de403
1 #ifndef _NV_H
2 #define _NV_H
3 /*
4 Copyright © 2004-2007, The AROS Development Team. All rights reserved.
5 $Id$
7 Desc: private header file
8 Lang: English
9 */
11 #include <exec/types.h>
12 #include <exec/libraries.h>
13 #include <exec/semaphores.h>
14 #include <exec/nodes.h>
15 #include <exec/execbase.h>
16 #include <exec/memory.h>
18 #include <dos/bptr.h>
20 #include <oop/oop.h>
22 #include <hidd/pci.h>
23 #include <hidd/graphics.h>
25 #include "nv_local.h"
26 #include "riva_hw.h"
28 #define IID_Hidd_Gfx_nVidia "hidd.gfx.nv"
29 #define CLID_Hidd_Gfx_nVidia "hidd.gfx.nv"
31 #define IID_Hidd_nvBitMap "hidd.bitmap.nv"
33 enum {
34 aoHidd_nvBitMap_Drawable,
36 num_Hidd_nvBitMap_Attrs
39 #define aHidd_nvBitMap_Drawable (HiddNVidiaBitMapAttrBase + aoHidd_nvBitMap_Drawable)
41 #define IS_BM_ATTR(attr, idx) (((idx)=(attr)-HiddBitMapAttrBase) < num_Hidd_BitMap_Attrs)
42 #define IS_NVBM_ATTR(attr, idx) (((idx)=(attr)-HiddNVidiaBitMapAttrBase) < num_Hidd_nvBitMap_Attrs)
44 typedef enum {
45 NV04 = 0, NV05, NV05M64, NV06, NV10,
46 NV11, NV11M, NV15, NV17, NV17M,
47 NV18, NV18M, NV20, NV25, NV28,
48 NV30, NV31, NV34, NV35, NV36,
49 NV43,
51 CardType_Sizeof
52 } CardType;
54 typedef struct _sync {
55 ULONG pixelc;
56 ULONG flags;
57 ULONG HDisplay, HSyncStart, HSyncEnd, HTotal;
58 ULONG VDisplay, VSyncStart, VSyncEnd, VTotal;
59 } Sync;
61 typedef struct CardState {
62 ULONG bpp;
63 ULONG bitsPerPixel;
64 ULONG width;
65 ULONG height;
66 ULONG interlace;
67 ULONG repaint0;
68 ULONG repaint1;
69 ULONG screen;
70 ULONG scale;
71 ULONG dither;
72 ULONG extra;
73 ULONG fifo;
74 ULONG pixel;
75 ULONG horiz;
76 ULONG arbitration0;
77 ULONG arbitration1;
78 ULONG vpll;
79 ULONG vpll2;
80 ULONG vpllB;
81 ULONG vpll2B;
82 ULONG pllsel;
83 ULONG general;
84 ULONG crtcOwner;
85 ULONG head;
86 ULONG head2;
87 ULONG config;
88 ULONG cursorConfig;
89 ULONG cursor0;
90 ULONG cursor1;
91 ULONG cursor2;
92 ULONG offset;
93 ULONG pitch;
94 ULONG pll;
95 ULONG pllB;
96 ULONG timingH;
97 ULONG timingV;
98 ULONG displayV;
99 struct {
100 UBYTE attr[0x15];
101 UBYTE crtc[0x41];
102 UBYTE gra[0x09];
103 UBYTE seq[0x05];
104 UBYTE dac[256*3];
105 UBYTE misc;
106 } Regs;
107 } RIVA_HW_STATE;
109 struct staticdata;
111 typedef struct Card {
112 UWORD VendorID;
113 UWORD ProductID;
114 APTR FbAddress;
115 UBYTE *FrameBuffer;
116 ULONG FrameBufferSize;
117 ULONG FbUsableSize;
118 APTR Registers;
119 CardType Type;
120 BOOL FlatPanel;
121 BOOL paletteEnabled;
123 UWORD Architecture;
124 UWORD Chipset; /* == ProductID */
125 ULONG CrystalFreqKHz;
126 ULONG RamAmountKBytes;
127 ULONG MaxVClockFreqKHz;
128 ULONG MinVClockFreqKHz;
129 ULONG RamBandwidthKBytesPerSec;
130 ULONG EnableIRQ;
131 ULONG IO;
132 ULONG VBlankBit;
133 ULONG FifoFreeCount;
134 ULONG FifoEmptyCount;
135 ULONG CursorStart;
136 ULONG flatPanel;
137 ULONG CRTCnumber;
138 ULONG Television;
139 ULONG fpWidth;
140 ULONG fpHeight;
141 BOOL twoHeads;
142 BOOL twoStagePLL;
143 BOOL fpScaler;
144 BOOL alphaCursor;
145 ULONG cursorVisible;
147 ULONG dmaPut;
148 ULONG dmaCurrent;
149 ULONG dmaFree;
150 ULONG dmaMax;
151 ULONG *dmaBase;
153 ULONG currentROP;
155 volatile ULONG *PCRTC0;
156 volatile ULONG *PCRTC;
157 volatile ULONG *PRAMDAC0;
158 volatile ULONG *PFB;
159 volatile ULONG *PFIFO;
160 volatile ULONG *PGRAPH;
161 volatile ULONG *PEXTDEV;
162 volatile ULONG *PTIMER;
163 volatile ULONG *PMC;
164 volatile ULONG *PRAMIN;
165 volatile ULONG *FIFO;
166 volatile ULONG *CURSOR;
167 volatile UBYTE *PCIO0;
168 volatile UBYTE *PCIO;
169 volatile UBYTE *PVIO;
170 volatile UBYTE *PDIO0;
171 volatile UBYTE *PDIO;
172 volatile ULONG *PRAMDAC;
174 struct CardState *CurrentState;
176 void (*DMAKickoffCallback)(struct staticdata *sd);
177 } RIVA_HW_INST, *NVPtr;
179 struct staticdata {
180 struct MemHeader *CardMem;
182 struct SignalSemaphore HWLock; /* Hardware exclusive semaphore */
183 struct SignalSemaphore MultiBMLock; /* To lock more than one bitmap at a time */
184 APTR memPool;
186 OOP_Class *nvclass;
187 OOP_Class *onbmclass;
188 OOP_Class *offbmclass;
189 OOP_Class *planarbmclass;
191 OOP_Object *pci;
192 OOP_Object *Device;
193 OOP_Object *nvobject;
194 OOP_Object *pcidriver;
196 OOP_AttrBase pciAttrBase;
197 OOP_AttrBase bitMapAttrBase;
198 OOP_AttrBase nvBitMapAttrBase;
199 OOP_AttrBase pixFmtAttrBase;
200 OOP_AttrBase gfxAttrBase;
201 OOP_AttrBase syncAttrBase;
202 OOP_AttrBase planarAttrBase;
204 HIDDT_DPMSLevel dpms;
206 struct CardState *poweron_state;
208 struct Card Card;
210 UWORD src_pitch, dst_pitch;
211 ULONG src_offset, dst_offset;
212 ULONG surface_format;
213 ULONG pattern_format;
214 ULONG rect_format;
215 ULONG line_format;
217 OOP_MethodID mid_ReadLong;
218 OOP_MethodID mid_CopyMemBox8;
219 OOP_MethodID mid_CopyMemBox16;
220 OOP_MethodID mid_CopyMemBox32;
221 OOP_MethodID mid_PutMem32Image8;
222 OOP_MethodID mid_PutMem32Image16;
223 OOP_MethodID mid_GetMem32Image8;
224 OOP_MethodID mid_GetMem32Image16;
225 OOP_MethodID mid_GetImage;
226 OOP_MethodID mid_Clear;
227 OOP_MethodID mid_PutMemTemplate8;
228 OOP_MethodID mid_PutMemTemplate16;
229 OOP_MethodID mid_PutMemTemplate32;
230 OOP_MethodID mid_PutMemPattern8;
231 OOP_MethodID mid_PutMemPattern16;
232 OOP_MethodID mid_PutMemPattern32;
233 OOP_MethodID mid_CopyLUTMemBox16;
234 OOP_MethodID mid_CopyLUTMemBox32;
236 BOOL gpu_busy;
238 IPTR scratch_buffer;
241 typedef struct __bm {
242 struct SignalSemaphore bmLock;
244 OOP_Object *BitMap; // BitMap OOP Object
245 IPTR framebuffer; // Points to pixel data
246 ULONG width; // Bitmap width
247 ULONG height; // Bitmap height
248 ULONG pitch; // BytesPerRow aligned
249 UBYTE depth; // Bitmap depth
250 UBYTE bpp; // BytesPerPixel
251 UBYTE onbm; // is onbitmap?
252 UBYTE fbgfx; // is framebuffer in gfx memory
253 ULONG usecount; // counts BitMap accesses
255 ULONG surface_format;
256 ULONG pattern_format;
257 ULONG rect_format;
258 ULONG line_format;
260 struct CardState *state;
261 } nvBitMap;
263 struct planarbm_data
265 UBYTE **planes;
266 ULONG planebuf_size;
267 ULONG bytesperrow;
268 ULONG rows;
269 UBYTE depth;
270 BOOL planes_alloced;
273 #define LOCK_HW { ObtainSemaphore(&_sd->HWLock); }
274 #define UNLOCK_HW { ReleaseSemaphore(&_sd->HWLock); }
276 #define LOCK_BITMAP { ObtainSemaphore(&bm->bmLock); }
277 #define UNLOCK_BITMAP { ReleaseSemaphore(&bm->bmLock); }
279 #define LOCK_BITMAP_BM(bm) { ObtainSemaphore(&(bm)->bmLock); }
280 #define UNLOCK_BITMAP_BM(bm) { ReleaseSemaphore(&(bm)->bmLock); }
282 #define LOCK_MULTI_BITMAP { ObtainSemaphore(&_sd->MultiBMLock); }
283 #define UNLOCK_MULTI_BITMAP { ReleaseSemaphore(&_sd->MultiBMLock); }
285 #include LC_LIBDEFS_FILE
287 LIBBASETYPE {
288 struct Library LibNode;
289 APTR memPool;
290 struct staticdata sd;
291 struct MemHeader mh;
294 #define V_DBLSCAN 0x01
295 #define V_LACE 0x02
297 void LoadState(struct staticdata *, struct CardState *);
298 void SaveState(struct staticdata *, struct CardState *);
299 void DPMS(struct staticdata *, HIDDT_DPMSLevel);
300 void InitMode(struct staticdata *sd, struct CardState *,
301 ULONG width, ULONG height, UBYTE bpp, ULONG pixelc, ULONG base,
302 ULONG HDisplay, ULONG VDisplay,
303 ULONG HSyncStart, ULONG HSyncEnd, ULONG HTotal,
304 ULONG VSyncStart, ULONG VSyncEnd, ULONG VTotal);
305 void acc_test(struct staticdata *);
308 void NVLockUnlock(struct staticdata *, UBYTE);
309 int NVShowHideCursor (struct staticdata *, UBYTE);
310 void NVDmaKickoff(struct Card *);
311 void NVDmaWait(struct Card *, int);
312 void NVSync(struct staticdata *);
313 void NVDMAKickoffCallback(struct staticdata *);
314 void NVSetPattern(struct staticdata *, ULONG, ULONG, ULONG, ULONG);
315 void NVSetRopSolid(struct staticdata *, ULONG, ULONG);
316 void NVSelectHead(struct staticdata *sd, UBYTE head);
317 BOOL NVIsConnected (struct staticdata *sd, UBYTE output);
319 void nv4GetConfig(struct staticdata *);
320 void nv10GetConfig(struct staticdata *);
321 IPTR AllocBitmapArea(struct staticdata *, ULONG, ULONG, ULONG, BOOL);
322 VOID FreeBitmapArea(struct staticdata *, IPTR, ULONG, ULONG, ULONG);
324 #define NVDmaNext(pNv, data) \
325 (pNv)->dmaBase[(pNv)->dmaCurrent++] = (data)
327 #define NVDmaStart(pNv, tag, size) { \
328 if((pNv)->dmaFree <= (size)) \
329 NVDmaWait(pNv, size); \
330 NVDmaNext(pNv, ((size) << 18) | (tag)); \
331 (pNv)->dmaFree -= ((size) + 1); \
334 //#if defined(__i386__)
335 //#define _NV_FENCE() asm volatile ("outb %0,%w1"::"a"(0),"Nd"(0x3d0));
336 //#else
337 #define _NV_FENCE() /* eps */
338 //#endif
340 #define WRITE_PUT(pNv, data) { \
341 volatile UBYTE scratch; \
342 _NV_FENCE() \
343 scratch = (pNv)->FrameBuffer[0]; \
344 (pNv)->FIFO[0x0010] = (data) << 2; \
345 mem_barrier(); \
348 #define READ_GET(pNv) ((pNv)->FIFO[0x0011] >> 2)
350 #endif // _NV_H