Added 400ns delay in ata_WaitBusyTO before read of device status.
[tangerine.git] / arch / common / hidd.vmwaresvga / svga_limits.h
blobb04edaa876f73ec4f7e3c61cda39d83635ec876f
1 /* **********************************************************
2 * Copyright (C) 1998-2001 VMware, Inc.
3 * All Rights Reserved
4 * Id: svga_limits.h,v 1.8 2001/01/26 23:32:15 yoel Exp $
5 * **********************************************************/
7 /*
8 * svga_reg.h --
10 * SVGA limits
13 #ifndef _SVGA_LIMITS_H_
14 #define _SVGA_LIMITS_H_
16 #define INCLUDE_ALLOW_USERLEVEL
17 #define INCLUDE_ALLOW_MONITOR
18 //#include "includeCheck.h"
21 * Location and size of SVGA frame buffer.
23 #define SVGA_FB_MAX_SIZE (16*1024*1024)
24 #define SVGA_MEM_SIZE (256*1024)
27 * SVGA_FB_START is the default starting address of the SVGA frame
28 * buffer in the guest's physical address space.
29 * SVGA_FB_START_BIGMEM is the starting address of the SVGA frame
30 * buffer for VMs that have a large amount of physical memory.
32 * The address of SVGA_FB_START is set to 2GB - (SVGA_FB_MAX_SIZE + SVGA_MEM_SIZE),
33 * thus the SVGA frame buffer sits at [SVGA_FB_START .. 2GB-1] in the
34 * physical address space. Our older SVGA drivers for NT treat the
35 * address of the frame buffer as a signed integer. For backwards
36 * compatibility, we keep the default location of the frame buffer
37 * at under 2GB in the address space. This restricts VMs to have "only"
38 * up to ~2031MB (i.e., up to SVGA_FB_START) of physical memory.
40 * For VMs that want more memory than the ~2031MB, we place the SVGA
41 * frame buffer at SVGA_FB_START_BIGMEM. This allows VMs to have up
42 * to 3584MB, at least as far as the SVGA frame buffer is concerned
43 * (note that there may be other issues that limit the VM memory
44 * size). PCI devices use high memory addresses, so we have to put
45 * SVGA_FB_START_BIGMEM low enough so that it doesn't overlap with any
46 * of these devices. Placing SVGA_FB_START_BIGMEM at 0xE0000000
47 * should leave plenty of room for the PCI devices.
49 * NOTE: All of that is only true for the 0710 chipset. As of the 0405
50 * chipset, the framebuffer start is determined solely based on the value
51 * the guest BIOS or OS programs into the PCI base address registers.
53 #define SVGA_FB_LEGACY_START 0x7EFC0000
54 #define SVGA_FB_LEGACY_START_BIGMEM 0xE0000000
56 #endif