Re-enabled use of AROS.Boot file due to lack of general enthusiasm for
[tangerine.git] / arch / i386-pc / exec / cachepostdma.c
blobb2e8313fea3b79ec67a9fc6c6e1dccc35a4fe61b
1 /*
2 Copyright © 1995-2008, The AROS Development Team. All rights reserved.
3 $Id$
5 Desc: CachePostDMA() - Do what is necessary for DMA.
6 Lang: english
7 */
9 #define DEBUG 0
11 #include <aros/debug.h>
12 #include <exec/types.h>
13 #include <exec/execbase.h>
14 #include <aros/libcall.h>
16 /*****************************************************************************
18 NAME */
19 #include <proto/exec.h>
21 AROS_LH3(void, CachePostDMA,
23 /* SYNOPSIS */
24 AROS_LHA(APTR, address, A0),
25 AROS_LHA(ULONG *, length, A1),
26 AROS_LHA(ULONG, flags, D0),
28 /* LOCATION */
29 struct ExecBase *, SysBase, 128, Exec)
31 /* FUNCTION
32 Do everything necessary to make CPU caches aware that a DMA has
33 happened.
35 INPUTS
36 address - Virtual address of memory affected by the DMA
37 *length - Number of bytes affected
38 flags - DMA_NoModify - Indicate that the memory did not change.
39 DMA_ReadFromRAM - Indicate that the DMA goes from RAM
40 to the device. Set this bit in
41 both calls.
43 RESULT
45 NOTES
46 DMA must follow a call to CachePreDMA() and must be followed
47 by a call to CachePostDMA().
49 EXAMPLE
51 BUGS
53 SEE ALSO
54 CachePreDMA()
56 INTERNALS
57 Due to the strong cache coherency of x86 systems this function
58 is actually not needed. CPU snoops the address lines and
59 invalidate all cache which is out-of-date. It is valid for both
60 D and I caches). Even a BM-DMA transfer are perfectly safe here.
62 ******************************************************************************/
64 AROS_LIBFUNC_INIT
66 AROS_LIBFUNC_EXIT
67 } /* CachePostDMA */