Updated PCI IDs to latest snapshot.
[tangerine.git] / arch / .unmaintained / dummy / cachepostdma.c
blob20192663318a6aaba3c6eb43817282a6921f5e90
1 |******************************************************************************
3 | NAME
5 | __AROS_LH3(void, CachePostDMA,
7 | SYNOPSIS
8 | __AROS_LA(APTR, address, A0),
9 | __AROS_LA(ULONG *, length, A1),
10 | __AROS_LA(ULONG, flags, D0),
12 | LOCATION
13 | struct ExecBase *, SysBase, 128, Exec)
15 | FUNCTION
16 | Do everything necessary to make CPU caches aware that a DMA has
17 | happened.
19 | INPUTS
20 | address - Virtual address of memory affected by the DMA
21 | *length - Number of bytes affected
22 | flags - DMA_NoModify - Indicate that the memory didn't change.
23 | DMA_ReadFromRAM - Indicate that the DMA goes from RAM
24 | to the device. Set this bit in bot calls.
26 | RESULT
28 | NOTES
29 | DMA must follow a call to CachePreDMA() and must be followed
30 | by a call to CachePostDMA().
32 | EXAMPLE
34 | BUGS
36 | SEE ALSO
37 | CachePreDMA()
39 | INTERNALS
41 | HISTORY
43 |******************************************************************************
45 | Simple 68000s have no chaches
46 .globl _Exec_CachePostDMA
47 _Exec_CachePostDMA:
48 rts