arch/.unmaintained/generic/hidd/serial/serial_intern.h

   1 /*
   2     Copyright © 1995-2001, The AROS Development Team. All rights reserved.
   3     $Id$
   4 */
   5
   6 #ifndef SERIAL_HIDD_INTERN_H
   7 #define SERIAL_HIDD_INTERN_H
   8
   9 /* Include files */
  10
  11 #ifndef EXEC_LIBRARIES_H
  12 #   include <exec/libraries.h>
  13 #endif
  14 #ifndef OOP_OOP_H
  15 #   include <oop/oop.h>
  16 #endif
  17 #ifndef HIDD_SERIAL_H
  18 #   include <hidd/serial.h>
  19 #endif
  20 #include <dos/dos.h>
  21
  22 #define SER_MAX_UNITS   2
  23
  24 struct HIDDSerialData
  25 {
  26     OOP_Class *SerialHIDDClass;
  27
  28     OOP_Object          *SerialUnits[SER_MAX_UNITS];
  29     UBYTE               usedunits;
  30 };
  31
  32 #define SER_UNIT_0_F    1
  33 #define SER_UNIT_1_F    2
  34
  35 struct HIDDSerialUnitData
  36 {
  37     VOID (*DataWriteCallBack)   (ULONG unitnum, APTR userdata);
  38     VOID (*DataReceivedCallBack)(UBYTE *buffer, ULONG len, ULONG unitnum, APTR userdata);
  39     VOID                *DataWriteUserData;
  40     VOID                *DataReceivedUserData;
  41
  42     ULONG               unitnum;
  43     ULONG               baseaddr;
  44     ULONG               baudrate;
  45     UBYTE               datalength;
  46     BOOL                parity;
  47     UBYTE               paritytype;
  48     UBYTE               stopbits;
  49     BOOL                breakcontrol;
  50     BOOL                stopped;
  51 };
  52
  53 struct class_static_data
  54 {
  55     struct ExecBase      * sysbase;
  56     struct Library       * utilitybase;
  57     struct Library       * oopbase;
  58
  59     OOP_Class            *serialhiddclass;
  60     OOP_Class            *serialunitclass;
  61
  62     OOP_Object               *irqhidd;
  63
  64     struct HIDDSerialUnitData   *units[SER_MAX_UNITS];
  65     OOP_AttrBase                hiddSerialUnitAB;
  66 };
  67
  68 #define __IHidd_SerialUnitAB   (csd->hiddSerialUnitAB)
  69
  70 #define SER_DEFAULT_BAUDRATE    57600
  71
  72
  73
  74 /* Library base */
  75
  76 struct IntHIDDSerialBase
  77 {
  78     struct Library            hdg_LibNode;
  79     BPTR                      hdg_SegList;
  80     struct ExecBase          *hdg_SysBase;
  81     struct Library           *hdg_UtilityBase;
  82
  83     struct class_static_data *hdg_csd;
  84 };
  85
  86
  87 #define CSD(x) ((struct class_static_data *)x)
  88
  89 #undef SysBase
  90 #define SysBase (CSD(cl->UserData)->sysbase)
  91
  92 #undef UtilityBase
  93 #define UtilityBase (CSD(cl->UserData)->utilitybase)
  94
  95 #undef OOPBase
  96 #define OOPBase (CSD(cl->UserData)->oopbase)
  97
  98
  99 /* pre declarations */
 100
 101 OOP_Class *init_serialhiddclass(struct class_static_data *csd);
 102 void   free_serialhiddclass(struct class_static_data *csd);
 103
 104 OOP_Class *init_serialunitclass(struct class_static_data *csd);
 105 void   free_serialunitclass(struct class_static_data *csd);
 106
 107
 108 /*
 109  * Bits for USTCNT1/2 register
 110  */
 111 #define UEN             (1 << 15)
 112 #define RXEN            (1 << 14)
 113 #define TXEN            (1 << 13)
 114 #define CLKM            (1 << 12)
 115 #define PEN             (1 << 11)
 116 #define ODD             (1 << 10)
 117 #define STOP            (1 <<  9)
 118 #define EITHER8OR7      (1 <<  8)
 119 #define ODEN            (1 <<  7)
 120 #define CTSD            (1 <<  6)
 121 #define RXFE            (1 <<  5)
 122 #define RXHE            (1 <<  4)
 123 #define RXRE            (1 <<  3)
 124 #define TXEE            (1 <<  2)
 125 #define TXHE            (1 <<  1)
 126 #define TXAE            (1 <<  0)
 127
 128 /*
 129  * Bits for UBAUD1/2 register
 130  */
 131 #define UCLKDIR         (1 << 13)
 132 #define BAUD_SRC        (1 << 11)
 133
 134 /*
 135  * Bits for URX1/2 register
 136  */
 137 #define FIFO_FULL       (1 << 15)
 138 #define FIFO_HALF       (1 << 14)
 139 #define DATA_READY      (1 << 13)
 140 #define OLD_DATA        (1 << 12)
 141 #define OVRUN           (1 << 11)
 142 #define FRAME_ERROR     (1 << 10)
 143 #define BREAK           (1 <<  9)
 144 #define PARITY_ERROR    (1 <<  8)
 145
 146 /*
 147  * Bits for URX1/2 register
 148  */
 149 #define FIFO_EMPTY      (1 << 15)
 150 #define FIFO_HALF       (1 << 14)
 151 #define TX_AVAIL        (1 << 13)
 152 #define SEND_BREAK      (1 << 12)
 153 #define NOCTS1          (1 << 11)
 154 #define BUSY            (1 << 10)
 155 #define CTS1_STAT       (1 <<  9)
 156 #define CTS1_DELTA      (1 <<  8)
 157
 158 /*
 159  * Bits for the UMISC1/2 register
 160  */
 161 #define BAUD_TEST       (1 << 15)
 162 #define CLKSRC          (1 << 14)
 163 #define FORCE_PERR      (1 << 13)
 164 #define LOOP            (1 << 12)
 165 #define BAUD_RESET      (1 << 11)
 166 #define IRTEST          (1 << 10)
 167 #define RTS1_CONT       (1 <<  7)
 168 #define RTS1            (1 <<  6)
 169 #define IRDAEN          (1 <<  5)
 170 #define IRDA_LOOP       (1 <<  4)
 171 #define RXPOL           (1 <<  3)
 172 #define TXPOL           (1 <<  2)
 173
 174
 175 /*
 176  * Offsets
 177  */
 178 #define USTCNT          0
 179 #define UBAUD           2
 180 #define URX             4
 181 #define UTX             6
 182 #define UMISC           8
 183 #define NIPR            10
 184
 185 #endif /* SERIAL_HIDD_INTERN_H */