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[tangerine.git] / arch / .unmaintained / m68k-native / exec / supervisor.s
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1 /*
2 Copyright © 1995-2001, The AROS Development Team. All rights reserved.
3 $Id$
4 */
6 /*****************************************************************************
8 NAME
10 AROS_LH1(ULONG, Supervisor,
12 SYNOPSIS
13 AROS_LHA(ULONG_FUNC, userFunction, A5),
15 LOCATION
16 struct ExecBase *, SysBase, 5, Exec)
18 FUNCTION
19 Call a routine in supervisor mode. This routine runs on the
20 supervisor stack and must end with a "rte". No registers are spilled,
21 i.e. Supervisor() effectively works like a function call.
23 INPUTS
24 userFunction - address of the function to be called.
26 RESULT
27 whatever the function left in the registers
29 NOTES
30 This function is CPU dependant.
32 EXAMPLE
34 BUGS
35 Context switches that happen during the duration of this call are lost.
37 SEE ALSO
39 INTERNALS
41 HISTORY
43 ******************************************************************************/
45 #include "machine.i"
47 .text
48 .balign 4
49 .globl AROS_SLIB_ENTRY(Supervisor,Exec)
50 .type AROS_SLIB_ENTRY(Supervisor,Exec),@function
51 AROS_SLIB_ENTRY(Supervisor,Exec):
52 /* I am cheating my way through this routine, because ixemul traps all
53 exceptions. We would never be able to finish this function.
54 I need to change one register, though, because I need to get this
55 Amiga's original ExecBase. I will use register a4 for this. I also
56 assume the original Supervisor() function does not expect its SysBase
57 in a6.
60 /* get original SysBase */
61 move.l 4.w,a4
62 /* call that Supervisor() function */
63 jmp -30(a4)
65 /* Program flow will not get here */
67 /* a privileged do-nothing instruction */
68 or.w #0x0000,sr
69 /* No trap? Then this was called from supervisor mode. Prepare a rte. */
70 move.w sr,-(sp)
71 jmp (a5)
73 /* CPU privilege violation vector points to here */
74 .globl _TrapLevel8
75 _TrapLevel8:
77 /* There is only one legal location which may do a privilege
78 violation - and that is the instruction above.
80 cmp.l #_Exec_Supervisor,2.w(sp)
81 jne pv
82 /* All OK. Prepare returnaddress and go to the right direction. */
83 move.l #end,2.w(sp)
84 jmp (a5)
85 end: rts
87 /* Store trap number */
88 pv: move.l #8,-(sp)
89 bra _TrapEntry
91 /* And handle the trap */
92 _TrapEntry:
93 /* Simple disable */
94 or.w #0x0700,sr
96 /* get some room for destination address */
97 subq.w #4,sp
99 /* calculate destination address without clobbering any registers */
100 move.l a0,-(sp)
101 move.l 4,a0
102 move.l ThisTask(a0),a0
103 move.l tc_TrapCode(a0),4(sp)
104 move.l (sp)+,a0
106 /* and jump */