arch/common/ata.device/ata.h

   1 #ifndef _ATA_H
   2 #define _ATA_H
   3
   4 /*
   5    Copyright © 2004-2008, The AROS Development Team. All rights reserved
   6    $Id$
   7
   8 Desc: ata.device main private include file
   9 Lang: English
  10 */
  11 /*
  12  * PARTIAL CHANGELOG:
  13  * DATE        NAME                ENTRY
  14  * ----------  ------------------  -------------------------------------------------------------------
  15  * 2008-01-25  T. Wiszkowski       Rebuilt, rearranged and partially fixed 60% of the code here
  16  *                                 Enabled implementation to scan for other PCI IDE controllers
  17  *                                 Implemented ATAPI Packet Support for both read and write
  18  *                                 Corrected ATAPI DMA handling
  19  *                                 Fixed major IDE enumeration bugs severely handicapping transfers with more than one controller
  20  *                                 Compacted source and implemented major ATA support procedure
  21  *                                 Improved DMA and Interrupt management
  22  *                                 Removed obsolete code
  23  * 2008-03-23  T. Wiszkowski       Corrected DMA PRD issue (x86_64 systems)
  24  * 2008-03-30  T. Wiszkowski       Added workaround for interrupt collision handling; fixed SATA in LEGACY mode.
  25  *                                 nForce and Intel SATA chipsets should now be operational.
  26  * 2008-03-31  M. Schulz           We do have asm/io.h include for ages... No need to define io functions here anymore.
  27  *                                 Redefined ata_in and ata_out. On x86-like systems they use inb/outb directly. On other systems
  28  *                                 they use pci_inb and pci_outb.
  29  * 2008-04-05  T. Wiszkowski       Improved IRQ management
  30  * 2008-04-07  T. Wiszkowski       Changed bus timeout mechanism
  31  * 2008-05-11  T. Wiszkowski       Remade the ata trannsfers altogether, corrected the pio/irq handling
  32  *                                 medium removal, device detection, bus management and much more
  33  * 2008-06-24  P. Fedin            Added 'nomulti' flag to disable multisector operations
  34  * 2009-02-21  M. Schulz           ata_in/ata_out declared as functions, if no PCI-io operations are defined.
  35  */
  36
  37 #include <exec/types.h>
  38 #include <exec/devices.h>
  39 #include <exec/semaphores.h>
  40 #include <exec/execbase.h>
  41 #include <exec/libraries.h>
  42 #include <exec/ports.h>
  43 #include <utility/utility.h>
  44 #include <exec/io.h>
  45 #include <exec/errors.h>
  46 #include <devices/trackdisk.h>
  47 #include <devices/scsidisk.h>
  48 #include <devices/newstyle.h>
  49 #include <devices/timer.h>
  50 #include <aros/bootloader.h>
  51 #include "include/cd.h"
  52 #include "include/scsicmds.h"
  53
  54 #include <hidd/irq.h>
  55 #include <asm/io.h>
  56
  57 #define MAX_DEVICEBUSES         2
  58 #define MAX_BUSUNITS            2
  59 #define STACK_SIZE              16384
  60 #define TASK_PRI                10
  61
  62 /*
  63    Don't blame me for information redundance here!
  64
  65    Please note, that all structures here are more or less chained together.
  66    The aim is, every single function in ata.device, no matter whether it takes
  67    ata_Unit or ata_Bus or God knows what else, would have access to ata device
  68    base and through it, to all other device structures.
  69
  70    I just wanted to avoid passing ataBase everywhere. :-D
  71    */
  72
  73 /* structure forward declarations */
  74 struct ata_Unit;
  75 struct ata_Bus;
  76
  77 /*
  78  * this **might** cause problems with PPC64, which **might** expect both to be 64bit.
  79  */
  80 struct PRDEntry {
  81    ULONG   prde_Address;
  82    ULONG   prde_Length;
  83 };
  84
  85 #define PRDE_EOT    0x80000000
  86 #define PRD_MAX     514
  87
  88 /* ata.device base */
  89 struct ataBase
  90 {
  91    /*
  92     * Device structure - used to manage devices by exec guts^h^h^hoods
  93     */
  94    struct Device           ata_Device;
  95
  96    /*
  97     * master task pointer
  98     */
  99    struct Task            *ata_Daemon;
 100
 101     struct List         ata__legacybuses;
 102     struct List         ata__probedbuses;
 103     int                 ata__buscount;
 104    /*
 105     * list of all buses - we may have more than just 4
 106     */
 107    struct MinList          ata_Buses;
 108
 109    /*
 110     * flags
 111     */
 112    UBYTE                   ata_32bit;
 113    UBYTE                   ata_NoMulti;
 114    UBYTE                   ata_NoDMA;
 115    UBYTE                   ata_NoSubclass;
 116    UBYTE                   ata_ScanFlags;
 117
 118 #define ATA_SCANPCI             (1 << 0)
 119 #define ATA_SCANLEGACY          (1 << 1)
 120    /*
 121     * memory pool
 122     */
 123    APTR                    ata_MemPool;
 124 };
 125
 126 /*
 127    The single IDE bus (channel)
 128    */
 129 struct ata_Bus
 130 {
 131    struct MinNode          ab_Node;    /* exec node */
 132    struct ataBase          *ab_Base;   /* device self */
 133    ULONG                   ab_Port;    /* IO port used */
 134    ULONG                   ab_Alt;     /* alternate io port */
 135    UBYTE                   ab_IRQ;     /* IRQ number used */
 136    UBYTE                   ab_Dev[2];  /* Master/Slave type, see below */
 137    UBYTE                   ab_Flags;   /* Bus flags similar to unit flags */
 138    BYTE                    ab_SleepySignal; /* Signal used to wake the task up, when it's waiting */
 139    /* for data requests/DMA */
 140    UBYTE                   ab_BusNum;  /* bus id - used to calculate device id */
 141    LONG                    ab_Timeout; /* in seconds; please note that resolution is low (1sec) */
 142
 143    struct ata_Unit         *ab_Units[MAX_BUSUNITS];    /* Units on the bus */
 144
 145    HIDDT_IRQ_Handler       *ab_IntHandler;
 146    ULONG                   ab_IntCnt;
 147
 148    struct Task             *ab_Task;       /* Bus task handling all not-immediate transactions */
 149    struct MsgPort          *ab_MsgPort;    /* Task's message port */
 150    struct PRDEntry         *ab_PRD;
 151    struct IORequest        *ab_Timer;      /* timer stuff */
 152
 153    /* functions go here */
 154    void                   (*ab_HandleIRQ)(struct ata_Unit* unit, UBYTE status);
 155 };
 156
 157 /* Device types */
 158 #define DEV_NONE        0x00
 159 #define DEV_UNKNOWN     0x01
 160 #define DEV_ATA         0x02
 161 #define DEV_SATA        0x03
 162 #define DEV_ATAPI       0x80
 163 #define DEV_SATAPI      0x81
 164
 165 /*
 166    DriveIdent structure as returned by ATA_IDENTIFY_[DEVICE|ATAPI]
 167    */
 168 struct DriveIdent {
 169    UWORD       id_General;             // 0
 170    UWORD       id_OldCylinders;        // 1
 171    UWORD       id_SpecificConfig;      // 2
 172    UWORD       id_OldHeads;            // 3
 173    UWORD       pad1[2];                // 4-5
 174    UWORD       id_OldSectors;          // 6
 175    UWORD       pad2[3];                // 7-9
 176    UBYTE       id_SerialNumber[20];    // 10-19
 177    UWORD       pad3[3];                // 20-22
 178    UBYTE       id_FirmwareRev[8];      // 23-26
 179    UBYTE       id_Model[40];           // 27-46
 180    UWORD       id_RWMultipleSize;      // 47
 181    UWORD       pad4;                   // 48
 182    UWORD       id_Capabilities;        // 49
 183    UWORD       id_OldCaps;             // 50
 184    UWORD       id_OldPIO;              // 51
 185    UWORD       pad5;                   // 52
 186    UWORD       id_ConfigAvailable;     // 53
 187    UWORD       id_OldLCylinders;       // 54
 188    UWORD       id_OldLHeads;           // 55
 189    UWORD       id_OldLSectors;         // 56
 190    UWORD       pad6[2];                // 57-58
 191    UWORD       id_RWMultipleTrans;     // 59
 192    ULONG       id_LBASectors;          // 60-61
 193    UWORD       id_DMADir;              // 62
 194    UWORD       id_MWDMASupport;        // 63
 195    UWORD       id_PIOSupport;          // 64
 196    UWORD       id_MWDMA_MinCycleTime;  // 65
 197    UWORD       id_MWDMA_DefCycleTime;  // 66
 198    UWORD       id_PIO_MinCycleTime;    // 67
 199    UWORD       id_PIO_MinCycleTImeIORDY; // 68
 200    UWORD       pad8[6];                // 69-74
 201    UWORD       id_QueueDepth;          // 75
 202    UWORD       pad9[4];                // 76-79
 203    UWORD       id_ATAVersion;          // 80
 204    UWORD       id_ATARevision;         // 81
 205    UWORD       id_Commands1;           // 82
 206    UWORD       id_Commands2;           // 83
 207    UWORD       id_Commands3;           // 84
 208    UWORD       id_Commands4;           // 85
 209    UWORD       id_Commands5;           // 86
 210    UWORD       id_Commands6;           // 87
 211    UWORD       id_UDMASupport;         // 88
 212    UWORD       id_SecurityEraseTime;   // 89
 213    UWORD       id_ESecurityEraseTime;  // 90
 214    UWORD       id_CurrentAdvPowerMode; // 91
 215    UWORD       id_MasterPwdRevision;   // 92
 216    UWORD       id_HWResetResult;       // 93
 217    UWORD       id_AcousticManagement;  // 94
 218    UWORD       id_StreamMinimunReqSize; // 95
 219    UWORD       id_StreamingTimeDMA;    // 96
 220    UWORD       id_StreamingLatency;    // 97
 221    ULONG       id_StreamingGranularity; // 98-99
 222    UQUAD       id_LBA48Sectors;        // 100-103
 223    UWORD       id_StreamingTimePIO;    // 104
 224    UWORD       pad10;                  // 105
 225    UWORD       id_PhysSectorSize;      // 106
 226    UWORD       pad11;                  // 107
 227    UQUAD       id_UniqueIDi[2];        // 108-115
 228    UWORD       pad12;                  // 116
 229    ULONG       id_WordsPerLogicalSector; // 117-118
 230    UWORD       pad13[8];               // 119-126
 231    UWORD       id_RemMediaStatusNotificationFeatures; // 127
 232    UWORD       id_SecurityStatus;      // 128
 233    UWORD       pad14[127];
 234 } __attribute__((packed));
 235
 236 typedef struct
 237 {
 238    UBYTE command;       // current ATA command
 239    UBYTE feature;       // FF to indicate no feature
 240    UBYTE secmul;        // for read multiple - multiplier. default 1
 241    UBYTE pad;
 242    UQUAD blk;
 243    ULONG sectors;
 244    APTR  buffer;
 245    ULONG length;
 246    ULONG actual;
 247
 248    enum
 249    {
 250       CM_NoData,
 251       CM_PIORead,
 252       CM_PIOWrite,
 253       CM_DMARead,
 254       CM_DMAWrite
 255    } method;
 256    enum
 257    {
 258       CT_NoBlock,
 259       CT_LBA28,
 260       CT_LBA48,
 261    } type;
 262 } ata_CommandBlock;
 263
 264 /*
 265    Unit structure describing given device on the bus. It contains all the
 266    necessary information unit/device may need.
 267    */
 268 struct ata_Unit
 269 {
 270    struct Unit         au_Unit;   /* exec's unit */
 271    struct DriveIdent  *au_Drive;  /* Drive Ident after IDENTIFY command */
 272    struct ata_Bus     *au_Bus;    /* Bus on which this unit is */
 273
 274    ULONG               au_DMAPort;
 275    ULONG               au_XferModes;   /* available transfer modes */
 276
 277    ULONG               au_Capacity;    /* Highest sector accessible through LBA28 */
 278    UQUAD               au_Capacity48;  /* Highest sector accessible through LBA48 */
 279    ULONG               au_Cylinders;
 280    UBYTE               au_Heads;
 281    UBYTE               au_Sectors;
 282    UBYTE               au_Model[41];
 283    UBYTE               au_FirmwareRev[9];
 284    UBYTE               au_SerialNumber[21];
 285
 286    /*
 287       Here are stored pointers to functions responsible for handling this
 288       device. They are set during device initialization and point to most
 289       effective functions for this particular unit. Read/Write may be done
 290       in PIO mode reading single sectors, using PIO with multiword or DMA.
 291       */
 292    ULONG               (*au_Read32)(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 293    ULONG               (*au_Write32)(struct ata_Unit *, ULONG, ULONG, APTR, ULONG *);
 294    ULONG               (*au_Read64)(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 295    ULONG               (*au_Write64)(struct ata_Unit *, UQUAD, ULONG, APTR, ULONG *);
 296    ULONG               (*au_Eject)(struct ata_Unit *);
 297    ULONG               (*au_DirectSCSI)(struct ata_Unit *, struct SCSICmd*);
 298    ULONG               (*au_Identify)(struct ata_Unit *);
 299
 300    VOID                (*au_ins)(APTR, UWORD, ULONG);
 301    VOID                (*au_outs)(APTR, UWORD, ULONG);
 302
 303    /* If a HW driver is used with this unit, it may store its data here */
 304    APTR                au_DriverData;
 305
 306    ULONG               au_UnitNum;     /* Unit number as coded by device */
 307    ULONG               au_Flags;       /* Unit flags, see below */
 308    ULONG               au_ChangeNum;   /* Number of disc changes */
 309
 310    struct Interrupt   *au_RemoveInt;  /* Raise this interrupt on a disc change */
 311    struct List         au_SoftList;    /* Raise even more interrupts from this list on disc change */
 312
 313    UBYTE               au_SectorShift;         /* Sector shift. 9 here is 512 bytes sector */
 314    UBYTE               au_DevMask;             /* device mask used to simplify device number coding */
 315    UBYTE               au_SenseKey;            /* Sense key from ATAPI devices */
 316    UBYTE               au_DevType;
 317
 318    /******* PIO IO ********/
 319    APTR                au_cmd_data;
 320    ULONG               au_cmd_length;
 321    ULONG               au_cmd_total;
 322    ULONG               au_cmd_error;
 323 };
 324
 325 typedef enum
 326 {
 327    AB_XFER_PIO0 = 0,
 328    AB_XFER_PIO1,
 329    AB_XFER_PIO2,
 330    AB_XFER_PIO3,
 331    AB_XFER_PIO4,
 332
 333    AB_XFER_MDMA0,
 334    AB_XFER_MDMA1,
 335    AB_XFER_MDMA2,
 336
 337    AB_XFER_UDMA0,
 338    AB_XFER_UDMA1,
 339    AB_XFER_UDMA2,
 340    AB_XFER_UDMA3,
 341    AB_XFER_UDMA4,
 342    AB_XFER_UDMA5,
 343    AB_XFER_UDMA6,
 344
 345    AB_XFER_48BIT,
 346    AB_XFER_RWMULTI,
 347    AB_XFER_PACKET,
 348    AB_XFER_LBA,
 349    AB_XFER_DMA,
 350
 351 } ata_XferMode;
 352
 353 #define AF_XFER_PIO(x)  (1<<(AB_XFER_PIO0+(x)))
 354 #define AF_XFER_MDMA(x) (1<<(AB_XFER_MDMA0+(x)))
 355 #define AF_XFER_UDMA(x) (1<<(AB_XFER_UDMA0+(x)))
 356 #define AF_XFER_48BIT   (1<<(AB_XFER_48BIT))
 357 #define AF_XFER_RWMULTI (1<<(AB_XFER_RWMULTI))
 358 #define AF_XFER_PACKET  (1<<(AB_XFER_PACKET))
 359 #define AF_XFER_LBA     (1<<(AB_XFER_LBA))
 360 #define AF_XFER_DMA     (1<<(AB_XFER_DMA))
 361
 362 /* Unit internal flags */
 363 #define AB_DiscPresent          30     /* disc now in drive */
 364 #define AB_DiscChanged          29     /* disc changed */
 365 #define AB_Removable            28     /* media removable */
 366 #define AB_80Wire               27     /* has an 80-wire cable */
 367
 368 #define AF_DiscPresent          (1 << AB_DiscPresent)
 369 #define AF_DiscChanged          (1 << AB_DiscChanged)
 370 #define AF_Removable            (1 << AB_Removable)
 371 #define AF_80Wire               (1 << AB_80Wire)
 372
 373 /* ATA/ATAPI registers */
 374 #define ata_Error           1
 375 #define ata_Feature         1
 376 #define ata_Count           2
 377 #define ata_LBALow          3
 378 #define ata_LBAMid          4
 379 #define ata_LBAHigh         5
 380 #define ata_DevHead         6
 381 #define ata_Status          7
 382 #define ata_Command         7
 383 #define ata_AltStatus       0x2
 384 #define ata_AltControl      0x2
 385
 386 #if defined(__i386__) || defined(__x86_64__)
 387 #define ata_out(val, offset, port)  outb((val), (offset)+(port))
 388 #define ata_in(offset, port)        inb((offset)+(port))
 389 #define ata_outl(val, offset, port) outl((val), (offset)+(port))
 390 #elif !defined (pci_outb)
 391 void ata_out(UBYTE val, UWORD offset, IPTR port);
 392 UBYTE ata_in(UWORD offset, IPTR port);
 393 void ata_outl(ULONG val, UWORD offset, IPTR port);
 394 #else
 395 #define ata_out(val, offset, port)  pci_outb((val), (offset)+(port))
 396 #define ata_in(offset, port)        pci_inb((offset)+(port))
 397 #define ata_outl(val, offset, port) pci_outl_le((val), (offset)+(port))
 398 #endif
 399
 400
 401 #define atapi_Error         1
 402 #define atapi_Features      1
 403 #define atapi_Reason        2
 404 #define atapi_ByteCntL      4
 405 #define atapi_ByteCntH      5
 406 #define atapi_DevSel        6
 407 #define atapi_Status        7
 408 #define atapi_Command       7
 409
 410 /* Atapi status bits */
 411 #define ATAB_SLAVE          4
 412 #define ATAB_LBA            6
 413 #define ATAB_ATAPI          7
 414 #define ATAB_DATAREQ        3
 415 #define ATAB_ERROR          0
 416 #define ATAB_BUSY           7
 417
 418 #define ATAF_SLAVE          0x10
 419 #define ATAF_LBA            0x40
 420 #define ATAF_ATAPI          0x80
 421 #define ATAF_DATAREQ        0x08
 422 #define ATAF_ERROR          0x01
 423 #define ATAF_BUSY           0x80
 424 #define ATAF_DRDY           0x40
 425
 426 #define ATAPIF_CHECK        0x01
 427
 428 /* ATA/ATAPI commands */
 429 #define ATA_SET_FEATURES    0xef
 430 #define ATA_SET_MULTIPLE    0xc6
 431 #define ATA_DEVICE_RESET    0x08
 432 #define ATA_IDENTIFY_DEVICE 0xec
 433 #define ATA_IDENTIFY_ATAPI  0xa1
 434 #define ATA_NOP             0x00
 435 #define ATA_EXECUTE_DIAG    0x90
 436 #define ATA_PACKET          0xa0
 437 #define ATA_READ_DMA        0xc8
 438 #define ATA_READ_DMA64      0x25
 439 #define ATA_READ            0x20
 440 #define ATA_READ64          0x24
 441 #define ATA_READ_MULTIPLE   0xc4
 442 #define ATA_READ_MULTIPLE64 0x29
 443 #define ATA_WRITE_DMA       0xca
 444 #define ATA_WRITE_DMA64     0x35
 445 #define ATA_WRITE           0x30
 446 #define ATA_WRITE64         0x34
 447 #define ATA_WRITE_MULTIPLE  0xc5
 448 #define ATA_WRITE_MULTIPLE64 0x39
 449 #define ATA_MEDIA_EJECT     0xed
 450
 451 #define ATAPIF_MASK         0x03
 452 #define ATAPIF_COMMAND      0x01
 453 #define ATAPIF_READ         0x02
 454 #define ATAPIF_WRITE        0x00
 455
 456 /* SFF-8038i DMA registers */
 457 #define dma_Command         0x00
 458 #define dma_Status          0x02
 459 #define dma_PRD             0x04
 460
 461 /* DMA command register */
 462 #define DMA_READ            0x00    /* PCI *READS* from memory to drive */
 463 #define DMA_WRITE           0x08    /* PCI *WRITES* to memory from drive */
 464 #define DMA_START           0x01    /* DMA Start/Stop */
 465
 466 #define DMAB_Active         0
 467 #define DMAB_Error          1
 468 #define DMAB_Interrupt      2
 469 #define DMAB_Simplex        7
 470
 471 #define DMAF_Active         (1 << DMAB_Active)
 472 #define DMAF_Error          (1 << DMAB_Error)
 473 #define DMAF_Interrupt      (1 << DMAB_Interrupt)
 474 #define DMAF_Simplex        (1 << DMAB_Simplex)
 475
 476 #define Unit(io) ((struct ata_Unit *)(io)->io_Unit)
 477 #define IOStdReq(io) ((struct IOStdReq *)io)
 478
 479 /* Function prototypes */
 480
 481 void ata_ResetBus(struct ata_Bus *);
 482 void ata_InitBus(struct ata_Bus *);
 483
 484 int atapi_SendPacket(struct ata_Unit *, APTR, APTR, LONG, BOOL*, BOOL);
 485 int atapi_TestUnitOK(struct ata_Unit *);
 486
 487 ULONG atapi_Identify(struct ata_Unit*);
 488 ULONG ata_Identify(struct ata_Unit*);
 489
 490 ULONG atapi_DirectSCSI(struct ata_Unit*, struct SCSICmd *);
 491 ULONG atapi_RequestSense(struct ata_Unit* unit, UBYTE* sense, ULONG senselen);
 492
 493 int ata_InitBusTask(struct ata_Bus *, struct SignalSemaphore*);
 494 int ata_InitDaemonTask(struct ataBase *);
 495 void ata_HandleIRQ(struct ata_Bus *bus);
 496 UBYTE ata_ReadStatus(struct ata_Bus *bus);
 497
 498 BOOL dma_SetupPRD(struct ata_Unit *, APTR, ULONG, BOOL);
 499 BOOL dma_SetupPRDSize(struct ata_Unit *, APTR, ULONG, BOOL);
 500 VOID dma_StartDMA(struct ata_Unit *);
 501 VOID dma_StopDMA(struct ata_Unit *);
 502 VOID dma_Cleanup(APTR adr, ULONG len, BOOL read);
 503
 504 BOOL ata_setup_unit(struct ata_Bus *bus, UBYTE u);
 505 BOOL ata_init_unit(struct ata_Bus *bus, UBYTE u);
 506 BOOL ata_RegisterVolume(ULONG StartCyl, ULONG EndCyl, struct ata_Unit *unit);
 507
 508 #define ATAPI_SS_EJECT  0x02
 509 #define ATAPI_SS_LOAD   0x03
 510
 511 struct atapi_StartStop
 512 {
 513     UBYTE   command;
 514     UBYTE   immediate;
 515     UBYTE   pad1[2];
 516     UBYTE   flags;
 517     UBYTE   pad2[7];
 518 };
 519
 520 #if 0
 521 /*
 522     Arch specific things to access IO space of drive. Shouldn't be here. Really.
 523 */
 524 static inline ULONG inl(UWORD port)
 525 {
 526     ULONG val;
 527     asm volatile ("inl %w1,%0":"=a"(val):"Nd"(port));
 528
 529     return val;
 530 }
 531
 532 static inline UWORD inw(UWORD port)
 533 {
 534     UWORD val;
 535     asm volatile ("inw %w1,%0":"=a"(val):"Nd"(port));
 536
 537     return val;
 538 }
 539
 540 static inline UBYTE inb(UWORD port)
 541 {
 542     UBYTE val;
 543     asm volatile ("inb %w1,%0":"=a"(val):"Nd"(port));
 544
 545     return val;
 546 }
 547
 548 static inline VOID outl(ULONG val, UWORD port)
 549 {
 550     asm volatile ("outl %0,%w1"::"a"(val),"Nd"(port));
 551 }
 552
 553 static inline VOID outw(UWORD val, UWORD port)
 554 {
 555     asm volatile ("outw %0,%w1"::"a"(val),"Nd"(port));
 556 }
 557
 558 static inline VOID outb(UBYTE val, UWORD port)
 559 {
 560     asm volatile ("outb %0,%w1"::"a"(val),"Nd"(port));
 561 }
 562 #endif
 563
 564 #endif // _ATA_H
 565