arch/i386-pc/exec/cachepredma.c

   1 /*
   2     Copyright © 1995-2008, The AROS Development Team. All rights reserved.
   3     $Id$
   4
   5     Desc: CachePreDMA() - Do what is necessary for DMA.
   6     Lang: english
   7 */
   8
   9 #define DEBUG 0
  10
  11 #include <aros/debug.h>
  12 #include <exec/types.h>
  13 #include <aros/libcall.h>
  14
  15 /*****************************************************************************
  16
  17     NAME */
  18 #include <proto/exec.h>
  19
  20         AROS_LH3(APTR, CachePreDMA,
  21
  22 /*  SYNOPSIS */
  23         AROS_LHA(APTR,    address, A0),
  24         AROS_LHA(ULONG *, length,  A1),
  25         AROS_LHA(ULONG,   flags,  D0),
  26
  27 /*  LOCATION */
  28         struct ExecBase *, SysBase, 127, Exec)
  29
  30 /*  FUNCTION
  31         Do everything necessary to make CPU caches aware that a DMA
  32         will happen. Virtual memory systems will make it possible
  33         that your memory is not at one block and not at the address
  34         you thought. This function gives you all the information
  35         you need to split the DMA request up and to convert virtual
  36         to physical addresses.
  37
  38     INPUTS
  39         address - Virtual address of memory affected by the DMA
  40         *length - Number of bytes affected
  41         flags   - DMA_Continue    - This is a call to continue a
  42                                     request that was broken up.
  43                   DMA_ReadFromRAM - Indicate that the DMA goes from
  44                                     RAM to the device. Set this bit
  45                                     in both calls.
  46
  47     RESULT
  48         The physical address in memory.
  49         *length contains the number of contiguous bytes in physical
  50         memory.
  51
  52     NOTES
  53         DMA must follow a call to CachePreDMA() and must be followed
  54         by a call to CachePostDMA().
  55
  56     EXAMPLE
  57
  58     BUGS
  59
  60     SEE ALSO
  61         CachePostDMA()
  62
  63     INTERNALS
  64     Due to the strong cache coherency of x86 systems this function
  65     is actually not needed. CPU snoops the address lines and
  66     invalidate all cache which is out-of-date. It is valid for both
  67     D and I caches). Even a BM-DMA transfer are perfectly safe here.
  68
  69 ******************************************************************************/
  70 {
  71     AROS_LIBFUNC_INIT
  72
  73     return address;
  74
  75     AROS_LIBFUNC_EXIT
  76 } /* CachePreDMA() */
  77