Updated PCI IDs to latest snapshot.
[tangerine.git] / arch / m68k-mac / exec / coldreboot.S
blob33f0931141b98498d9dc312f74f747e1e8402dee
1 /*
2     Copyright © 1995-2007, The AROS Development Team. All rights reserved.
3     $Id$
4 */
6 /*****************************************************************************
7  
8     NAME
9  
10         AROS_LH0(void, ColdReboot,
12     SYNOPSIS
14     LOCATION
15         struct ExecBase *, SysBase, 121, Exec)
17     FUNCTION
18         Reboots AROS.
20     INPUTS
22     RESULT
24     NOTES
25         This function never returns.
27     EXAMPLE
29     BUGS
31     SEE ALSO
33     INTERNALS
35     HISTORY
37 ******************************************************************************/
39         #include "aros/m68k/asm.h"
41         .text
42         .balign 4
43         .globl  AROS_SLIB_ENTRY(ColdReboot,Exec)
44 AROS_SLIB_ENTRY(ColdReboot,Exec):
45         jsr     Disable(%a6)                    /* disable */
46         moveq.l #0,%d0                          /* cache bits */
47         moveq.l #-1,%d1                         /* cache mask */
48         jsr     CacheControl(%a6)               /* disable all cache modes */
50         lea.l   resetus(%pc),%a5        /* actual reset routine */
51         jsr     Supervisor(%a6)                 /* supervisor mode, ofcourse */
53         .balign 4
54 resetus:
56 //warning FIXME! This code won't work!
57         lea.l   initial_ssp,%a0 /* pointer to initial ssp */
58         move.l  (%a0),%d0               /* the initial ssp itself */
59         move.l  4(%a0),%a0              /* get vector from initial_ssp+4 */
60         reset                                   /* reset stuff */
61         move.l  %d0,%ssp                /* load ssp with initial value -
62                                                                 hopefully I am in supervisor
63                                                                 mode after reset - 
64                                                                 didn't read the manual... */
65         jmp     (%a0)                           /* this instruction was still in prefetch */
66         /* never gets here */