Updated PCI IDs to latest snapshot.
[tangerine.git] / workbench / c / CPUInfo / x86 / x86.h
blobc6356fb18e6097234486a4c355ba6e86ad9b6b60
1 /*
2 Copyright © 2000, The AROS Development Team. All rights reserved.
3 $Id$
5 Desc: Probe installed CPUs and display relevant information
6 Lang: english
7 */
9 /* BIG TO DO - SEPERATE THE INDIVIDUAL PROCESSOR FAMILY "PROBES" INTO RUNTIME SHARED LIBS OR SIMILAR */
11 /****************************************************************************************************
12 Currently Supports:
14 i386 compatable families...
15 AMD 486/5x86/K5/K6/K6-II/K6-III/Athlon/Duron/Opteron/Athlon64
16 Intel P5/P54C/P55C/P24T/P6/P2/P3/PM/Itanium(IA-64)
17 Cyrix 5x86/M1/MediaGX/M2
18 UMC
19 NexGen Nx586
20 Centaur C6/C2/C3
21 Rise Technology mP6
22 SiS 55x
23 Transmeta Crusoe TM3x00 and TM5x00
24 National Semiconductor Geode
26 *****************************************************************************************************/
27 #ifndef _CPU_x86INTERN_H
28 #define _CPU_x86INTERN_H
30 #include <proto/exec.h>
31 #include <proto/dos.h>
32 #include <proto/timer.h>
33 #include <proto/cpu.h>
35 #include <exec/types.h>
36 #include <exec/lists.h>
37 #include <exec/io.h>
38 #include <exec/memory.h>
40 #include <dos/dos.h>
42 #include <devices/timer.h>
44 #include <sys/time.h>
46 #include <stdio.h>
47 #include <stdlib.h>
48 #include <string.h>
49 #include <time.h>
51 #include <asm/io.h>
53 #include <hardware/cpu/cpu_i386.h>
55 #include "../cpuinfo.h"
57 /********************************************
58 ASM Functions
59 ********************************************/
61 #define i386_cpuid(in,a,b,c,d) asm("cpuid": "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "a" (in));
62 #define i386_rdmsr(msr,val1,val2) __asm__ __volatile__ ("rdmsr": "=a" (val1), "=d" (val2) : "c" (msr));
64 /********************************************
65 Stub Calls...
66 ********************************************/
68 ULONG i386_approx_mhz ( void );
69 void i386_getregs ( char *out, int eax,int ebx,int ecx,int edx );
70 void i386_printregs ( int eax,int ebx,int ecx,int edx );
71 int i386_sprintregs ( int buffpos, char *buffer, int eax,int ebx,int ecx,int edx);
73 void i386_Parse_MSR ( unsigned int msr, int size);
75 void parse_i386_AMD ( int maxi, struct i386_compat_intern * CPUi386 );
76 void parse_i386_Intel ( int maxi, struct i386_compat_intern * CPUi386 );
77 void parse_i386_Cyrix ( int maxi, struct i386_compat_intern * CPUi386 );
79 void parse_i386_Transmeta ( int maxi, struct i386_compat_intern * CPUi386 );
80 void parse_i386_UMC ( int maxi, struct i386_compat_intern * CPUi386 );
81 void parse_i386_NexGen ( int maxi, struct i386_compat_intern * CPUi386 );
82 void parse_i386_Centaur ( int maxi, struct i386_compat_intern * CPUi386 );
83 void parse_i386_Rise ( int maxi, struct i386_compat_intern * CPUi386 );
84 void parse_i386_SiS ( int maxi, struct i386_compat_intern * CPUi386 );
85 void parse_i386_NSC ( int maxi, struct i386_compat_intern * CPUi386 );
87 /********************************************
88 Structures
89 ********************************************/
91 struct CPU_INTERN_DATA
93 UBYTE CPU_BUFF[4096]; /* TEMPORARY BUFFER */
94 UBYTE CPU_NAME[2048];
95 UBYTE CPU_IDENTITY[4096];
96 UBYTE CPU_FEATURES[4096];
97 UBYTE CPU_CACHE[2048];
98 UBYTE CPU_ADDR[2048];
101 #define CONN_UNKNOWN 0
102 #define CONN_SOCKET_3 1
103 #define CONN_SOCKET_4 2
104 #define CONN_SOCKET_5 3
105 #define CONN_SOCKET_7 4
106 #define CONN_SOCKET_370 5
107 #define CONN_SOCKET_370_FCPGA 6
108 #define CONN_SOCKET_5_7 7
109 #define CONN_SUPER_SOCKET_7 8
110 #define CONN_SLOT_A 9
111 #define CONN_SOCKET_A 10
112 #define CONN_SOCKET_A_SLOT_A 11
113 #define CONN_SOCKET_A_OR_SLOT_A 12
114 #define CONN_SOCKET_57B 13
115 #define CONN_MOBILE_7 14
116 #define CONN_SOCKET_8 15
117 #define CONN_SLOT_1 16
118 #define CONN_SLOT_2 17
119 #define CONN_SOCKET_423 18
120 #define CONN_MMC 19
121 #define CONN_MMC2 20
122 #define CONN_BGA474 21
123 #define CONN_BGA 22
124 #define CONN_SOCKET_754 23
125 #define CONN_SOCKET_478 24
127 #endif /* _CPU_x86INTERN_H */