add a missing section header table index conversion
[tangerine.git] / arch / .unmaintained / m68k-native / exec / setsr.s
blob2037131d21e0dc10cc5f6880f0b12887607147fd
1 /*
2 Copyright © 1995-2001, The AROS Development Team. All rights reserved.
3 $Id$
4 */
6 /*****************************************************************************
8 NAME
10 AROS_LH2(ULONG, SetSR,
12 SYNOPSIS
13 AROS_LHA(ULONG, newSR, D0),
14 AROS_LHA(ULONG, mask, D1),
16 LOCATION
17 struct ExecBase *, SysBase, 24, Exec)
19 FUNCTION
20 Read/Modify the CPU status register in an easy way. Only the bits set in
21 the mask parameter will be changed.
23 INPUTS
24 newSR - New contents of sr.
25 mask - Bits to change.
27 RESULT
28 Old contents of sr.
30 NOTES
32 EXAMPLE
34 BUGS
36 SEE ALSO
38 INTERNALS
40 HISTORY
42 ******************************************************************************/
44 #include "machine.i"
46 .text
47 .balign 4
48 .globl AROS_SLIB_ENTRY(SetSR,Exec)
49 .type AROS_SLIB_ENTRY(SetSR,Exec),@function
50 AROS_SLIB_ENTRY(SetSR,Exec):
51 /* Do the real work in supervisor mode
52 Preserve a5 in a0 (faster than stack space)
54 move.l a5,a0
55 lea.l setsrsup,a5
56 jsr Supervisor(a6)
57 move.l a0,a5
58 rts
60 setsrsup:
61 /* The old value of sr now lies on the top of the stack.
62 d1 = (mask & newSR) | (~mask & SR)
64 and.w d1,d0
65 eor.w #-1,d1
66 and.w (sp),d1
67 or.w d0,d1
69 /* Get returncode */
70 clr.l d0
71 move.w (sp),d0
73 /* Set new sr value */
74 move.w d1,(sp)
75 rte